Clocks, resets, and pinmuxes are now handled by the driver model, so the
only thing the "board" code needs to do is load the driver. This matches
the pattern used by other DM raw NAND drivers (there is no NAND uclass).
The actual board code is now only needed in SPL.
Signed-off-by: Samuel Holland <samuel@sholland.org>
As a first step toward converting this driver to the driver model, use
the ofnode abstraction to replace direct references to the FDT blob.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Each chip is required to have a unique CS number ("reg" property) in the
range 0-7, so there is no need to separately count the number of chips.
Signed-off-by: Samuel Holland <samuel@sholland.org>
NAND is always at function 2 on port C.
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Currently NAND clock setup is done in board code, both in SPL and in
U-Boot proper. Add the NAND clocks/resets here so they can be used by
the "full" NAND driver once it is converted to the driver model.
The bit locations are copied from the Linux CCU drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Implement the .get_function operation, so the gpio command can report
the current function. Since the GPIOF_FUNC (versus GPIOF_UNUSED) mux
values vary among the PMICs, report all non-GPIO mux values as UNKNOWN.
Signed-off-by: Samuel Holland <samuel@sholland.org>
There are three major variants of the AXP PMIC GPIO functionality (plus
PMICs with no GPIOs at all). Except for GPIO3 on the AXP209, which uses
a different register layout, it is straightforward to support all three
variants with a single driver. Do this, and in the process remove the
GPIO-related definitions from the PMIC-specific headers, and therefore
the dependency on AXP_PMIC_BUS.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that the PMIC driver implements the DM_PMIC uclass, those functions
can be used instead of the platform-specific "pmic_bus" functions.
Since the driver still uses the single set of register definitions from
axpXXX.h (as selected by AXPxxx_POWER), it still depends on one of those
choices, and therefore also AXP_PMIC_BUS.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that the PMIC has a DM driver and binds device tree subnodes, the
GPIO device can be bound that way, instead of from inside board code.
Since the driver still uses the single set of register definitions from
axpXXX.h (as selected by AXPxxx_POWER), it does not differentiate among
the supported compatibles.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This is less confusing than half of the driver using "axp_gpio" and the
other half using "gpio_axp".
Signed-off-by: Samuel Holland <samuel@sholland.org>
These PMICs each have two GPIO pins, and are supported by the axp_gpio
driver. In order to convert the axp_gpio driver to probe using the
device tree, the corresponding device tree nodes must be present. Add
them, following the same binding as the AXP209 and AXP813.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that the sunxi_gpio driver handles pull-up/down via the driver
model, we can switch to DM_GPIO for these pins with no loss in
functionality. Since the driver now gets its pin configuration from
the device tree, we can remove the Kconfig symbols.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove
it, along with the rest of the support for AXP virtual GPIOs.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that the USB PHY driver uses the device tree to get VBUS supply
regulators, these Kconfig symbols are unused. Remove them.
Signed-off-by: Samuel Holland <samuel@sholland.org>
The device tree binding for the PHY provides VBUS supplies as regulator
references. Now that all boards have the appropriate regulator uclass
drivers enabled, the PHY driver can switch to using them. This replaces
direct GPIO usage, which in some cases needed a special DM-incompatible
"virtual" GPIO from the PMIC.
The following boards provided a value for CONFIG_USB0_VBUS_PIN, but are
missing the "usb0_vbus-supply" property in their device tree. None of
them have the MUSB controller enabled in host or OTG mode, so they
should see no impact:
- Ainol_AW1_defconfig / sun7i-a20-ainol-aw1
- Ampe_A76_defconfig / sun5i-a13-ampe-a76
- CHIP_pro_defconfig / sun5i-gr8-chip-pro
- Cubieboard4_defconfig / sun9i-a80-cubieboard4
- Merrii_A80_Optimus_defconfig / sun9i-a80-optimus
- Sunchip_CX-A99_defconfig / sun9i-a80-cx-a99
- Yones_Toptech_BD1078_defconfig / sun7i-a20-yones-toptech-bd1078
- Yones_Toptech_BS1078_V2_defconfig /
sun6i-a31s-yones-toptech-bs1078-v2
- iNet_3F_defconfig / sun4i-a10-inet-3f
- iNet_3W_defconfig / sun4i-a10-inet-3w
- iNet_86VS_defconfig / sun5i-a13-inet-86vs
- iNet_D978_rev2_defconfig / sun8i-a33-inet-d978-rev2
- icnova-a20-swac_defconfig / sun7i-a20-icnova-swac
- sun8i_a23_evb_defconfig / sun8i-a23-evb
Similarly, the following boards set CONFIG_USB1_VBUS_PIN, but do not
have "usb1_vbus-supply" in their device tree. Neither of them have USB
enabled at all, so again there should be no impact:
- Cubieboard4_defconfig / sun9i-a80-cubieboard4 (also for USB3)
- sun8i_a23_evb_defconfig / sun8i-a23-evb
The following boards use a different pin for USB1 VBUS between their
defconfig and their device tree. Depending on which is correct, they
may be broken:
- Linksprite_pcDuino3_Nano_defconfig (PH11) /
sun7i-a20-pcduino3-nano (PD2)
- icnova-a20-swac_defconfig (PG10) / sun7i-a20-icnova-swac (PH6)
Finally, this board has conflicting pins given for its USB2 VBUS:
- Lamobo_R1_defconfig (PH3) / sun7i-a20-lamobo-r1 (PH12)
Signed-off-by: Samuel Holland <samuel@sholland.org>
On many boards, the USB ports are powered by a GPIO-controlled fixed
regulator. In preparation for switching the USB PHY driver to use the
regulator uclass instead of driving the GPIO directly, ensure these
boards have fixed regulator support enabled.
Signed-off-by: Samuel Holland <samuel@sholland.org>
On many boards, the USB ports are powered by the PMIC's "drivevbus"
regulator. In preparation for switching the USB PHY driver to use the
regulator uclass instead of a virtual GPIO pin, ensure these boards
have AXP PMIC regulator support enabled.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that some regulator driver exists for this PMIC, add support for
probing regulator drivers from the device tree subnodes.
Signed-off-by: Samuel Holland <samuel@sholland.org>
The first AXP regulator converted to use the regulator uclass is the
drivevbus switch, since it is used by the USB PHY driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove it.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Update boards to use the USB power supply driver, as referenced in the
device tree, instead of a virtual GPIO. This removes the need for some
DM-incompatible special cases in the GPIO driver.
The following six boards used AXP0-VBUS-DETECT in their config, but are
missing the "usb0_vbus_power-supply" property in their device tree:
- Ainol_AW1_defconfig / sun7i-a20-ainol-aw1
- Cubieboard4_defconfig / sun9i-a80-cubieboard4
- Merrii_A80_Optimus_defconfig / sun9i-a80-optimus
- Nintendo_NES_Classic_Edition_defconfig /
sun8i-r16-nintendo-nes-classic-edition
- Yones_Toptech_BD1078_defconfig / sun7i-a20-yones-toptech-bd1078
- Yones_Toptech_BS1078_V2_defconfig /
sun6i-a31s-yones-toptech-bs1078-v2
None of those six boards have the MUSB controller (USB OTG) enabled in
their device trees, so this change should not break anything for them.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This driver reports the presence/absence of voltage on the PMIC's USB
VBUS pin. This information is used by the USB PHY driver. The
corresponding Linux driver uses the power supply class, which does not
exist in U-Boot. UCLASS_REGULATOR seems to be the closest match.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This board is configured with CONFIG_USB1_VBUS_PIN="PH24", but no
regulator exists in its device tree. Add the regulator, so USB will
continue to work when the PHY driver switches to using the regulator
uclass instead of a GPIO.
Update the device tree here because it does not exist in Linux.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Since the D1 CCU binding is defined, we can add support for its
gates/resets, following the pattern of the existing drivers.
Series-to: sunxi
Signed-off-by: Samuel Holland <samuel@sholland.org>
Compatible strings for some new RTC hardware variants were added to
the binding. Add them to the driver in preparation for supporting
those new SoCs.
Signed-off-by: Samuel Holland <samuel@sholland.org>
The clock and reset drivers use the exact same platform data. Simplify
them by sharing the object. This is safe because the parent device
(the clock device) always gets its driver model callbacks run first.
Series-to: sunxi
Series-cc: Lukasz Majewski <lukma@denx.de>
Series-cc: Sean Anderson <seanga2@gmail.com>
Series-version: 2
Cover-letter:
clk: sunxi: Out-of-bounds access fix and driver cleanup
This series fixes an issue with out-of-bounds access to the gate array
(patches 1-2), uses the rearranged array size information to remove a
bunch of duplicate code (patches 3-4), and then simplifies how the reset
driver is bound (patches 5-7).
The original motivation for these changes was adding a driver for the
legacy A31/A23/A33 PRCM binding (which I will send separately), and
trying to use OF_PLATDATA in SPL (which did not work out). But I think
at least some of the cleanup is worth applying on its own.
Patch 4 is generally the same change I made between v1 and v2 of the
pinctrl series, using some #ifdefs to share a U_BOOT_DRIVER. It's not
quite as clean as the pinctrl case, because here the SoC-specific parts
are in different files, so all of the CCU descriptors have to be global.
END
Acked-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
The reason here is the same as the reason for changing the clock driver:
platform data can be provided when binding the driver.
Acked-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
All of the driver private data should really be platform data since it
is determined statically (selected by the compatible string or extracted
from the devicetree). Move everything to platform data, so it can be
provided when binding the driver. This is useful for SPL, or for
instantiating the driver as part of an MFD.
Acked-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that all of the variants use the same bind/probe functions and ops,
there is no need to have a separate driver for each variant. Since most
SoCs contain two variants (the main CCU and PRCM CCU), this saves a bit
of firmware size and RAM.
Acked-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
