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https://github.com/smaeul/u-boot.git
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4871db6082
BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MMC
driver set PWREN high in dwmci_init().
However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact.
Upstream Linux commit 26c100232b09 "arm64: dts: rockchip: Fix sdmmc
access on rk3308-rock-s0 v1.1 boards" fixed this issue by adding a
vcc_sd regulator.
Include the new vcc_sd regulator in SPL and enable required Kconfig
options to set GPIO4_D6 low to fix reading sdmmc on v1.1 hw revision.
Fixes: 25438c40a007 ("board: rockchip: Add Radxa ROCK S0")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
34 lines
360 B
Plaintext
34 lines
360 B
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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#include "rk3308-u-boot.dtsi"
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&emmc_pwren {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&gpio4 {
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bootph-pre-ram;
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};
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&sdmmc_2030 {
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bootph-pre-ram;
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};
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&uart0 {
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bootph-all;
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clock-frequency = <24000000>;
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};
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&uart0_xfer {
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bootph-all;
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};
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&vcc_sd {
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bootph-pre-ram;
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};
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&vdd_core {
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regulator-init-microvolt = <1015000>;
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};
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