4843 Commits

Author SHA1 Message Date
Tom Rini
f899cc1432 ti: keystone: Move away from CONFIG_SOC_KEYSTONE
We have individual SOC symbols for each keystone 2 platform.  Use the
existing CONFIG_ARCH_KEYSTONE rather than CONFIG_SOC_KEYSTONE to
encompass all of the keystone families.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
Tom Rini
e908d20fcb Prepare v2021.10-rc5
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Merge tag 'v2021.10-rc5' into next

Prepare v2021.10-rc5
2021-09-27 09:45:36 -04:00
Kristian Amlie
15e30106ce ARM: vexpress_ca9x4: Reintroduce board in order to use with QEMU.
vexpress_ca9x4 is seemingly the only board except for qemu_arm which
is able to run U-Boot correctly, using the `-M vexpress-a9` option to
QEMU. Building for qemu_arm and running qemu-system-arm with the `-M
virt` argument has a number of downsides, most importantly that it
only supports virtio storage drivers. This significantly reduces its
usefulness in testing memory card and Flash solutions, especially when
the tested images are from a third party source.

So therefore we reintroduce the vexpress_ca9x4 board in this commit,
with the explicit goal of using it with QEMU.

A number of differences to note from the original:

* Since the board was apparently unmaintained, I have now set myself
  as the maintainer.

* The board has been converted to use the driver model, which was the
  reason it was removed in the first place.

* The vexpress_ca15_tc2 and vexpress_ca5x2 boards, which were removed
  in the same commit, are not necessary for the QEMU use case, and
  have been omitted.

* An `mmc0` alias was introduced in the dts file. The mmc is not
  detected correctly without this, now that it's based on the device
  tree instead of the board's init function.

* A couple of other nodes were removed because they were problematic
  when trying to run the UEFI bootmgr. Once again, the primary use
  case here is QEMU, and these nodes are not needed for that to work.

* Unnecessary board init code has been removed, thanks to driver model
  and device tree.

* `CONFIG_OF_EMBED` has been enabled. I know this goes against
  recommended practice, but there doesn't seem to be any other way to
  pass the dtb to U-Boot in the QEMU scenario. Using the -dtb argument
  does not work, I suppose because U-Boot doesn't use the same
  mechanics as the kernel when it's booting.

* Load addresses have been changed to fit QEMU use case.

People wanting to get a more detailed, yet somewhat isolated, diff
between this and the original, can run this command:

  git diff c6c26a05b89f25a06e7562f8c2071b60fd0c9eac~1 -- \
      $( git diff-tree --diff-filter=A -r --name-only HEAD~1 HEAD)

(Make sure to either check out this commit first, or replace HEAD with
the commit ID of this commit)

Signed-off-by: Kristian Amlie <kristian.amlie@northern.tech>
2021-09-24 14:30:46 -04:00
Marek Vasut
c3880e6597 arm: socfpga: vining: Fix UDC controller phandle in DT
The USB peripheral controller is the DWC2 controller 1, not 0.
Update the phandle to fix UDC support on this board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
e21bbffa1d arm: socfpga: vining: Un-disable WDT in DT
The WDT on this system should be enabled, make it so.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Patrick Delaunay
cf39d0c29d arm: dts: stm32mp1: use ssbl partition name for U-Boot
Continue to use the "ssbl" name for GPT partition of secondary boot
stage = U-Boot for basic boot with SPL to avoid to disturb existing user.

The "fip" partition name is only used for TFA_BOOT with FIP, it is a TF-A
BL2 requirement; it the default configuration for STMicroelectronics
boards.

Fixes: b73e8bf453f8 ("arm: stm32mp: add defconfig for trusted boot with FIP")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-09-21 09:22:01 +02:00
Eugen Hristev
d65b84a1d0 ARM: dts: at91: update flexcom defines using include file
Replace the number in the flexcom-mode property with the define from the
include file.
This corresponds to the approach in Linux kernel.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21 10:08:24 +03:00
Eugen Hristev
26671aabcc ARM: dts: at91: sama5d2: fix dtc warning for ohci and ehci
Fixed the following DTC build warning (reproducible with W=1)

arch/arm/dts/at91-sama5d2_icp.dtb: Warning (unit_address_format): /ahb/ohci@00400000: unit name should not have leading 0s
arch/arm/dts/at91-sama5d2_icp.dtb: Warning (unit_address_format): /ahb/ehci@00500000: unit name should not have leading 0s

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Alexander Dahl <ada@thorsis.com>
2021-09-21 10:05:38 +03:00
Eugen Hristev
b6a8cce941 ARM: dts: at91: sama5d2_icp: cosmetic arrangement of the nodes
Reorder the nodes following the kernel rules: nodes in a range are sorted
by ascending bus address, and when referenced by phandle, are ordered
alphabetically.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21 10:05:38 +03:00
Mihai Sain
5b43508419 ARM: dts: at91: sama5d2_icp: add QSPI1 device
Add support for sst26vf064b 64Mbit qspi-flash that is
present on sama5d2_icp board.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
[eugen.hristev@microchip.com: move u-boot properties to sama5d2_icp-u-boot.dtsi]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21 10:05:38 +03:00
Clément Léger
b25d7618be ARM: dts: at91: sama5d2_xplained: Add memory node in devicetree
sama5d2_xplained DRAM detection code will be modified to use device tree
instead of hardcoded addresses. In order to prepare that, add the memory
node to at91-sama5d2_xplained.dts.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21 10:05:38 +03:00
Claudiu Beznea
63ba551d70 ARM: dts: at91: sam9x60: add bindings for CPU
Add bindings for CPU. This will allow displaying correctly the crystal,
CPU and master clock.

Reported-by: Eugen Hristev <eugen.hristev@microchip.com>
Fixes: a64862284f65 ("clk: at91: sam9x60: add support compatible with
CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-09-21 10:05:37 +03:00
Tom Rini
6674edaabf Prepare v2021.10-rc4
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Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg:                using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
#	board/Arcturus/ucp1020/spl.c
#	cmd/mvebu/Kconfig
#	common/Kconfig.boot
#	common/image-fit.c
#	configs/UCP1020_defconfig
#	configs/sifive_unmatched_defconfig
#	drivers/pci/Kconfig
#	include/configs/UCP1020.h
#	include/configs/sifive-unmatched.h
#	lib/Makefile
#	scripts/config_whitelist.txt
2021-09-16 10:29:40 -04:00
Matthias Brugger
3304197272 arm: dts: bcm283x: Add minimal smbios information
At present SMBIOS tables are empty, which breaks some use-cases that
rely on that. Add some minimal information to fulfill this.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-09-15 12:29:26 +02:00
Aswath Govindraju
fa7a14576d arm: dts: k3-j721e-r5-*.dts: Fix clock-names property in the usb0 instance
In the cdns3 usb driver, the clock name looked for is ref. Therefore, fix
the clock-names property in usb0 instance for proper initialization of
cdns3 usb gadget driver.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-09-10 20:10:20 -04:00
Roger Quadros
72f78c6918 ARM: dts: Fix node status to "okay" on TI boards
As per Device Tree Specification [1], the status parameter of nodes can
be "okay", "disabled", etc. "ok" is not a valid parameter.

U-boot Driver Model does not recognize status="ok" either and treats
the node as disabled.

[1] https://github.com/devicetree-org/devicetree-specification/releases/tag/v0.3

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2021-09-10 20:10:20 -04:00
Aswath Govindraju
7ca1af635a arm: dts: k3-am642-evm-u-boot: Add u-boot, dm-spl tag in the pinmux node of mmc1
Add u-boot,dm-spl tag in the pinmux device tree node, required for MMCSD1
subsystem.

Fixes: b6059ddc45b9 ("arm: dts: k3-am642: Add r5 specific dt support")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-09-10 20:10:20 -04:00
Matwey V. Kornilov
4c9289f52f am33xx: Fix USB for am335x boards
USB nodes were mistakenly disabled in

    commit 942853dd96df ("arm: dts: Resync BeagleBone device trees")

This commit is to fix the following issue:

    starting USB...
    No working controllers found
    USB is stopped. Please issue 'usb start' first.
    starting USB...
    No working controllers found

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0782e8572ce43f521ed6ff15e4a7ab9aa5acdc85
Fixes: 942853dd96df ("arm: dts: Resync BeagleBone device trees")
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Paul Barker <paul.barker@sancloud.com>
2021-09-10 20:10:20 -04:00
Sven Auhagen
88426bd6b0 arm: mvebu: dts: Armada8k enable mdio
Since mvpp2 is using the new mdio driver and the cp110 has been
synced with the linux upstream, the mdio has to enabled in the
device tree file.
This is missing for some device tree files and therefore the
network cards do not come online.

Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-10 09:01:51 +02:00
Stephan Gerhold
f64011e11e board: stemmy: Add basic Fastboot support
Make use of the new drivers for ARM U8500 introduced in the U-Boot
2021.10 merge window by adding basic support for USB Fastboot with
the "stemmy" board. As a first step this will always boot directly
into USB Fastboot for now with the console displayed on the screen
to make that obvious.

Samsung uses quite strange GPT partition labels on these boards,
so also add a bunch of fastboot_partition_alias_* to make this more
easy to use.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-09-01 19:25:37 -04:00
Stephan Gerhold
fc9d4b123d arm: dts: u8500: u-boot: Add fixed clock for eMMC
So far there is no need for a clock driver in U-Boot because the
previous boot stage leaves all the necessary clocks on. However,
some drivers in U-Boot (e.g. arm_pl180_mmci) depend on having a clock
driver to obtain the clock frequency.

Setting up the clock drivers properly is a bit tricky on U8500,
so for now add a simple fixed-clock for the eMMC that allows obtaining
the clock frequency. This should be replaced eventually if some board
actually requires enabling some of the clocks.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-09-01 19:25:37 -04:00
Stephan Gerhold
1ae43a0e23 arm: dts: u8500: Update from Linux ux500-dts-for-v5.15
Update ste-dbx5x0.dtsi, ste-ab8500.dtsi and ste-ab8505.dtsi with
the changes made in upstream Linux. They are taken from
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git/
branch "ux500-dts-for-v5.15" (pending merge for Linux 5.15).

The only relevant change for U-Boot here is
"ARM: dts: ux500: ab8500: Link USB PHY to USB controller node" [1]
which links the USB PHY to the USB controller. This is necessary on
U-Boot because the PHY driver is implemented as part of the generic
PHY subsystem that makes use of these bindings.

[1]: https://lore.kernel.org/linux-arm-kernel/20210709182234.47232-1-stephan@gerhold.net/

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-09-01 19:25:37 -04:00
Tom Rini
b15a17be0c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh 2021-08-31 18:37:25 -04:00
Tom Rini
b9cb74a5aa Xilinx changes for v2021.10-rc3
xilinx:
 - Disable CONFIG_ARCH_FIXUP_FDT_MEMORY
 - Print information about cpu via soc drivers and enable DISPLAY_CPUINFO
 - Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT
 
 zynq:
 - Wire single QSPI
 - Use power-source instead of io-standard properties
 - Enable nor on zc770-xm012
 
 zynqmp:
 - Change handling around multi_boot()
 - Setup offset for u-boot.itb in spi
 - Generate run time dfu_alt_info for capsule update
 - Use explicit values for enums (zynqmp_firmware.h)
 - Enable RTC/SHA1/BUTTON/BUTTON_GPIO command
 - Disable WDT driver by default
 - Bind usb/scsi via preboot because of EFI
 - DT updates/fixes
 - Add soc driver
 - Fix SPL SPI boot mode
 
 versal:
 - Add soc driver
 
 sdhci:
 - Update tap delay programming for zynq_sdhci driver
 
 cmd:
 - Fix RTC uclass handling in date command
 - Update pwm help message
 - Update reset help message
 
 watchdog:
 - Fix wwdt compilation
 
 rtc:
 - Deal with seq alias in rtc uclass
 - Add zynqmp RTC driver
 
 fdt:
 - Add kernel-doc for fdt_fixup_memory_banks()
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Merge tag 'xilinx-for-v2021.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2021.10-rc3

xilinx:
- Disable CONFIG_ARCH_FIXUP_FDT_MEMORY
- Print information about cpu via soc drivers and enable DISPLAY_CPUINFO
- Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT

zynq:
- Wire single QSPI
- Use power-source instead of io-standard properties
- Enable nor on zc770-xm012

zynqmp:
- Change handling around multi_boot()
- Setup offset for u-boot.itb in spi
- Generate run time dfu_alt_info for capsule update
- Use explicit values for enums (zynqmp_firmware.h)
- Enable RTC/SHA1/BUTTON/BUTTON_GPIO command
- Disable WDT driver by default
- Bind usb/scsi via preboot because of EFI
- DT updates/fixes
- Add soc driver
- Fix SPL SPI boot mode

versal:
- Add soc driver

sdhci:
- Update tap delay programming for zynq_sdhci driver

cmd:
- Fix RTC uclass handling in date command
- Update pwm help message
- Update reset help message

watchdog:
- Fix wwdt compilation

rtc:
- Deal with seq alias in rtc uclass
- Add zynqmp RTC driver

fdt:
- Add kernel-doc for fdt_fixup_memory_banks()
2021-08-27 08:33:02 -04:00
Michal Simek
52ff1626cf xilinx: common: Enabling generic function for DT reselection
U-Boot support board detection at run time and based on it change DT.
This feature is implemented for SOM Kria platforms which contain two
eeproms which contain information about SOM module and CC (Carrier card).
Full U-Boot starts with minimal DT file defined by
CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image.
It is using default setup of board_name variable initializaed to
DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option.

When DTB_RESELECT is enabled board_detection() is called. Keep it your mind
that this code is called before relocation. board_detection() is calling
xilinx_read_eeprom() which fills board_info (xilinx_board_description)
structure which are parsed in board_name_decode().
Based on DT configuration and amount of nvmemX aliases name of the board is
composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev"
<board_revision> "-" <cc_name> "-rev" <cc_revision>.

If CC is not present or more are available it keeps going.

When board name is composed and returned from board_name_decode() it is
assigned to board_name variable which is used by
board_fit_config_name_match() which is called via fdtdec_setup() when it
goes over config options in multi dtb FIT image.

From practical point of view multi DTB image is key point here which has to
contain configs for detected combinations. Unfortunately as of now they
have to be full DTBs and DTBOs are not supported.

That's why configuration like:
config_X {
	description = "zynqmp-board-cc";
	fdt = "board", "cc";
};

needs to be squashed together with:
fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \
arch/arm/dts/zynqmp-cc.dtbo

and only one dtb is in fit:
config_X {
	description = "zynqmp-board-cc";
	fdt = "board-cc";
};

For creating multi DTBs fit image use mkimage -E, e.g.:
mkimage -E -f all.its all.dtb

When DTB_RESELECT is enabled xilinx_read_eeprom() is called before
relocation and it uses calloc for getting a buffer. Because this is dynamic
memory it is not relocated that's why xilinx_read_eeprom() is called again
as the part of board_init(). This second read with calloc buffer placed in
proper position board_late_init_xilinx() can setup u-boot variables as
before.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:14:43 +02:00
Michal Simek
f28a22d55a arm64: dts: Make sure that all DTBs are 64bit aligned
Start of DTB should be 64bit aligned that's why also make sure that end is
also 64bit aligned. It is not required but it is nice thing to do.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:14:43 +02:00
Michal Simek
c2b7244322 ARM: zynq: Enable smcc and nor for zc770-xm012
Enable cfi flash on zc770-xm012 configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:08:11 +02:00
Michal Simek
0df062bf04 ARM: zynq: Wire single qspi on couple of boards
Single configuration is working fine and no issue to enable it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:08:11 +02:00
Sai Krishna Potthuri
b9c4e8d439 ARM: zynq: Replace 'io-standard' with 'power-source' property
Replace 'io-standard' property with 'power-source' property in all
zynq dts files to be in sync with Zynq Pinctrl driver.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:08:11 +02:00
Raju Kumar Pothuraju
bc353102a0 xilinx: Add jedec compatible string for QSPI (Zynq/ZynqMP)
Add missing "jedec, spi-nor" compatible string for QSPI flash node.
Spi-nor framework uses this compatibility string to probe &
initialize flash. With missing compatibility string we are observing
below error:

Zynq> sf probe 0 0 0
 jedec_spi_nor spi_flash@0:0: unrecognized JEDEC id bytes:
00, 00, 00  Failed to initialize SPI flash at 0:0 (error -2)

Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:08:11 +02:00
Michal Simek
1759a31288 arm64: zynqmp: Update comment style sm-k26
Trivial style patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:08:11 +02:00
Michal Simek
464f6558ca arm64: zynqmp: Fix header alignment on kv260 boards
Fix header alignment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:08:11 +02:00
Michal Simek
4cec057ff9 arm64: zynqmp: Fix node name for ds35/36 leds
By dt-binding specs led nodes should have -led suffix that's why add it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:08:11 +02:00
Siew Chin Lim
8208e9a914 arm: dts: Add base dtsi and devkit dts for Intel N5X device
Add device tree for N5X.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <lftan.linux@gmail.com>
2021-08-25 15:04:44 +08:00
Adam Ford
221146c558 ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash
There is a QSPI NOR flash part on the board.  Because this chip isn't
yet supported in Linux, but it is supported in U-Boot, and the
face that the RPC_SPI compatible names are different in U-Boot and
Linux, the device tree updates are confined to -u-boot.dtsi files.

In order to use the QSPI, TF-A must leave RPC unlocked by compiling
TF-A with RZG_RPC_HYPERFLASH_LOCKED=0.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Biju Bas <biju.das.jz@bp.renesas.com>
2021-08-24 20:03:09 +02:00
Michael Walle
8331618cc3 board: sl28: drop unneeded and outdated flash partitions
This board doesn't use the MTD subsystem in u-boot, thus there is no
need to specify the partitions. They are outdated anyway. Just drop
them.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18 15:55:15 +05:30
Marek Vasut
59f6eb477e ARM: dts: stm32: Reduce DHCOR SPI NOR frequency to 50 MHz
The SPI NOR is a bit further away from the SoC on DHCOR than on DHCOM,
which causes additional signal delay. At 108 MHz, this delay triggers
a sporadic issue where the first bit of RX data is not received by the
QSPI controller.

There are two options of addressing this problem, either by using the
DLYB block to compensate the extra delay, or by reducing the QSPI bus
clock frequency. The former requires calibration and that is overly
complex for SPL, so opt for the second option. This incurs 20ms delay
during boot, when SPL loads U-Boot to DRAM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16 10:49:35 +02:00
Patrick Delaunay
2d4180b1eb arm: dts: stm32mp15: alignment with v5.14
Device tree alignment with Linux kernel v5.14-rc3
- ARM: dts: stm32: move stmmac axi config in ethernet node on stm32mp15
- ARM: dts: stm32: Configure qspi's mdma transfer to block for stm32mp151
- ARM: dts: stm32: add a new DCMI pins group on stm32mp15
- ARM: dts: stm32: fix ltdc pinctrl on microdev2.0-of7

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16 10:49:35 +02:00
Patrick Delaunay
b73e8bf453 arm: stm32mp: add defconfig for trusted boot with FIP
Add TF-A FIP support for trusted boot on STM32MP15x,
when STM32MP15x_STM32IMAGE is not activated.

With FIP support the SSBL partition is named "fip" and its size is 4MB,
so the ENV partition name in device tree  (for SD card or eMMC)
or offset in defconfig (CONFIG_ENV_OFFSET / CONFIG_ENV_OFFSET_REDUND)
need to be modified.

With FIP the TEE MTD partitions are removed because the OP-TEE binray are
included in the FIP containers.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16 09:36:31 +02:00
Patrick Delaunay
f91783edf2 arm: stm32mp: handle the OP-TEE nodes in DT with FIP support
With FIP support in TF-A (when CONFIG_STM32MP15x_STM32IMAGE
is not activated), the DT nodes needed by OP-TEE are added by OP-TEE
firmware in U-Boot device tree, present in FIP.

These nodes are only required in trusted boot, when TF-A load the file
u-boot.stm32, including the U-Boot device tree with STM32IMAGE header,
in this case OP-TEE can't update the U-Boot device tree.

Moreover in trusted boot mode with FIP, as the OP-TEE nodes are present
in U-Boot device tree only when needed the function
stm32_fdt_disable_optee can be removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16 09:34:27 +02:00
Chris Morgan
d70c0cab8f rockchip: px30: add support for SFC for Odroid Go Advance
The Odroid Go Advance uses a Rockchip Serial Flash Controller with an
XT25F128B SPI NOR flash chip. This adds support for both. Note that
while both the controller and chip support quad mode, only two lines
are connected to the chip. Changing the pinctrl to bus2 and setting tx
and rx lines to 2 for this reason.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:34:11 +08:00
Chris Morgan
08b097c32f rockchip: px30: add the serial flash controller
Add the serial flash controller to the devicetree for the PX30.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:34:11 +08:00
Peter Robinson
100583473c arm: dts: sync the Rockhip 3368 SoCs from Linux
Sync the rk3368 DTs and associated bits from 5.14-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:33:13 +08:00
Peter Robinson
27e1b5ee9b arm: dts: sync the Rockhip 3328 SoCs from Linux
Sync the rk3328 DTs and associated bits from 5.14-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:33:13 +08:00
Peter Robinson
822556a934 arm: dts: sync the Rockhip 3399 SoCs from Linux
Sync the rk3399 DTs and associated bits from 5.14-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
(Remove the conflict content for vmarc-som)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:33:13 +08:00
Xiaobo Tian
09cf012467 arm64: rk3399: r4s: Remove undesirable MAC address fetching methods for ethernet
Remove the recommended MAC address from the network card.
NanoPi R4S has a EEPROM attached to the 2nd I2C bus (U92), which stores the MAC address.

Signed-off-by: Xiaobo Tian <peterwillcn@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 18:10:39 +08:00
Xiaobo Tian
897f30e84a arm64: rk3399: r4s: Inheritance uses the sdmmc definition in dtsi
The host-index-min property is invalid,
so it inherits from the sdmmc definition in dtsi.

Signed-off-by: Xiaobo Tian <peterwillcn@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 18:10:39 +08:00
Xiaobo Tian
2ae7dacfaf arm64: rk3399: r4s: correct the LEDS label name
Correct the LEDS label name and remove the board type prefix,
which is actually unnecessary here, removes the redefined system status LED pin.

Signed-off-by: Xiaobo Tian <peterwillcn@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 18:10:39 +08:00
Johan Jonker
d2a74ec91b ARM: dts: rockchip: update rk3188-radxarock.dts
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently
had some updates.
For a future rk3066 support in U-boot this file must also update.
Move U-boot specific things in a rk3188-radxarock-u-boot.dtsi file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 17:54:37 +08:00
Johan Jonker
7d4b5a850e ARM: dts: rockchip: update rk3188.dtsi
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently
had some updates.
For a future rk3066 support in U-boot this file must also update.
Move U-boot specific things in a rk3188-u-boot.dtsi file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 17:54:37 +08:00