working dts and bt

This commit is contained in:
Ubuntu
2024-04-28 22:20:47 +00:00
parent a29ccbd034
commit 9a3236e684
13 changed files with 4548 additions and 314 deletions

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bt-fw/rtl8723ds_config.bin Normal file

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dts/README.md Normal file
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# Rebuild dts tree fo MQ pro..
see: https://manpages.ubuntu.com/manpages/focal/man1/dtc.1.html
## Notes for re-generating MQ PRO device tree (`.dtb`)
My notes
* By default the Device Tree compiler (`/usr/bin/dtc`) should already be installed, as should the linux-headers for the kernel.
### compile the mq-pro dts with the current kernel headers
Example here is against the 'default' 6.8.0-31 linux kernel from the Ubuntu 24.04 release
* clean the `dtspp` folder: `rm dtspp/*`
* edit and run `bake.sh` to precompile the files against the latest linux-headers
* cd into the `dtspp` folder and run:
`dtc sun20i-d1-mangopi-mq-pro.dts > dtb-6.8.0-31-mqpro`
modify the version to reflect the current headers
* move the `.dtb` file into the `/boot` folder:
`sudo mv dtb-6.8.0-31-mqpro /boot/dtbs`
* make a link in `/boot` to this:
`sudo ln -s dtbs/dtb-6.8.0-31-mqpro /boot/dtb-mqpro`
### Set up Grub to test boot the new DTB
Initially we will test the new dtb:
* backup the grub config: `sudo cp /etc/grub/grub.cfg /etc/grub/grub.cfg.generic-dtb`
* `sudo vi /etc/grub/grub.cfg` (or use nano if you prefer)
Find the 1st `menuentry` section (the default Ubuntu one) and edit the `devicetree` line to look like:
`devicetree /boot/dtb-mqpro`
* Reboot (`sudo reboot`) (remember the mq-pro is sloooow to reboot ;-) )
* If the reboot fails you can either attach a serial adapter to the GPIO pins and select the fallback kernel from the advanced options menu, and then restore the grub config backup once logged in.
Or (if no serial available) remove the SD card, mount it on another computer and restore the file there.
### Check that we have the correct device tree
`dtc -I fs /sys/firmware/devicetree/base | grep 'model'`
* ignore all the 'not a phandle reference' warnings
* you should see `model = "MangoPi MQ Pro"` at the end
### Make this permanent in grub
ToDo

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dts/bake.sh Executable file
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for file in `ls *.dts*` ; do
echo $file
cpp -I/usr/src/linux-headers-6.8.0-31-generic/include/ -nostdinc -undef -x assembler-with-cpp $file > dtspp/$file
done

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# 0 "sun20i-common-regulators.dtsi"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "sun20i-common-regulators.dtsi"
/ {
reg_vcc: vcc {
compatible = "regulator-fixed";
regulator-name = "vcc";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_vcc_3v3: vcc-3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&reg_vcc>;
};
};
&pio {
vcc-pb-supply = <&reg_vcc_3v3>;
vcc-pc-supply = <&reg_vcc_3v3>;
vcc-pd-supply = <&reg_vcc_3v3>;
vcc-pe-supply = <&reg_vcc_3v3>;
vcc-pf-supply = <&reg_vcc_3v3>;
vcc-pg-supply = <&reg_vcc_3v3>;
};

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1141
dts/dtspp/sun20i-d1.dtsi Normal file

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dts/dtspp/sun20i-d1s.dtsi Normal file

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# 0 "sunxi-d1-t113.dtsi"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "sunxi-d1-t113.dtsi"
/ {
soc {
dsp_wdt: watchdog@1700400 {
compatible = "allwinner,sun20i-d1-wdt";
reg = <0x1700400 0x20>;
interrupts = <SOC_PERIPHERAL_IRQ(122) IRQ_TYPE_LEVEL_HIGH>;
clocks = <&dcxo>, <&rtc CLK_OSC32K>;
clock-names = "hosc", "losc";
status = "reserved";
};
};
};

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# 0 "sunxi-d1s-t113.dtsi"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "sunxi-d1s-t113.dtsi"
# 1 "/usr/src/linux-headers-6.8.0-31-generic/include/dt-bindings/clock/sun6i-rtc.h" 1
# 5 "sunxi-d1s-t113.dtsi" 2
# 1 "/usr/src/linux-headers-6.8.0-31-generic/include/dt-bindings/clock/sun8i-de2.h" 1
# 6 "sunxi-d1s-t113.dtsi" 2
# 1 "/usr/src/linux-headers-6.8.0-31-generic/include/dt-bindings/clock/sun8i-tcon-top.h" 1
# 7 "sunxi-d1s-t113.dtsi" 2
# 1 "/usr/src/linux-headers-6.8.0-31-generic/include/dt-bindings/clock/sun20i-d1-ccu.h" 1
# 8 "sunxi-d1s-t113.dtsi" 2
# 1 "/usr/src/linux-headers-6.8.0-31-generic/include/dt-bindings/clock/sun20i-d1-r-ccu.h" 1
# 9 "sunxi-d1s-t113.dtsi" 2
# 1 "/usr/src/linux-headers-6.8.0-31-generic/include/dt-bindings/interrupt-controller/irq.h" 1
# 10 "sunxi-d1s-t113.dtsi" 2
# 1 "/usr/src/linux-headers-6.8.0-31-generic/include/dt-bindings/reset/sun8i-de2.h" 1
# 11 "sunxi-d1s-t113.dtsi" 2
# 1 "/usr/src/linux-headers-6.8.0-31-generic/include/dt-bindings/reset/sun20i-d1-ccu.h" 1
# 12 "sunxi-d1s-t113.dtsi" 2
# 1 "/usr/src/linux-headers-6.8.0-31-generic/include/dt-bindings/reset/sun20i-d1-r-ccu.h" 1
# 13 "sunxi-d1s-t113.dtsi" 2
/ {
#address-cells = <1>;
#size-cells = <1>;
dcxo: dcxo-clk {
compatible = "fixed-clock";
clock-output-names = "dcxo";
#clock-cells = <0>;
};
de: display-engine {
compatible = "allwinner,sun20i-d1-display-engine";
allwinner,pipelines = <&mixer0>, <&mixer1>;
status = "disabled";
};
soc {
compatible = "simple-bus";
ranges;
dma-noncoherent;
#address-cells = <1>;
#size-cells = <1>;
pio: pinctrl@2000000 {
compatible = "allwinner,sun20i-d1-pinctrl";
reg = <0x2000000 0x800>;
interrupts = <SOC_PERIPHERAL_IRQ(69) 4>,
<SOC_PERIPHERAL_IRQ(71) 4>,
<SOC_PERIPHERAL_IRQ(73) 4>,
<SOC_PERIPHERAL_IRQ(75) 4>,
<SOC_PERIPHERAL_IRQ(77) 4>,
<SOC_PERIPHERAL_IRQ(79) 4>;
clocks = <&ccu 24>,
<&dcxo>,
<&rtc 0>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#gpio-cells = <3>;
#interrupt-cells = <3>;
/omit-if-no-ref/
can0_pins: can0-pins {
pins = "PB2", "PB3";
function = "can0";
};
/omit-if-no-ref/
can1_pins: can1-pins {
pins = "PB4", "PB5";
function = "can1";
};
/omit-if-no-ref/
clk_pg11_pin: clk-pg11-pin {
pins = "PG11";
function = "clk";
};
/omit-if-no-ref/
dsi_4lane_pins: dsi-4lane-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
"PD6", "PD7", "PD8", "PD9";
drive-strength = <30>;
function = "dsi";
};
/omit-if-no-ref/
lcd_rgb666_pins: lcd-rgb666-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
"PD6", "PD7", "PD8", "PD9", "PD10", "PD11",
"PD12", "PD13", "PD14", "PD15", "PD16", "PD17",
"PD18", "PD19", "PD20", "PD21";
function = "lcd0";
};
/omit-if-no-ref/
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
function = "mmc0";
};
/omit-if-no-ref/
mmc1_pins: mmc1-pins {
pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
function = "mmc1";
};
/omit-if-no-ref/
mmc2_pins: mmc2-pins {
pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7";
function = "mmc2";
};
/omit-if-no-ref/
rgmii_pe_pins: rgmii-pe-pins {
pins = "PE0", "PE1", "PE2", "PE3", "PE4",
"PE5", "PE6", "PE7", "PE8", "PE9",
"PE11", "PE12", "PE13", "PE14", "PE15";
function = "emac";
};
/omit-if-no-ref/
rmii_pe_pins: rmii-pe-pins {
pins = "PE0", "PE1", "PE2", "PE3", "PE4",
"PE5", "PE6", "PE7", "PE8", "PE9";
function = "emac";
};
/omit-if-no-ref/
spi0_pins: spi0-pins {
pins = "PC2", "PC3", "PC4", "PC5";
function = "spi0";
};
/omit-if-no-ref/
uart1_pg6_pins: uart1-pg6-pins {
pins = "PG6", "PG7";
function = "uart1";
};
/omit-if-no-ref/
uart1_pg8_rts_cts_pins: uart1-pg8-rts-cts-pins {
pins = "PG8", "PG9";
function = "uart1";
};
/omit-if-no-ref/
uart3_pb_pins: uart3-pb-pins {
pins = "PB6", "PB7";
function = "uart3";
};
};
ccu: clock-controller@2001000 {
compatible = "allwinner,sun20i-d1-ccu";
reg = <0x2001000 0x1000>;
clocks = <&dcxo>,
<&rtc 0>,
<&rtc 2>;
clock-names = "hosc", "losc", "iosc";
#clock-cells = <1>;
#reset-cells = <1>;
};
gpadc: adc@2009000 {
compatible = "allwinner,sun20i-d1-gpadc";
reg = <0x2009000 0x400>;
clocks = <&ccu 80>;
resets = <&ccu 32>;
interrupts = <SOC_PERIPHERAL_IRQ(57) 4>;
status = "disabled";
#io-channel-cells = <1>;
};
dmic: dmic@2031000 {
compatible = "allwinner,sun20i-d1-dmic",
"allwinner,sun50i-h6-dmic";
reg = <0x2031000 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(24) 4>;
clocks = <&ccu 93>,
<&ccu 92>;
clock-names = "bus", "mod";
resets = <&ccu 38>;
dmas = <&dma 8>;
dma-names = "rx";
status = "disabled";
#sound-dai-cells = <0>;
};
i2s1: i2s@2033000 {
compatible = "allwinner,sun20i-d1-i2s",
"allwinner,sun50i-r329-i2s";
reg = <0x2033000 0x1000>;
interrupts = <SOC_PERIPHERAL_IRQ(27) 4>;
clocks = <&ccu 87>,
<&ccu 83>;
clock-names = "apb", "mod";
resets = <&ccu 35>;
dmas = <&dma 4>, <&dma 4>;
dma-names = "rx", "tx";
status = "disabled";
#sound-dai-cells = <0>;
};
i2s2: i2s@2034000 {
compatible = "allwinner,sun20i-d1-i2s",
"allwinner,sun50i-r329-i2s";
reg = <0x2034000 0x1000>;
interrupts = <SOC_PERIPHERAL_IRQ(28) 4>;
clocks = <&ccu 88>,
<&ccu 84>;
clock-names = "apb", "mod";
resets = <&ccu 36>;
dmas = <&dma 5>, <&dma 5>;
dma-names = "rx", "tx";
status = "disabled";
#sound-dai-cells = <0>;
};
timer: timer@2050000 {
compatible = "allwinner,sun20i-d1-timer",
"allwinner,sun8i-a23-timer";
reg = <0x2050000 0xa0>;
interrupts = <SOC_PERIPHERAL_IRQ(59) 4>,
<SOC_PERIPHERAL_IRQ(60) 4>;
clocks = <&dcxo>;
};
wdt: watchdog@20500a0 {
compatible = "allwinner,sun20i-d1-wdt-reset",
"allwinner,sun20i-d1-wdt";
reg = <0x20500a0 0x20>;
interrupts = <SOC_PERIPHERAL_IRQ(63) 4>;
clocks = <&dcxo>, <&rtc 0>;
clock-names = "hosc", "losc";
status = "reserved";
};
uart0: serial@2500000 {
compatible = "snps,dw-apb-uart";
reg = <0x2500000 0x400>;
reg-io-width = <4>;
reg-shift = <2>;
interrupts = <SOC_PERIPHERAL_IRQ(2) 4>;
clocks = <&ccu 62>;
resets = <&ccu 18>;
dmas = <&dma 14>, <&dma 14>;
dma-names = "tx", "rx";
status = "disabled";
};
uart1: serial@2500400 {
compatible = "snps,dw-apb-uart";
reg = <0x2500400 0x400>;
reg-io-width = <4>;
reg-shift = <2>;
interrupts = <SOC_PERIPHERAL_IRQ(3) 4>;
clocks = <&ccu 63>;
resets = <&ccu 19>;
dmas = <&dma 15>, <&dma 15>;
dma-names = "tx", "rx";
status = "disabled";
};
uart2: serial@2500800 {
compatible = "snps,dw-apb-uart";
reg = <0x2500800 0x400>;
reg-io-width = <4>;
reg-shift = <2>;
interrupts = <SOC_PERIPHERAL_IRQ(4) 4>;
clocks = <&ccu 64>;
resets = <&ccu 20>;
dmas = <&dma 16>, <&dma 16>;
dma-names = "tx", "rx";
status = "disabled";
};
uart3: serial@2500c00 {
compatible = "snps,dw-apb-uart";
reg = <0x2500c00 0x400>;
reg-io-width = <4>;
reg-shift = <2>;
interrupts = <SOC_PERIPHERAL_IRQ(5) 4>;
clocks = <&ccu 65>;
resets = <&ccu 21>;
dmas = <&dma 17>, <&dma 17>;
dma-names = "tx", "rx";
status = "disabled";
};
uart4: serial@2501000 {
compatible = "snps,dw-apb-uart";
reg = <0x2501000 0x400>;
reg-io-width = <4>;
reg-shift = <2>;
interrupts = <SOC_PERIPHERAL_IRQ(6) 4>;
clocks = <&ccu 66>;
resets = <&ccu 22>;
dmas = <&dma 18>, <&dma 18>;
dma-names = "tx", "rx";
status = "disabled";
};
uart5: serial@2501400 {
compatible = "snps,dw-apb-uart";
reg = <0x2501400 0x400>;
reg-io-width = <4>;
reg-shift = <2>;
interrupts = <SOC_PERIPHERAL_IRQ(7) 4>;
clocks = <&ccu 67>;
resets = <&ccu 23>;
dmas = <&dma 19>, <&dma 19>;
dma-names = "tx", "rx";
status = "disabled";
};
i2c0: i2c@2502000 {
compatible = "allwinner,sun20i-d1-i2c",
"allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x2502000 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(9) 4>;
clocks = <&ccu 68>;
resets = <&ccu 24>;
dmas = <&dma 43>, <&dma 43>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c1: i2c@2502400 {
compatible = "allwinner,sun20i-d1-i2c",
"allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x2502400 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(10) 4>;
clocks = <&ccu 69>;
resets = <&ccu 25>;
dmas = <&dma 44>, <&dma 44>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c2: i2c@2502800 {
compatible = "allwinner,sun20i-d1-i2c",
"allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x2502800 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(11) 4>;
clocks = <&ccu 70>;
resets = <&ccu 26>;
dmas = <&dma 45>, <&dma 45>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c3: i2c@2502c00 {
compatible = "allwinner,sun20i-d1-i2c",
"allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x2502c00 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(12) 4>;
clocks = <&ccu 71>;
resets = <&ccu 27>;
dmas = <&dma 46>, <&dma 46>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
can0: can@2504000 {
compatible = "allwinner,sun20i-d1-can";
reg = <0x02504000 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(21) 4>;
clocks = <&ccu 145>;
resets = <&ccu 66>;
pinctrl-names = "default";
pinctrl-0 = <&can0_pins>;
status = "disabled";
};
can1: can@2504400 {
compatible = "allwinner,sun20i-d1-can";
reg = <0x02504400 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(22) 4>;
clocks = <&ccu 146>;
resets = <&ccu 67>;
pinctrl-names = "default";
pinctrl-0 = <&can1_pins>;
status = "disabled";
};
syscon: syscon@3000000 {
compatible = "allwinner,sun20i-d1-system-control";
reg = <0x3000000 0x1000>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
};
dma: dma-controller@3002000 {
compatible = "allwinner,sun20i-d1-dma";
reg = <0x3002000 0x1000>;
interrupts = <SOC_PERIPHERAL_IRQ(50) 4>;
clocks = <&ccu 37>, <&ccu 48>;
clock-names = "bus", "mbus";
resets = <&ccu 6>;
dma-channels = <16>;
dma-requests = <48>;
#dma-cells = <1>;
};
sid: efuse@3006000 {
compatible = "allwinner,sun20i-d1-sid";
reg = <0x3006000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
};
crypto: crypto@3040000 {
compatible = "allwinner,sun20i-d1-crypto";
reg = <0x3040000 0x800>;
interrupts = <SOC_PERIPHERAL_IRQ(52) 4>;
clocks = <&ccu 34>,
<&ccu 33>,
<&ccu 50>,
<&rtc 2>;
clock-names = "bus", "mod", "ram", "trng";
resets = <&ccu 4>;
};
mbus: dram-controller@3102000 {
compatible = "allwinner,sun20i-d1-mbus";
reg = <0x3102000 0x1000>,
<0x3103000 0x1000>;
reg-names = "mbus", "dram";
interrupts = <SOC_PERIPHERAL_IRQ(43) 4>;
clocks = <&ccu 26>,
<&ccu 47>,
<&ccu 55>;
clock-names = "mbus", "dram", "bus";
dma-ranges = <0 0x40000000 0x80000000>;
#address-cells = <1>;
#size-cells = <1>;
#interconnect-cells = <1>;
};
mmc0: mmc@4020000 {
compatible = "allwinner,sun20i-d1-mmc";
reg = <0x4020000 0x1000>;
interrupts = <SOC_PERIPHERAL_IRQ(40) 4>;
clocks = <&ccu 59>, <&ccu 56>;
clock-names = "ahb", "mmc";
resets = <&ccu 15>;
reset-names = "ahb";
cap-sd-highspeed;
max-frequency = <150000000>;
no-mmc;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
mmc1: mmc@4021000 {
compatible = "allwinner,sun20i-d1-mmc";
reg = <0x4021000 0x1000>;
interrupts = <SOC_PERIPHERAL_IRQ(41) 4>;
clocks = <&ccu 60>, <&ccu 57>;
clock-names = "ahb", "mmc";
resets = <&ccu 16>;
reset-names = "ahb";
cap-sd-highspeed;
max-frequency = <150000000>;
no-mmc;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
mmc2: mmc@4022000 {
compatible = "allwinner,sun20i-d1-emmc",
"allwinner,sun50i-a100-emmc";
reg = <0x4022000 0x1000>;
interrupts = <SOC_PERIPHERAL_IRQ(42) 4>;
clocks = <&ccu 61>, <&ccu 58>;
clock-names = "ahb", "mmc";
resets = <&ccu 17>;
reset-names = "ahb";
cap-mmc-highspeed;
max-frequency = <150000000>;
mmc-ddr-1_8v;
mmc-ddr-3_3v;
no-sd;
no-sdio;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi0: spi@4025000 {
compatible = "allwinner,sun20i-d1-spi",
"allwinner,sun50i-r329-spi";
reg = <0x04025000 0x1000>;
interrupts = <SOC_PERIPHERAL_IRQ(15) 4>;
clocks = <&ccu 74>, <&ccu 72>;
clock-names = "ahb", "mod";
dmas = <&dma 22>, <&dma 22>;
dma-names = "rx", "tx";
resets = <&ccu 28>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi1: spi@4026000 {
compatible = "allwinner,sun20i-d1-spi-dbi",
"allwinner,sun50i-r329-spi-dbi",
"allwinner,sun50i-r329-spi";
reg = <0x04026000 0x1000>;
interrupts = <SOC_PERIPHERAL_IRQ(16) 4>;
clocks = <&ccu 75>, <&ccu 73>;
clock-names = "ahb", "mod";
dmas = <&dma 23>, <&dma 23>;
dma-names = "rx", "tx";
resets = <&ccu 29>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
usb_otg: usb@4100000 {
compatible = "allwinner,sun20i-d1-musb",
"allwinner,sun8i-a33-musb";
reg = <0x4100000 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(29) 4>;
interrupt-names = "mc";
clocks = <&ccu 103>;
resets = <&ccu 46>;
extcon = <&usbphy 0>;
phys = <&usbphy 0>;
phy-names = "usb";
status = "disabled";
};
usbphy: phy@4100400 {
compatible = "allwinner,sun20i-d1-usb-phy";
reg = <0x4100400 0x100>,
<0x4101800 0x100>,
<0x4200800 0x100>;
reg-names = "phy_ctrl",
"pmu0",
"pmu1";
clocks = <&dcxo>,
<&dcxo>;
clock-names = "usb0_phy",
"usb1_phy";
resets = <&ccu 40>,
<&ccu 41>;
reset-names = "usb0_reset",
"usb1_reset";
status = "disabled";
#phy-cells = <1>;
};
ehci0: usb@4101000 {
compatible = "allwinner,sun20i-d1-ehci",
"generic-ehci";
reg = <0x4101000 0x100>;
interrupts = <SOC_PERIPHERAL_IRQ(30) 4>;
clocks = <&ccu 99>,
<&ccu 101>,
<&ccu 97>;
resets = <&ccu 42>,
<&ccu 44>;
phys = <&usbphy 0>;
phy-names = "usb";
status = "disabled";
};
ohci0: usb@4101400 {
compatible = "allwinner,sun20i-d1-ohci",
"generic-ohci";
reg = <0x4101400 0x100>;
interrupts = <SOC_PERIPHERAL_IRQ(31) 4>;
clocks = <&ccu 99>,
<&ccu 97>;
resets = <&ccu 42>;
phys = <&usbphy 0>;
phy-names = "usb";
status = "disabled";
};
ehci1: usb@4200000 {
compatible = "allwinner,sun20i-d1-ehci",
"generic-ehci";
reg = <0x4200000 0x100>;
interrupts = <SOC_PERIPHERAL_IRQ(33) 4>;
clocks = <&ccu 100>,
<&ccu 102>,
<&ccu 98>;
resets = <&ccu 43>,
<&ccu 45>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
ohci1: usb@4200400 {
compatible = "allwinner,sun20i-d1-ohci",
"generic-ohci";
reg = <0x4200400 0x100>;
interrupts = <SOC_PERIPHERAL_IRQ(34) 4>;
clocks = <&ccu 100>,
<&ccu 98>;
resets = <&ccu 43>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
emac: ethernet@4500000 {
compatible = "allwinner,sun20i-d1-emac",
"allwinner,sun50i-a64-emac";
reg = <0x4500000 0x10000>;
interrupts = <SOC_PERIPHERAL_IRQ(46) 4>;
interrupt-names = "macirq";
clocks = <&ccu 77>;
clock-names = "stmmaceth";
resets = <&ccu 30>;
reset-names = "stmmaceth";
syscon = <&syscon>;
status = "disabled";
mdio: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
};
display_clocks: clock-controller@5000000 {
compatible = "allwinner,sun20i-d1-de2-clk",
"allwinner,sun50i-h5-de2-clk";
reg = <0x5000000 0x10000>;
clocks = <&ccu 28>, <&ccu 27>;
clock-names = "bus", "mod";
resets = <&ccu 1>;
#clock-cells = <1>;
#reset-cells = <1>;
};
mixer0: mixer@5100000 {
compatible = "allwinner,sun20i-d1-de2-mixer-0";
reg = <0x5100000 0x100000>;
clocks = <&display_clocks 0>,
<&display_clocks 6>;
clock-names = "bus", "mod";
resets = <&display_clocks 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
mixer0_out: port@1 {
reg = <1>;
mixer0_out_tcon_top_mixer0: endpoint {
remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
};
};
};
};
mixer1: mixer@5200000 {
compatible = "allwinner,sun20i-d1-de2-mixer-1";
reg = <0x5200000 0x100000>;
clocks = <&display_clocks 1>,
<&display_clocks 7>;
clock-names = "bus", "mod";
resets = <&display_clocks 1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
mixer1_out: port@1 {
reg = <1>;
mixer1_out_tcon_top_mixer1: endpoint {
remote-endpoint = <&tcon_top_mixer1_in_mixer1>;
};
};
};
};
dsi: dsi@5450000 {
compatible = "allwinner,sun20i-d1-mipi-dsi",
"allwinner,sun50i-a100-mipi-dsi";
reg = <0x5450000 0x1000>;
interrupts = <SOC_PERIPHERAL_IRQ(92) 4>;
clocks = <&ccu 111>,
<&tcon_top 2>;
clock-names = "bus", "mod";
resets = <&ccu 51>;
phys = <&dphy>;
phy-names = "dphy";
status = "disabled";
port {
dsi_in_tcon_lcd0: endpoint {
remote-endpoint = <&tcon_lcd0_out_dsi>;
};
};
};
dphy: phy@5451000 {
compatible = "allwinner,sun20i-d1-mipi-dphy",
"allwinner,sun50i-a100-mipi-dphy";
reg = <0x5451000 0x1000>;
interrupts = <SOC_PERIPHERAL_IRQ(92) 4>;
clocks = <&ccu 111>,
<&ccu 110>;
clock-names = "bus", "mod";
resets = <&ccu 51>;
#phy-cells = <0>;
};
tcon_top: tcon-top@5460000 {
compatible = "allwinner,sun20i-d1-tcon-top";
reg = <0x5460000 0x1000>;
clocks = <&ccu 105>,
<&ccu 114>,
<&ccu 116>,
<&ccu 112>;
clock-names = "bus", "tcon-tv0", "tve0", "dsi";
clock-output-names = "tcon-top-tv0", "tcon-top-dsi";
resets = <&ccu 48>;
#clock-cells = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon_top_mixer0_in: port@0 {
reg = <0>;
tcon_top_mixer0_in_mixer0: endpoint {
remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
};
};
tcon_top_mixer0_out: port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
tcon_top_mixer0_out_tcon_lcd0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer0>;
};
tcon_top_mixer0_out_tcon_tv0: endpoint@2 {
reg = <2>;
remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>;
};
};
tcon_top_mixer1_in: port@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
tcon_top_mixer1_in_mixer1: endpoint@1 {
reg = <1>;
remote-endpoint = <&mixer1_out_tcon_top_mixer1>;
};
};
tcon_top_mixer1_out: port@3 {
reg = <3>;
#address-cells = <1>;
#size-cells = <0>;
tcon_top_mixer1_out_tcon_lcd0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer1>;
};
tcon_top_mixer1_out_tcon_tv0: endpoint@2 {
reg = <2>;
remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>;
};
};
tcon_top_hdmi_in: port@4 {
reg = <4>;
tcon_top_hdmi_in_tcon_tv0: endpoint {
remote-endpoint = <&tcon_tv0_out_tcon_top_hdmi>;
};
};
tcon_top_hdmi_out: port@5 {
reg = <5>;
};
};
};
tcon_lcd0: lcd-controller@5461000 {
compatible = "allwinner,sun20i-d1-tcon-lcd";
reg = <0x5461000 0x1000>;
interrupts = <SOC_PERIPHERAL_IRQ(90) 4>;
clocks = <&ccu 113>,
<&ccu 112>;
clock-names = "ahb", "tcon-ch0";
clock-output-names = "tcon-pixel-clock";
resets = <&ccu 52>,
<&ccu 54>;
reset-names = "lcd", "lvds";
#clock-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon_lcd0_in: port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
tcon_lcd0_in_tcon_top_mixer0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon_top_mixer0_out_tcon_lcd0>;
};
tcon_lcd0_in_tcon_top_mixer1: endpoint@1 {
reg = <1>;
remote-endpoint = <&tcon_top_mixer1_out_tcon_lcd0>;
};
};
tcon_lcd0_out: port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
tcon_lcd0_out_dsi: endpoint@1 {
reg = <1>;
remote-endpoint = <&dsi_in_tcon_lcd0>;
};
};
};
};
tcon_tv0: lcd-controller@5470000 {
compatible = "allwinner,sun20i-d1-tcon-tv";
reg = <0x5470000 0x1000>;
interrupts = <SOC_PERIPHERAL_IRQ(91) 4>;
clocks = <&ccu 115>,
<&tcon_top 0>;
clock-names = "ahb", "tcon-ch1";
resets = <&ccu 53>;
reset-names = "lcd";
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon_tv0_in: port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
tcon_tv0_in_tcon_top_mixer0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>;
};
tcon_tv0_in_tcon_top_mixer1: endpoint@1 {
reg = <1>;
remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>;
};
};
tcon_tv0_out: port@1 {
reg = <1>;
tcon_tv0_out_tcon_top_hdmi: endpoint {
remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>;
};
};
};
};
ppu: power-controller@7001000 {
compatible = "allwinner,sun20i-d1-ppu";
reg = <0x7001000 0x1000>;
clocks = <&r_ccu 4>;
resets = <&r_ccu 2>;
#power-domain-cells = <1>;
};
r_ccu: clock-controller@7010000 {
compatible = "allwinner,sun20i-d1-r-ccu";
reg = <0x7010000 0x400>;
clocks = <&dcxo>,
<&rtc 0>,
<&rtc 2>,
<&ccu 6>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <1>;
#reset-cells = <1>;
};
rtc: rtc@7090000 {
compatible = "allwinner,sun20i-d1-rtc",
"allwinner,sun50i-r329-rtc";
reg = <0x7090000 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(144) 4>;
clocks = <&r_ccu 7>,
<&dcxo>,
<&r_ccu 0>;
clock-names = "bus", "hosc", "ahb";
#clock-cells = <1>;
};
};
};

View File

@@ -1,90 +0,0 @@
Pinmux settings per pin
Format: pin (name): mux_owner|gpio_owner (strict) hog?
pin 32 (PB0): device 2502800.i2c function i2c2 group PB0
pin 33 (PB1): device 2502800.i2c function i2c2 group PB1
pin 34 (PB2): UNCLAIMED
pin 35 (PB3): UNCLAIMED
pin 36 (PB4): UNCLAIMED
pin 37 (PB5): UNCLAIMED
pin 38 (PB6): UNCLAIMED
pin 39 (PB7): UNCLAIMED
pin 40 (PB8): device 2500000.serial function uart0 group PB8
pin 41 (PB9): device 2500000.serial function uart0 group PB9
pin 42 (PB10): UNCLAIMED
pin 43 (PB11): UNCLAIMED
pin 44 (PB12): UNCLAIMED
pin 64 (PC0): device 2008000.led-controller function ledc group PC0
pin 65 (PC1): UNCLAIMED
pin 66 (PC2): device 4025000.spi function spi0 group PC2
pin 67 (PC3): device 4025000.spi function spi0 group PC3
pin 68 (PC4): device 4025000.spi function spi0 group PC4
pin 69 (PC5): device 4025000.spi function spi0 group PC5
pin 70 (PC6): device 4025000.spi function spi0 group PC6
pin 71 (PC7): device 4025000.spi function spi0 group PC7
pin 96 (PD0): UNCLAIMED
pin 97 (PD1): UNCLAIMED
pin 98 (PD2): UNCLAIMED
pin 99 (PD3): UNCLAIMED
pin 100 (PD4): UNCLAIMED
pin 101 (PD5): UNCLAIMED
pin 102 (PD6): UNCLAIMED
pin 103 (PD7): UNCLAIMED
pin 104 (PD8): UNCLAIMED
pin 105 (PD9): UNCLAIMED
pin 106 (PD10): device 4026000.spi function spi1 group PD10
pin 107 (PD11): device 4026000.spi function spi1 group PD11
pin 108 (PD12): device 4026000.spi function spi1 group PD12
pin 109 (PD13): device 4026000.spi function spi1 group PD13
pin 110 (PD14): device 4026000.spi function spi1 group PD14
pin 111 (PD15): device 4026000.spi function spi1 group PD15
pin 112 (PD16): device 2000c00.pwm function pwm0 group PD16
pin 113 (PD17): UNCLAIMED
pin 114 (PD18): UNCLAIMED
pin 115 (PD19): GPIO 2000000.pinctrl:115
pin 116 (PD20): GPIO 2000000.pinctrl:116
pin 117 (PD21): GPIO 2000000.pinctrl:117
pin 118 (PD22): UNCLAIMED
pin 128 (PE0): UNCLAIMED
pin 129 (PE1): UNCLAIMED
pin 130 (PE2): UNCLAIMED
pin 131 (PE3): UNCLAIMED
pin 132 (PE4): UNCLAIMED
pin 133 (PE5): UNCLAIMED
pin 134 (PE6): UNCLAIMED
pin 135 (PE7): UNCLAIMED
pin 136 (PE8): UNCLAIMED
pin 137 (PE9): UNCLAIMED
pin 138 (PE10): UNCLAIMED
pin 139 (PE11): UNCLAIMED
pin 140 (PE12): UNCLAIMED
pin 141 (PE13): UNCLAIMED
pin 142 (PE14): UNCLAIMED
pin 143 (PE15): UNCLAIMED
pin 144 (PE16): UNCLAIMED
pin 145 (PE17): UNCLAIMED
pin 160 (PF0): device 4020000.mmc function mmc0 group PF0
pin 161 (PF1): device 4020000.mmc function mmc0 group PF1
pin 162 (PF2): device 4020000.mmc function mmc0 group PF2
pin 163 (PF3): device 4020000.mmc function mmc0 group PF3
pin 164 (PF4): device 4020000.mmc function mmc0 group PF4
pin 165 (PF5): device 4020000.mmc function mmc0 group PF5
pin 166 (PF6): GPIO 2000000.pinctrl:166
pin 192 (PG0): device 4021000.mmc function mmc1 group PG0
pin 193 (PG1): device 4021000.mmc function mmc1 group PG1
pin 194 (PG2): device 4021000.mmc function mmc1 group PG2
pin 195 (PG3): device 4021000.mmc function mmc1 group PG3
pin 196 (PG4): device 4021000.mmc function mmc1 group PG4
pin 197 (PG5): device 4021000.mmc function mmc1 group PG5
pin 198 (PG6): device 2500400.serial function uart1 group PG6
pin 199 (PG7): device 2500400.serial function uart1 group PG7
pin 200 (PG8): device 2500400.serial function uart1 group PG8
pin 201 (PG9): device 2500400.serial function uart1 group PG9
pin 202 (PG10): UNCLAIMED
pin 203 (PG11): UNCLAIMED
pin 204 (PG12): GPIO 2000000.pinctrl:204
pin 205 (PG13): UNCLAIMED
pin 206 (PG14): UNCLAIMED
pin 207 (PG15): UNCLAIMED
pin 208 (PG16): UNCLAIMED
pin 209 (PG17): UNCLAIMED
pin 210 (PG18): UNCLAIMED

View File

@@ -1,224 +0,0 @@
pin: 0, PA0, input
pin: 1, PA1, input
pin: 2, PA2, input
pin: 3, PA3, input
pin: 4, PA4, input
pin: 5, PA5, input
pin: 6, PA6, input
pin: 7, PA7, input
pin: 8, PA8, input
pin: 9, PA9, input
pin: 10, PA10, input
pin: 11, PA11, input
pin: 12, PA12, input
pin: 13, PA13, input
pin: 14, PA14, input
pin: 15, PA15, input
pin: 16, PA16, input
pin: 17, PA17, input
pin: 18, PA18, input
pin: 19, PA19, input
pin: 20, PA20, input
pin: 21, PA21, input
pin: 22, PA22, input
pin: 23, PA23, input
pin: 24, PA24, input
pin: 25, PA25, input
pin: 26, PA26, input
pin: 27, PA27, input
pin: 28, PA28, input
pin: 29, PA29, input
pin: 30, PA30, input
pin: 31, PA31, input
pin: 32, PB0, input, name: pin5 [gpio2/twi2-sck], used by: kernel
pin: 33, PB1, input, name: pin3 [gpio1/twi2-sda], used by: kernel
pin: 34, PB2, input
pin: 35, PB3, input, name: pin38 [gpio24/i2s2-din]
pin: 36, PB4, input, name: pin40 [gpio25/i2s2-dout]
pin: 37, PB5, input, name: pin12 [gpio7/i2s-clk]
pin: 38, PB6, input, name: pin35 [gpio22/i2s2-lrck]
pin: 39, PB7, input
pin: 40, PB8, input, name: pin8 [gpio4/uart0-txd], used by: kernel
pin: 41, PB9, input, name: pin10 [gpio5/uart0-rxd], used by: kernel
pin: 42, PB10, input
pin: 43, PB11, input
pin: 44, PB12, input, name: pin15 [gpio9]
pin: 45, PB13, input
pin: 46, PB14, input
pin: 47, PB15, input
pin: 48, PB16, input
pin: 49, PB17, input
pin: 50, PB18, input
pin: 51, PB19, input
pin: 52, PB20, input
pin: 53, PB21, input
pin: 54, PB22, input
pin: 55, PB23, input
pin: 56, PB24, input
pin: 57, PB25, input
pin: 58, PB26, input
pin: 59, PB27, input
pin: 60, PB28, input
pin: 61, PB29, input
pin: 62, PB30, input
pin: 63, PB31, input
pin: 64, PC0, input, used by: kernel
pin: 65, PC1, input
pin: 66, PC2, input, name: pin31 [gpio21], used by: kernel
pin: 67, PC3, input, used by: kernel
pin: 68, PC4, input, used by: kernel
pin: 69, PC5, input, used by: kernel
pin: 70, PC6, input, used by: kernel
pin: 71, PC7, input, used by: kernel
pin: 72, PC8, input
pin: 73, PC9, input
pin: 74, PC10, input
pin: 75, PC11, input
pin: 76, PC12, input
pin: 77, PC13, input
pin: 78, PC14, input
pin: 79, PC15, input
pin: 80, PC16, input
pin: 81, PC17, input
pin: 82, PC18, input
pin: 83, PC19, input
pin: 84, PC20, input
pin: 85, PC21, input
pin: 86, PC22, input
pin: 87, PC23, input
pin: 88, PC24, input
pin: 89, PC25, input
pin: 90, PC26, input
pin: 91, PC27, input
pin: 92, PC28, input
pin: 93, PC29, input
pin: 94, PC30, input
pin: 95, PC31, input
pin: 96, PD0, input
pin: 97, PD1, input
pin: 98, PD2, input
pin: 99, PD3, input
pin: 100, PD4, input
pin: 101, PD5, input
pin: 102, PD6, input
pin: 103, PD7, input
pin: 104, PD8, input
pin: 105, PD9, input
pin: 106, PD10, input, used by: kernel
pin: 107, PD11, input, name: pin24 [gpio16/spi1-ce0], used by: kernel
pin: 108, PD12, input, name: pin23 [gpio15/spi1-clk], used by: kernel
pin: 109, PD13, input, name: pin19 [gpio12/spi1-mosi], used by: kernel
pin: 110, PD14, input, name: pin21 [gpio13/spi1-miso], used by: kernel
pin: 111, PD15, input, name: pin27 [gpio18/spi1-hold], used by: kernel
pin: 112, PD16, input, name: pin29 [gpio20/spi1-wp], used by: kernel
pin: 113, PD17, input
pin: 114, PD18, input
pin: 115, PD19, output, used by: usbvbus
pin: 116, PD20, input, used by: usb0_vbus_det
pin: 117, PD21, input, used by: usb0_id_det
pin: 118, PD22, input
pin: 119, PD23, input, name: pin7 [gpio3/pwm]
pin: 120, PD24, input
pin: 121, PD25, input
pin: 122, PD26, input
pin: 123, PD27, input
pin: 124, PD28, input
pin: 125, PD29, input
pin: 126, PD30, input
pin: 127, PD31, input
pin: 128, PE0, input
pin: 129, PE1, input
pin: 130, PE2, input
pin: 131, PE3, input
pin: 132, PE4, input
pin: 133, PE5, input
pin: 134, PE6, input
pin: 135, PE7, input
pin: 136, PE8, input
pin: 137, PE9, input
pin: 138, PE10, input
pin: 139, PE11, input
pin: 140, PE12, input
pin: 141, PE13, input
pin: 142, PE14, input
pin: 143, PE15, input
pin: 144, PE16, input
pin: 145, PE17, input
pin: 146, PE18, input
pin: 147, PE19, input
pin: 148, PE20, input
pin: 149, PE21, input
pin: 150, PE22, input
pin: 151, PE23, input
pin: 152, PE24, input
pin: 153, PE25, input
pin: 154, PE26, input
pin: 155, PE27, input
pin: 156, PE28, input
pin: 157, PE29, input
pin: 158, PE30, input
pin: 159, PE31, input
pin: 160, PF0, input, used by: kernel
pin: 161, PF1, input, used by: kernel
pin: 162, PF2, input, used by: kernel
pin: 163, PF3, input, used by: kernel
pin: 164, PF4, input, used by: kernel
pin: 165, PF5, input, used by: kernel
pin: 166, PF6, input, used by: cd
pin: 167, PF7, input
pin: 168, PF8, input
pin: 169, PF9, input
pin: 170, PF10, input
pin: 171, PF11, input
pin: 172, PF12, input
pin: 173, PF13, input
pin: 174, PF14, input
pin: 175, PF15, input
pin: 176, PF16, input
pin: 177, PF17, input
pin: 178, PF18, input
pin: 179, PF19, input
pin: 180, PF20, input
pin: 181, PF21, input
pin: 182, PF22, input
pin: 183, PF23, input
pin: 184, PF24, input
pin: 185, PF25, input
pin: 186, PF26, input
pin: 187, PF27, input
pin: 188, PF28, input
pin: 189, PF29, input
pin: 190, PF30, input
pin: 191, PF31, input
pin: 192, PG0, input, used by: kernel
pin: 193, PG1, input, used by: kernel
pin: 194, PG2, input, used by: kernel
pin: 195, PG3, input, used by: kernel
pin: 196, PG4, input, used by: kernel
pin: 197, PG5, input, used by: kernel
pin: 198, PG6, input, used by: kernel
pin: 199, PG7, input, used by: kernel
pin: 200, PG8, input, used by: kernel
pin: 201, PG9, input, used by: kernel
pin: 202, PG10, input
pin: 203, PG11, input
pin: 204, PG12, output, used by: reset
pin: 205, PG13, input
pin: 206, PG14, input
pin: 207, PG15, input
pin: 208, PG16, input
pin: 209, PG17, input
pin: 210, PG18, input
pin: 211, PG19, input
pin: 212, PG20, input
pin: 213, PG21, input
pin: 214, PG22, input
pin: 215, PG23, input
pin: 216, PG24, input
pin: 217, PG25, input
pin: 218, PG26, input
pin: 219, PG27, input
pin: 220, PG28, input
pin: 221, PG29, input
pin: 222, PG30, input
pin: 223, PG31, input