79889 Commits

Author SHA1 Message Date
Samuel Holland
afc07cec42 sunxi: Work around lack of Linux MBUS driver
Signed-off-by: Samuel Holland <samuel@sholland.org>
d1-2022-05-26
2022-05-26 22:26:00 -05:00
Cezary Sobczak
2c4589c563 sun20i: set CONFIG_SYS_BOOTM_LEN for RISC-V
If this value is not increased, the error occurs during loading
uncompressed kernel from fitImage:
"Error: inflate() returned -5
Image too large: increase CONFIG_SYS_BOOTM_LEN"

Signed-off-by: Cezary Sobczak <cezary.sobczak@3mdeb.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-26 22:26:00 -05:00
Samuel Holland
fe5085b463 sunxi: Use sunxi-common.h for D1 port
This shows the changes needed to sunxi-common.h, so it makes upstreaming
a little bit easier.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-26 22:26:00 -05:00
Samuel Holland
a1bf6bb614 sunxi: Add a U-Boot port for the Lichee RV 86 Panel
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-26 22:26:00 -05:00
Jisheng Zhang
9f9ee4816a sunxi: Add a U-Boot port for the Lichee RV and its dock
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
[Samuel: licheepi -> lichee; drop DRAM size; other changes]
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-26 22:26:00 -05:00
TekkamanV
e3a2628d25 riscv64: update nezha_defconfig for development/testing
Signed-off-by: TekkamanV <tekkamanv@163.com>
[Samuel: Kept default prompt, trimmed things to stay under 1 MiB]
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-26 22:26:00 -05:00
TekkamanV
e71381530b sun20i: Add some variables to the default environment
Signed-off-by: TekkamanV <tekkamanv@163.com>
[Samuel: Only kept the non-Fedora-specific subset of changes]
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-26 22:26:00 -05:00
Samuel Holland
09e4ce4e25 sunxi: Add a U-Boot port for the Allwinner D1 Nezha
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-26 22:25:59 -05:00
Samuel Holland
69101a16e8 sunxi: Convert some Kconfig defaults to implies
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:04:04 -05:00
Samuel Holland
75207ede77 board: riscv: Sort target configs alphabetically
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:04:04 -05:00
Samuel Holland
45f2d10154 riscv: cpu: Add cache operations for T-HEAD CPUs
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:04:04 -05:00
Samuel Holland
aaa79d79c3 usb: musb-new: Hack up the driver for the D1
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:04:04 -05:00
Samuel Holland
38cf2637b2 [BROKEN] spi: sunxi: Add support for the D1
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:04:04 -05:00
Samuel Holland
9adaadd1a1 spi: sunxi: Hack up the driver for the D1
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:04:04 -05:00
Samuel Holland
ec769db776 pinctrl: sunxi: Hack up the driver for the D1
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:04:04 -05:00
Samuel Holland
aa27bb201b pinctrl: sunxi: Add support for the D1
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:04:04 -05:00
Samuel Holland
60dd27bcc8 phy: sun4i-usb: Add support for the D1
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:04:04 -05:00
Samuel Holland
a81373a77d phy: sun4i-usb: Hack up the driver for the D1
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:04:04 -05:00
Andre Przywara
15f52babc9 phy: sun4i-usb: Rework HCI PHY (aka. "pmu_unk1") handling
As Icenowy pointed out, newer manuals (starting with H6) actually
document the register block at offset 0x800 as "HCI controller and PHY
interface", also describe the bits in our "PMU_UNK1" register.
Let's put proper names to those "unknown" variables and symbols.

While we are at it, generalise the existing code by allowing a bitmap
of bits to clear and set, to cover newer SoCs: The A100 and H616 use a
different bit for the SIDDQ control.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:04:04 -05:00
Samuel Holland
d8d52c48b9 net: sun8i-emac: Downgrade printf in probe to debug
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:04:03 -05:00
Samuel Holland
06522d448e net: sun8i_emac: Hack up the driver for the D1
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:01:54 -05:00
Samuel Holland
98333eb77f mmc: sunxi: Hack up the driver for the D1
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:01:54 -05:00
Samuel Holland
ae77de6048 gpio: sunxi: Hack up the driver for the D1
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 23:01:53 -05:00
Samuel Holland
01b80d6166 Merge branch 'patch/a33-tablet-dts' into allwinner 2022-05-25 22:52:21 -05:00
Samuel Holland
e608887e69 Merge branch 'patch/axp-gpio' into allwinner 2022-05-25 22:52:19 -05:00
Samuel Holland
28ab59492e Merge branch 'patch/axp-vbus' into allwinner 2022-05-25 22:52:17 -05:00
Samuel Holland
83456cc1ad Merge branch 'patch/clk-support' into allwinner 2022-05-25 22:52:13 -05:00
Samuel Holland
22e47962d4 Merge branch 'patch/dt-sync' into allwinner 2022-05-25 22:52:09 -05:00
Samuel Holland
535d476ed8 Merge branch 'patch/gpio-spl-fix' into allwinner 2022-05-25 22:52:08 -05:00
Samuel Holland
d0e956e3ce Merge branch 'patch/h3-scp' into allwinner 2022-05-25 22:52:04 -05:00
Samuel Holland
5156f612f4 Merge branch 'patch/h6-dts' into allwinner 2022-05-25 22:52:02 -05:00
Samuel Holland
e82102a5b1 Merge branch 'patch/mkimage-toc1' into allwinner 2022-05-25 22:52:00 -05:00
Samuel Holland
d5173c07ea Merge branch 'patch/musb-charging' into allwinner 2022-05-25 22:51:58 -05:00
Samuel Holland
4e23083b98 Merge branch 'patch/nand-dm' into allwinner 2022-05-25 22:51:56 -05:00
Samuel Holland
23a5b617c4 Adapt iNet U70B REV01 for development (FEL + serial)
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:51:28 -05:00
Samuel Holland
a2f36d53cc sunxi: Add iNet_U70B_rev1_defconfig
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:50:55 -05:00
Samuel Holland
f43454b613 ARM: dts: sun8i: A33: Add iNet U70B REV01
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:50:54 -05:00
Samuel Holland
39f25027cc mtd: nand: sunxi: Pass the device to the init function
This more closely matches the driver to the Linux version.

Series-to: sunxi

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:46:15 -05:00
Samuel Holland
2d99cb9a6a mtd: nand: sunxi: Convert to the driver model
Clocks, resets, and pinmuxes are now handled by the driver model, so the
only thing the "board" code needs to do is load the driver. This matches
the pattern used by other DM raw NAND drivers (there is no NAND uclass).

The actual board code is now only needed in SPL.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:41:39 -05:00
Samuel Holland
a8395a0415 mtd: nand: sunxi: Convert from fdtdec to ofnode
As a first step toward converting this driver to the driver model, use
the ofnode abstraction to replace direct references to the FDT blob.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:41:07 -05:00
Samuel Holland
8c48e40c20 mtd: nand: sunxi: Remove an unnecessary check
Each chip is required to have a unique CS number ("reg" property) in the
range 0-7, so there is no need to separately count the number of chips.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:41:02 -05:00
Samuel Holland
0acff93abb pinctrl: sunxi: Add NAND pinmuxes
NAND is always at function 2 on port C.

Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:40:24 -05:00
Samuel Holland
6d76a27ced clk: sunxi: Add NAND clocks and resets
Currently NAND clock setup is done in board code, both in SPL and in
U-Boot proper. Add the NAND clocks/resets here so they can be used by
the "full" NAND driver once it is converted to the driver model.

The bit locations are copied from the Linux CCU drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:40:13 -05:00
Samuel Holland
794bc95ccf gpio: axp: Add pull-down support for AXP22x/AXP8xx variant
The AXP221 and newer PMICs support a pull-down function on their GPIOs.
Add support for it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:36:04 -05:00
Samuel Holland
02392f7482 gpio: axp: Add support for getting the pin function
Implement the .get_function operation, so the gpio command can report
the current function. Since the GPIOF_FUNC (versus GPIOF_UNUSED) mux
values vary among the PMICs, report all non-GPIO mux values as UNKNOWN.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:36:04 -05:00
Samuel Holland
f8b1d4fcb6 gpio: axp: Select variant from compatible at runtime
There are three major variants of the AXP PMIC GPIO functionality (plus
PMICs with no GPIOs at all). Except for GPIO3 on the AXP209, which uses
a different register layout, it is straightforward to support all three
variants with a single driver. Do this, and in the process remove the
GPIO-related definitions from the PMIC-specific headers, and therefore
the dependency on AXP_PMIC_BUS.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:36:04 -05:00
Samuel Holland
05552f2ef0 gpio: axp: Use DM_PMIC functions for register access
Now that the PMIC driver implements the DM_PMIC uclass, those functions
can be used instead of the platform-specific "pmic_bus" functions.

Since the driver still uses the single set of register definitions from
axpXXX.h (as selected by AXPxxx_POWER), it still depends on one of those
choices, and therefore also AXP_PMIC_BUS.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:36:04 -05:00
Samuel Holland
6e46bf87dd gpio: axp: Bind via device tree
Now that the PMIC has a DM driver and binds device tree subnodes, the
GPIO device can be bound that way, instead of from inside board code.

Since the driver still uses the single set of register definitions from
axpXXX.h (as selected by AXPxxx_POWER), it does not differentiate among
the supported compatibles.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:36:04 -05:00
Samuel Holland
b1f8206841 gpio: axp: Consistently use the "axp_gpio" order
This is less confusing than half of the driver using "axp_gpio" and the
other half using "gpio_axp".

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:36:04 -05:00
Samuel Holland
1c9b8a9003 ARM: dts: sunxi: Add AXP221 and AXP809 GPIO nodes
These PMICs each have two GPIO pins, and are supported by the axp_gpio
driver. In order to convert the axp_gpio driver to probe using the
device tree, the corresponding device tree nodes must be present. Add
them, following the same binding as the AXP209 and AXP813.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-25 22:36:04 -05:00