This ensures the same environment layout will be used across all sunxi
boards, regardless of CPU architecture.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This excludes options that are inherently ARM-specific or are specific
to legacy non-DM drivers.
Some help text is cleaned up along the way.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This will provide a default value for RISC-V when that is added, and it
makes sense to put this option next to the other DRAM layout options.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This provides a default value for RISC-V when that is added, and it
makes sense to put this option next to the other DRAM layout options.
While at it, provide sensible values for platforms with less DRAM.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This provides a default value for RISC-V when that is added, and it
makes sense to put this option next to the other DRAM layout options.
While at it, provide sensible values for platforms with less DRAM.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Update this option to be based on SUNXI_MINIMUM_DRAM_MB. This corrects
the value used on V3s, which previously was the MACH_SUN8I default, and
so relied on addresses wrapping modulo the DRAM size.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This option affects the ABI between SPL/U-Boot and U-Boot/scripts, so it
should not normally be changed by the user.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This keeps all of the defaults for sunxi platforms in one place. Most of
these only depend on architecture-independent features of the SoC (clock
tree or SRAM layout) anyway.
No functional change; just some minor help text cleanup.
Signed-off-by: Samuel Holland <samuel@sholland.org>
While not especially likely, it is plausible that someone wants to build
U-Boot without GPIO or UART support. Don't force building these drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This was already supported by every machine type. It is unlikely that
any new SoC support will be added without SPL support.
Signed-off-by: Samuel Holland <samuel@sholland.org>
To maintain consistent behavior across architectures, most of the
options selected by ARCH_SUNXI should be selected for the D1 SoC as
well. To accomplish this, select them from BOARD_SUNXI instead.
No functional change here. Lines are only moved and alphabetized.
Signed-off-by: Samuel Holland <samuel@sholland.org>
With the introduction of the Allwinner D1, the sunxi board family now
spans multiple architectures (ARM and RISC-V). Since ARCH_SUNXI depends
on ARM, it cannot be used to gate architecture-independent options.
Specifically, this means the board Kconfig file cannot be sourced from
inside the "if ARCH_SUNXI" block.
Introduce a new BOARD_SUNXI symbol that can be selected by both
ARCH_SUNXI now and the new RISC-V SoC symbols when they are added, and
use it to gate the architecture-independent board options.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Some of the selected symbols have a user-visible dependency. Make the
selections conditional on that dependency to avoid creating invalid
configurations.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Two of these selections are redundant and have no effect:
- DM_KEYBOARD is selected by USB_KEYBOARD
- DM_MMC is selected by MMC
This selection has no effect by default and is unnecessarily strong:
- USB_STORAGE is implied by DISTRO_DEFAULTS
Signed-off-by: Samuel Holland <samuel@sholland.org>
We tried to enable USB_EHCI_GENERIC and USB_OHCI_GENERIC by default.
This did not work because those symbols depend on USB_EHCI_HCD and
USB_OHCI_HCD, which were not enabled. Fix this by implying all four.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Implement the .get_function operation, so the gpio command can report
the current function. Since the GPIOF_FUNC (versus GPIOF_UNUSED) mux
values vary among the PMICs, report all non-GPIO mux values as UNKNOWN.
Signed-off-by: Samuel Holland <samuel@sholland.org>
There are three major variants of the AXP PMIC GPIO functionality (plus
PMICs with no GPIOs at all). Except for GPIO3 on the AXP209, which uses
a different register layout, it is straightforward to support all three
variants with a single driver. Do this, and in the process remove the
GPIO-related definitions from the PMIC-specific headers, and therefore
the dependency on AXP_PMIC_BUS.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that the PMIC driver implements the DM_PMIC uclass, those functions
can be used instead of the platform-specific "pmic_bus" functions.
Since the driver still uses the single set of register definitions from
axpXXX.h (as selected by AXPxxx_POWER), it still depends on one of those
choices, and therefore also AXP_PMIC_BUS.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that the PMIC has a DM driver and binds device tree subnodes, the
GPIO device can be bound that way, instead of from inside board code.
Since the driver still uses the single set of register definitions from
axpXXX.h (as selected by AXPxxx_POWER), it does not differentiate among
the supported compatibles.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This is less confusing than half of the driver using "axp_gpio" and the
other half using "gpio_axp".
Signed-off-by: Samuel Holland <samuel@sholland.org>
These PMICs each have two GPIO pins, and are supported by the axp_gpio
driver. In order to convert the axp_gpio driver to probe using the
device tree, the corresponding device tree nodes must be present. Add
them, following the same binding as the AXP209 and AXP813.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that the sunxi_gpio driver handles pull-up/down via the driver
model, we can switch to DM_GPIO for these pins with no loss in
functionality. Since the driver now gets its pin configuration from
the device tree, we can remove the Kconfig symbols.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This adds a new PSCI implementation which communicates with SCP firmware
running on the AR100 using the SCPI protocol. This allows it to support
the full set of PSCI v1.1 features, including CPU idle states, system
suspend, and multiple reset methods.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Add the new option, function IDs, and prototypes for PSCI v1.1
implementations. In the process, fix some issues with the existing
definitions:
- Fix the incorrectly-named ARM_PSCI_0_2_FN64_SYSTEM_RESET2.
- Replace the deprecated "affinity_level" naming with "power_level".
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that issues with the BROM have been sorted out, we can implement
PSCI system suspend on H3 by delegating to SCP firmware. Let's start by
including the firmware in the FIT image and starting the coprocessor if
valid firmware is loaded.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Due to a bug in the H3 SoC, where the CPU 0 hotplug flag cannot be
written, resuming CPU 0 requires using the "Super Standby" code path in
the BROM instead of the hotplug path. This path requires jumping to an
eGON image in SRAM.
Add support to the build system to generate this eGON image and include
it in the FIT, and add code to direct the BROM to its location in SRAM.
Since the Super Standby code path in the BROM initializes the CPU and
AHB1 clocks to 24 MHz, those registers need to be restored after control
passes back to U-Boot. Furthermore, because the BROM lowers the AHB1
clock divider to /1 before switching to the lower-frequency parent,
PLL_PERIPH0 must be bypassed to prevent AHB1 from temporarily running at
600 MHz. Otherwise, this locks up the SoC.
Signed-off-by: Samuel Holland <samuel@sholland.org>
The struct is only used to overlay the MMIO region, so the behavior is
the same. This obsoletes the Kconfig option for the number of ports.
Series-to: Marek Vasut <marex@denx.de> (maintainer:USB)
Series-to: u-boot@lists.denx.de (open list)
Signed-off-by: Samuel Holland <samuel@sholland.org>
The code for these two options depends on having the FIT loadables
recorded in the FDT. Thus, these options require the full version of
the SPL_LOAD_FIT code.
Series-to: u-boot@lists.denx.de
Series-cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
With one exception (sun9i), all sunxi SoCs released to date use variants
of the same USB PHY. Instead of requiring each new SoC to duplicate the
PHY driver selection, enable it by default.
Series-to: Andre Przywara <andre.przywara@arm.com>
Series-to: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
This more closely matches the U-Boot driver to the Linux version.
Series-to: sunxi
Cover-letter:
mtd: nand: sunxi: Convert to devicetree and the driver model
This series converts the sunxi NAND driver to get its resources (clocks,
resets, pins) from the devicetree, and probe using the driver model.
In addition to the immediate cleanup, this allows backporting more
patches (bugfixes, newer SoC support) from the Linux driver.
END
Signed-off-by: Samuel Holland <samuel@sholland.org>
It is possible to use host-side USB with externally-provided VBUS. For
example, some USB OTG cables have an extra power input which powers
both the board and the USB peripheral.
To support this setup, skip enabling the VBUS switch/regulator if VBUS
voltage is already present. This behavior matches the Linux PHY driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
TOC1 is an container format used by Allwinner's boot0 that can hold
multiple images. It supports encryption and signatures, but that
functionality is not implemented, only the basic "non-secure" subset.
A config file is used to provide the list of data files to include. Its
path is passed as the argument to "-d". It contains sections of the
following form:
[name]
file = /path/to/file
addr = 0x12345678
Specific well-known names, such as "dtb", "opensbi", and "u-boot", are
used by the bootloader to distinguish the items inside the image.
Cover-letter:
tools: mkimage: Add Allwinner TOC1 support
The SPL port for the Allwinner D1 RISC-V SoC will probably take a while
longer than porting U-Boot proper, as none of the relevant drivers are
set up for DM in SPL. In the meantime, we are using[1][2] a fork[3] of
Allwinner's boot0 loader, which they also call "spl" in their BSP. boot0
uses this TOC1 image format.
The vendor tools for generating TOC1 images require a binary config file
generated by their FEX compiler. Instead of trying to support that, I
made up a simple human-readable config file format. I didn't see any
existing platform-agnostic parser for multi-image containers in mkimage.
I am sending this as RFC because it is only of temporary/limited use.
It only works with one specific fork of boot0 which was modified to
"behave" (the the original vendor version monkey-patches a custom header
inside the U-Boot image during boot). So it will be obsolete once U-Boot
SPL is ported. And it is Yet Another Image Format. On the other hand, it
does work, and it is currently being used.
[1]: https://linux-sunxi.org/Allwinner_Nezha#U-Boot
[2]: https://fedoraproject.org/wiki/Architectures/RISC-V/Allwinner
[3]: https://github.com/smaeul/sun20i_d1_spl
END
Series-prefix: RFC
Series-to: sunxi
Signed-off-by: Samuel Holland <samuel@sholland.org>
Clocks, resets, and pinmuxes are now handled by the driver model, so the
only thing the "board" code needs to do is load the driver. This matches
the pattern used by other DM raw NAND drivers (there is no NAND uclass).
The actual board code is now only needed in SPL.
Signed-off-by: Samuel Holland <samuel@sholland.org>
As a first step toward converting this driver to the driver model, use
the ofnode abstraction to replace direct references to the FDT blob.
Using ofnode_read_u32_index removes an extra pair of loops and makes the
allwinner,rb property optional, matching the devicetree binding.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Each chip is required to have a unique CS number ("reg" property) in the
range 0-7, so there is no need to separately count the number of chips.
Signed-off-by: Samuel Holland <samuel@sholland.org>
NAND is always at function 2 on port C.
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Currently NAND clock setup is done in board code, both in SPL and in
U-Boot proper. Add the NAND clocks/resets here so they can be used by
the "full" NAND driver once it is converted to the driver model.
The bit locations are copied from the Linux CCU drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Do not try to send an SGI from CPU 0 to itself. Since FIQs are masked
when entering monitor mode, this will hang. Plus, CPU 0 cannot fully
power itself off anyway. Instead, have it turn FIQs back on and continue
servicing SGIs from other cores.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that Crust (SCP firmware) has support for H3, we need a FIT image to
load it. H3 also needs to load a SoC-specific eGon blob to support CPU 0
hotplug. Let's first enable FIT support before adding extra firmware.
Update the binman description to work on either 32-bit or 64-bit SoCs:
- Make BL31 optional, since it is not used on 32-bit SoCs (though BL32
may be used in the future).
- Explicitly set the minimum offset of the FIT to 32 KiB, since SPL on
some boards is still only 24 KiB large even with FIT support enabled.
CONFIG_SPL_PAD_TO cannot be used because it is not defined for H616.
FIT unlocks more features (signatures, multiple DTBs, etc.), so enable
it by default. A10 (sun4i) only has 24 KiB of SRAM A1, so it needs
SPL_FIT_IMAGE_TINY. For simplicity, enable that option everywhere.
Cover-letter:
sunxi: SPL FIT support for 32-bit sunxi SoCs
This series makes the necessary changes so 32-bit sunxi SoCs can load
additional device trees or firmware from SPL along with U-Boot proper.
There was no existing binman entry property that put the FIT at the
right offset. The minimum offset is 32k, but this matches neither the
SPL size (which is no more than 24k on some SoCs) nor the FIT alignment
(which is 512 bytes in practice due to SPL size constraints). So instead
of adding a new property, I fixed what is arguably a bug in the offset
property -- though this strategy will not work if someone is
intentionally creating overlapping entries.
END
Series-to: sunxi
Series-to: sjg
Signed-off-by: Samuel Holland <samuel@sholland.org>
Currently, if the "offset" property is given for an entry, the section's
running offset is completely ignored. This causes entries to overlap if
the provided offset is less than the size of the entries earlier in the
section. Avoid the overlap by only using the provided offset when it is
greater than the running offset.
The motivation for this change is the rule used by SPL to find U-Boot on
sunxi boards: U-Boot starts 32 KiB after the start of SPL, unless SPL is
larger than 32 KiB, in which case U-Boot immediately follows SPL.
Signed-off-by: Samuel Holland <samuel@sholland.org>
reg must contain enough cells for the entire next address/size pair
after skipping `index` pairs. The previous code allows an out-of-bounds
read when na + ns > 1.
Series-to: Simon Glass <sjg@chromium.org>
Fixes: 69b41388ba45 ("dm: core: Add a new api to get indexed device address")
Signed-off-by: Samuel Holland <samuel@sholland.org>
The MMC controller driver is (and ought to be) the only user of these
register definitions. Put them in a header next to the driver to remove
the dependency on a specific ARM platform's headers.
Due to the sunxi_mmc_init() prototype, the file was not renamed. None of
the register definitions were changed.
Signed-off-by: Samuel Holland <samuel@sholland.org>
For legacy reasons we were defining the card detect GPIO for all sunxi
boards in each board's defconfig.
There is actually no need for a card-detect check in the SPL code (which
consequently has been removed already), and also in U-Boot proper we
have DM code to query the CD GPIO name from the device tree.
That means we don't have any user of that information left, so can
remove the definitions from the defconfigs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
As the SPL code for sunxi boards does not use the driver model, we have
two mmc_ops structures, one for DM, one for non-DM. The actual hardware
access code is shared, with the respective callback functions using that
common code.
To make this more obvious and easier to read, reorder the functions to
group them: we first have the common code, then the non-DM bits, and
the proper DM implementation at the end.
Also document this structure in the comment at the beginning of the file.
No functional change intended.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The sunxi MMC code does not use the DM in the SPL, as we don't have a
device tree available that early, also no space for it.
This also means we cannot access the card-detect GPIO information from
there, so we have Kconfig symbols called CONFIG_MMCx_CD_PIN, which each
board has to define. This is a burden, also requires extra GPIO code in
the SPL.
As the SPL is the natural successor of the BootROM (from which we are
loaded), we can actually ignore the CD pin completely, as this is what
the BootROM does as well: CD GPIOs are board specific, but the BootROM
is not, so accesses the MMC devices anyway.
Remove the card detect code from the non-DM implementation of the sunxi
MMC driver, to get rid of this unneeded code.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
While R40 puts the EMAC syscon register at a different address from
other variants, the relevant portion of the register's layout is the
same. Factor out the register offset so the same code can be shared
by all variants. This matches what the Linux driver does.
This change provides two benefits beyond the simplification:
- R40 boards now respect the RX delays from the devicetree
- This resolves a warning on architectures where readl/writel
expect the address to have a pointer type, not phys_addr_t.
Series-to: sunxi
Cover-letter:
net: sun8i-emac: Allwinner D1 Support
D1 is a RISC-V SoC containing an EMAC compatible with the A64 EMAC.
However, there are a couple of issues with the driver preventing it
being built for RISC-V. These are resolved by patches 2-3. Patch 1 is
a general cleanup.
END
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove
it, along with the rest of the support for AXP virtual GPIOs.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Since the D1 CCU binding is defined, we can add support for its
gates/resets, following the pattern of the existing drivers.
Series-to: sunxi
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that the USB PHY driver uses the device tree to get VBUS supply
regulators, these Kconfig symbols are unused. Remove them.
Signed-off-by: Samuel Holland <samuel@sholland.org>
The device tree binding for the PHY provides VBUS supplies as regulator
references. Now that all boards have the appropriate regulator uclass
drivers enabled, the PHY driver can switch to using them. This replaces
direct GPIO usage, which in some cases needed a special DM-incompatible
"virtual" GPIO from the PMIC.
The following boards provided a value for CONFIG_USB0_VBUS_PIN, but are
missing the "usb0_vbus-supply" property in their device tree. None of
them have the MUSB controller enabled in host or OTG mode, so they
should see no impact:
- Ainol_AW1_defconfig / sun7i-a20-ainol-aw1
- Ampe_A76_defconfig / sun5i-a13-ampe-a76
- CHIP_pro_defconfig / sun5i-gr8-chip-pro
- Cubieboard4_defconfig / sun9i-a80-cubieboard4
- Merrii_A80_Optimus_defconfig / sun9i-a80-optimus
- Sunchip_CX-A99_defconfig / sun9i-a80-cx-a99
- Yones_Toptech_BD1078_defconfig / sun7i-a20-yones-toptech-bd1078
- Yones_Toptech_BS1078_V2_defconfig /
sun6i-a31s-yones-toptech-bs1078-v2
- iNet_3F_defconfig / sun4i-a10-inet-3f
- iNet_3W_defconfig / sun4i-a10-inet-3w
- iNet_86VS_defconfig / sun5i-a13-inet-86vs
- iNet_D978_rev2_defconfig / sun8i-a33-inet-d978-rev2
- icnova-a20-swac_defconfig / sun7i-a20-icnova-swac
- sun8i_a23_evb_defconfig / sun8i-a23-evb
Similarly, the following boards set CONFIG_USB1_VBUS_PIN, but do not
have "usb1_vbus-supply" in their device tree. Neither of them have USB
enabled at all, so again there should be no impact:
- Cubieboard4_defconfig / sun9i-a80-cubieboard4 (also for USB3)
- sun8i_a23_evb_defconfig / sun8i-a23-evb
The following boards use a different pin for USB1 VBUS between their
defconfig and their device tree. Depending on which is correct, they
may be broken:
- Linksprite_pcDuino3_Nano_defconfig (PH11) /
sun7i-a20-pcduino3-nano (PD2)
- icnova-a20-swac_defconfig (PG10) / sun7i-a20-icnova-swac (PH6)
Finally, this board has conflicting pins given for its USB2 VBUS:
- Lamobo_R1_defconfig (PH3) / sun7i-a20-lamobo-r1 (PH12)
Signed-off-by: Samuel Holland <samuel@sholland.org>
On many boards, the USB ports are powered by a GPIO-controlled fixed
regulator. In preparation for switching the USB PHY driver to use the
regulator uclass instead of driving the GPIO directly, ensure these
boards have fixed regulator support enabled.
Signed-off-by: Samuel Holland <samuel@sholland.org>
On many boards, the USB ports are powered by the PMIC's "drivevbus"
regulator. In preparation for switching the USB PHY driver to use the
regulator uclass instead of a virtual GPIO pin, ensure these boards
have AXP PMIC regulator support enabled.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that some regulator driver exists for this PMIC, add support for
probing regulator drivers from the device tree subnodes.
Signed-off-by: Samuel Holland <samuel@sholland.org>
The first AXP regulator converted to use the regulator uclass is the
drivevbus switch, since it is used by the USB PHY driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove it.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Update boards to use the USB power supply driver, as referenced in the
device tree, instead of a virtual GPIO. This removes the need for some
DM-incompatible special cases in the GPIO driver.
The following five boards used AXP0-VBUS-DETECT in their config, but are
missing the "usb0_vbus_power-supply" property in their device tree:
- Ainol_AW1_defconfig / sun7i-a20-ainol-aw1
- Cubieboard4_defconfig / sun9i-a80-cubieboard4
- Merrii_A80_Optimus_defconfig / sun9i-a80-optimus
- Yones_Toptech_BD1078_defconfig / sun7i-a20-yones-toptech-bd1078
- Yones_Toptech_BS1078_V2_defconfig /
sun6i-a31s-yones-toptech-bs1078-v2
None of those five boards have the MUSB controller (USB OTG) enabled in
their device trees, so this change should not break anything for them.
Additionally, the following board intentionally omits the property
because VBUS is always enabled:
- Nintendo_NES_Classic_Edition_defconfig /
sun8i-r16-nintendo-nes-classic
The PHY driver already assumes VBUS is enabled when no detection method
is available, so again this will not cause any problems.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This driver reports the presence/absence of voltage on the PMIC's USB
VBUS pin. This information is used by the USB PHY driver. The
corresponding Linux driver uses the power supply class, which does not
exist in U-Boot. UCLASS_REGULATOR seems to be the closest match.
Signed-off-by: Samuel Holland <samuel@sholland.org>
This board is configured with CONFIG_USB1_VBUS_PIN="PH24", but no
regulator exists in its device tree. Add the regulator, so USB will
continue to work when the PHY driver switches to using the regulator
uclass instead of a GPIO.
Update the device tree here because it does not exist in Linux.
Signed-off-by: Samuel Holland <samuel@sholland.org>
To quote Simon:
This series provides an implementation of VBE from TPL through to U-Boot
proper, using VBE to load the relevant firmware stages. It buils a single
image.bin file containing all the phases:
TPL - initial phase, loads VPL using binman symbols
VPL - main firmware phase, loads SPL using VBE parameters
SPL - loads U-Boot proper using VBE parameters
U-Boot - final firmware phase, where OS booting is processed
This series does not include the OS-booting phase. That will be the
subject of a future series.
The implementation is entirely handled by sandbox. It should be possible
to enable this on a real board without much effort, but that is also the
subject of a future series.
Use a manual test for the VBE test, so we can make the pytest and the
C unit test work together properly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use binman to build an image which includes all the U-Boot phases so that
a full VBE boot can take place with just that image.bin file. Attach the
image file to mmc2 so it can be loaded.
VBE is used to load images in two phases:
- In VPL, VBE decides which SPL image to load
- In SPL, VBE decides which U-Boot image to load
The latter should really be determined by VPL, since it does the full
signature verification on the selected configuration. However, we have
separate configurations for SPL and U-Boot proper, so for now we keep it
simple and have SPL do its own verification. This will need to be
tidied up later.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we put the driver in the /chosen node in U-Boot. This is a bit
strange, since U-Boot doesn't normally use that node itself. It is better
to put it under the bootstd node.
To make this work we need to copy create the node under /chosen when
fixing up the device tree. Copy over all the properties so that fwupd
knows what to do.
Update the sandbox device tree accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable the various features needed in VPL, by adding Kconfig options.
Update the defconfig for sandbox_vpl so that the build for each phase
includes what is needed. Drop LZMA for now and make sure partition support
is omitted in SPL, since it is not needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
We don't need the U-Boot prefix on the version and in fact it is harmful
since pytest gets confused seeing the U-Boot banner bring displayed when
the version is printed.
Drop the prefix from the string.
We could produce an entirely new string from the component parts, but this
adds to the rodata size and would break the use of version_string as the
only thing which holds this information.
Signed-off-by: Simon Glass <sjg@chromium.org>
VBE supports booting firmware during the SPL phases, i.e. so that VPL can
start SPL and SPL can start U-Boot.
It also supports booting an OS, when in U-Boot.
As a first step towards these features, add functions to indicate the
current VBE phase. The firmware selection is done in VPL and the OS
selection is done in U-Boot proper.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sandbox runs the next phase from discrete executables, so for
example u-boot-tpl runs u-boot-vpl to get to the next phase.
In some cases the phases are all built into a single firmware image, as is
done for real boards. Add support for this to sandbox.
Make it higher priority so that it takes precedence over the existing
method.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we only support a single loader of each time. Extra ones are
ignored. This means that only one BOOT_DEVICE_BOARD can be used in the SPL
image.
This is inconvenient since we sometimes want to provide several
board-specific drivers, albeit at different priorties. Add support for
this.
This should have no functional change for existing boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
The vbe_fixup file handles device tree fixups, but these are called OS
requests in VBE. Rename the file to reflect its wider purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for filtering out FIT images by phase. Rather than adding yet
another argument to this already overloaded function, use a composite
value, where the phase is only added in if needed.
The FIT config is still selected (and verified) as normal, but the images
are selected based on the phase.
Tests for this come in a little later, as part of the updated VPL test.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to be able to mark an image as related to a phase, so we can
easily load all the images for SPL or for U-Boot proper.
Add this to the FIT specification, along with some access functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the sandbox executable is assumed to be arg[0] but this only
works for a single jump (e.g. from SPL to U-Boot). Add a new arg to solve
this issue, along with a detailed comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sandbox only supports jumping to a file, to get to the next
U-Boot phase. We want to support other methods, so update the code to
use an enum for the method. Also use the
Use board_boot_order() to set the order, so we can add more options.
Also add the MMC methods into the BOOT_DEVICE enum so that booting
from MMC can be supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
This happens every time sandbox moves to the next phase so is not very
interesting. Display the message only when debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When MMC_WRITE is disabled this driver produced a build error. Fix this.
Also update a comment while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Use the correct SPL_TPL_ variable so that these features can be enabled in
TPL and VPL as needed.
Disable it by default in TPL to avoid any code-size increase. No boards
are actually using it since the Makefile rules don't allow including
drivers/block/ with TPL_DM enabled. It can be manually enabled as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add test coverage for blk_write() as well.
The blk_erase() is not tested for now as the USB stor interface does not
support erase.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we have functions called blk_dread(), etc., which take a
struct blk_desc * to refer to the block device. Add some functions which
use udevice instead, since this is more in keeping with how driver model
is supposed to work.
Update one of the tests to use this.
Note that it would be nice to update the functions in disk-uclass.c to use
these new functions. However they are not quite the same. For example,
disk_blk_read() adds the partition offset to 'start' when calling the
cache read/fill functions, but does not with part_blk_read(), which does
the addition itself. So as designed the code is duplicated.
Signed-off-by: Simon Glass <sjg@chromium.org>
The use of 'block_dev' in this context is confusing, since it is not a
pointer to a device, just to some information about it. Rename this to
'desc', as is more commonly used, since it is a block descriptor.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <xypron.glplk@gmx.de>
Use the uclass type as the first part of the function name, to be
consistent with the methods in other block drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we normally write tests either in Python or in C. But most
Python tests end up doing a lot of checks which would be better done in C.
Checks done in C are orders of magnitude faster and it is possible to get
full access to U-Boot's internal workings, rather than just relying on
the command line.
The model is to have a Python test set up some things and then use C code
(in a unit test) to check that they were done correctly. But we don't want
those checks to happen as part of normal test running, since each C unit
tests is dependent on the associate Python tests, so cannot run without
it.
To acheive this, add a new UT_TESTF_MANUAL flag to use with the C 'check'
tests, so that they can be skipped by default when the 'ut' command is
used. Require that tests have a name ending with '_norun', so that pytest
knows to skip them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some tests currently return 0 when they want to be skipped. Update them to
return -EAGAIN instead, so they are counted as skipped.
A few tests are in two parts, with the latter part being skipped in
certain situations. Split these into two and use the correct condition for
the second part.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present it is possible for a test to skip itself by returning -EAGAIN
but this is not recorded. An existing example is in test_pre_run() with
the "Console recording disabled" check.
Keep a track of skipped tests and report the total at the end.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In some cases the ELF version of SPL builds may be packaged, rather
than a binary .bin file. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
This feature is used by several etypes and we plan to add more that use
it. Make symbol writing a feature of the base class to reduce the code
duplication.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an option to allow silent console to be controlled separately in SPL,
so that boot progress can be shown. Disable it by default for sandbox
since it is useful to see what is going on there.
Signed-off-by: Simon Glass <sjg@chromium.org>
The expression in boot_from_devices() is fairly long and appears to be an
artefact from before we could easily call printf(...) and have the call be
nop'd out. So update it to just check CONFIG_SILENT_CONSOLE.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
At present we use symbols for the u-boot-spl entry, but this is not always
what we want. For example, sandbox actually jumps to a u-boot-spl-elf
entry, since sandbox executables are ELF files.
We already handle this with U-Boot by using the '-any' suffix. Add it for
SPL as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is monstrously verbose when something goes wrong. It should work by
recording the problem and reporting it (once) at the command level. At
present it sometimes outputs hundreds of lines of CRC mismatches.
For now, just silence it all.
GUID Partition Table Entry Array CRC is wrong: 0xaebfebf2 != 0xc916f712
find_valid_gpt: *** ERROR: Invalid GPT ***
find_valid_gpt: *** Using Backup GPT ***
GUID Partition Table Entry Array CRC is wrong: 0xaebfebf2 != 0xc916f712
find_valid_gpt: *** ERROR: Invalid GPT ***
find_valid_gpt: *** Using Backup GPT ***
...
While we are error, remove the '*** ERROR: ' text as it is already clear
that this is unexpected
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().
Rename it to resolve this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
As STI timer is renamed to ARM A9 global timer, change BCM63138 to use
the new global timer config symbol name.
This patch applies on top of the my previous patch [1].
[1]: https://lists.denx.de/pipermail/u-boot/2022-August/491060.html
Signed-off-by: William Zhang <william.zhang@broadcom.com>
STI timer is actually ARM Cortex A9 global timer. Convert the driver to
use generic global timer name and make it consistent with Linux kernel
global timer driver. This also allows any A9 based device to use this
driver.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
As CONFIG_ARCH_BCM6753 is replaced with CONFIG_BCM6855, update the
driver Kconfig to use the new config symbol.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM6753 is essentially same as the main chip BCM6855 but with different
SKU number. Now that BCM6855 is supported under CONFIG_ARCH_BCMBCA and
CONFIG_BCM6855, remove the original ARCH_BCM6753 support and migrate its
configuration and dts settings. This includes:
- Remove the bcm96753ref board folder. It is replaced by the
generic bcmbca board folder.
- Merge the 6753.dtsi setting to the new 6855.dtsi file. Update
96753ref board dts with the new compatible string.
- Delete broadcom_bcm96763ref.h and merge its setting to the new
bcm96855.h file.
- Delete bcm96753ref_ram_defconfig and use a basic config version of
bcm96855_defconfig
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM6855 is a Broadcom ARM A7 based PON Gateway SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family. Like other
broadband SoC, this patch adds it under CONFIG_BCM6855 chip config and
CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and ARM PL101 uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
As CONFIG_ARCH_BCM6858 is replaced with CONFIG_BCM6858, update the
driver Kconfig to use the new config symbol.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Now that BCM6858 is supported under CONFIG_ARCH_BCMBCA and
CONFIG_BCM6858, remove the original ARCH_BCM6858 support and migrate its
configuration and dts settings. This includes:
- Remove the bcm968580xref board folder. It is replaced by the generic
bcmbca board folder.
- Update bcm968580xref board dts with the new compatible string.
- Delete broadcom_bcm968580xref.h and merge its setting to the new
bcm96858.h file.
- Remove bcm968580xref_ram_defconfig as a basic config version of
bcm96858_defconfig is now added.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM6858 is a Broadcom B53 based PON Gateway SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family. Like other broadband
SoC, this patch adds it under CONFIG_BCM6858 chip config and
CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and the
original dts is updated with the one from linux next git repository.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
As CONFIG_ARCH_BCM68360 is replaced with CONFIG_BCM6856, update the
driver Kconfig to use the new config symbol.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM68360 is a variant within the BCM6856 chip family. Now that BCM6856
is supported under CONFIG_ARCH_BCMBCA and CONFIG_BCM6856, remove the
original ARCH_BCM68360 support and migrate its configuration and dts
settings. This includes:
- Remove the bcm968360bg board folder. It is replaced by the generic
bcmbca board folder.
- Merge the 68360.dtsi setting to the new 6856.dtsi file. Update board
dts with the new compatible string.
- Merge broadcom_bcm968360bg.h setting to the new bcm96856.h file.
- Remove bcm968360bg_ram_defconfig as a basic config version of
bcm96856_defconfig is now added.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM6856 is a Broadcom B53 based PON Gateway SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family. Like other Broadband
SoC, this patch adds it under CONFIG_BCM6856 chip config and
CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and Broadcom uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from
linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM63158 carries the CONFIG_SYSRESET from the original configuration. It
provide reset_cpu function already so need to define weak version of the
dummy reset_cpu for other BCMBCA SoCs to avoid linking error.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Since ARCH_BCM63158 SoC support is merged into ARCH_BCMBCA, add BCM63158
maintainer Philippe to bcmbca maintainer list.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
As CONFIG_ARCH_BCM63158 is replaced with CONFIG_BCM63158, update the
Kconfig to use the new config symbol.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Now that BCM63158 is supported under CONFIG_ARCH_BCMBCA and
CONFIG_BCM63158, remove the original ARCH_BCM63158 support and migrate
configuration settings.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM63158 is a Broadcom B53 based DSL Gateway SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family. Like other
Broadband SoC, this patch adds it under CONFIG_BCM63158 chip
config and CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and ARM PL011 uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from
linux.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM4908 is a Broadcom B53 based WLAN AP router SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added
under ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and Broadcom uart.
This SoC is supported in the linux git repository so the dts and dtsi
files are stripped down version of linux copies with mininum blocks
needed by u-boot.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
BCM6813 is a Broadcom B53 based PON and WLAN AP router SoC. It is part
of the BCA (Broadband Carrier Access origin) chipset family so it's
added under ARCH_BCMBCA platform. This initial support includes a
bare-bone implementation and dts with CPU subsystem, memory and ARM
PL011 uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
BCM4912 is a Broadcom B53 based WLAN AP router SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011 uart.
This SoC is supported in the linux-next git repository so the dts
and dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
BCM63146 is a Broadcom B53 based DSL Broadband SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011 uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
BCM63138 is an ARM A9 based DSL Broadband SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory, ARM A9 global timer
and Broadcom uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are stripped down version of linux copies with mininum blocks
needed by u-boot.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
This patch applies on top of the my previous patch [1].
[1] https://lists.denx.de/pipermail/u-boot/2022-August/490570.html
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
BCM63148 is an Broadcom B15 based DSL Broadband SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and Broadcom uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
BCM6756 is an ARM A7 based WLAN Gateway and Access Point Broadband SoC.
It is part of the BCA(Broadband Carrier Access origin) chipset family so
it's added under ARCH_BCMBCA platform. This initial support includes a
bare-bone implementation and dts with CPU subsystem, memory and ARM
PL011 uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
BCM6878 is an ARM A7 based PON Broadband SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011
uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux with minor fix-up that needs to be
upstreamed to linux as well.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
BCM6846 is an ARM A7 based PON Broadband SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and Broadcom uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux with minor fix-up that needs to be
upstreamed to linux as well.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
BCM63178 is an ARM A7 based DSL Broadband SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011 uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux with minor fix-up that needs to be
upstreamed to linux as well.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
This is needed for some soon-to-be-applied patches. Scan the configs/
directory to see if any of the files match.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com>
Suggested-by: Tom Rini <trini@konsulko.com>
- simplefb rotation support
- support splash as raw image from MMC
- enhancements to Truetype console (multiple fonts and sizes)
- drop old LCD support
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Merge tag 'video-20221030' of https://source.denx.de/u-boot/custodians/u-boot-video
- fix [hv]sync active vs back porch in dw_mipi_dsi
- simplefb rotation support
- support splash as raw image from MMC
- enhancements to Truetype console (multiple fonts and sizes)
- drop old LCD support
This relies on the old LCD implementation which is to be removed. Drop the
existing #ifdef and convert it to C code.
Signed-off-by: Simon Glass <sjg@chromium.org>
This option is not used anymore since the LCD implementation is being
removed. Stop enabling it on various boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
This option should not have the SYS_ in it. Drop it so it fits in with the
other video options.
Also simplify the alignment code in gunzip_bmp(), since malloc() always
returns a 32-bit-aligned pointer.
Signed-off-by: Simon Glass <sjg@chromium.org>
The bmp command already has a way to centre the image. Using this CONFIG
option to also centre it makes it impossible to control where images are
placed on the screen. Drop the extra check.
Simplify the Kconfig file we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
By default several types of splash locations are supported and the
user can select one of them through environment var (splashsource).
However the devpart is still hardcoded and we cannot change it from
the environment.
This patch add the support of "splashdevpart" which allow the user to
set the devpart though this environment variable.
Example: image located in splashscreen partition (MMC as raw)
```
splashsource=mmc_raw
splashdevpart=0#splashscreen
```
Signed-off-by: Julien Masson <jmasson@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The user has now the choice to specify the splash location in the MMC
as a raw storage.
Signed-off-by: Julien Masson <jmasson@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is not as simple as it seems. Add a function to provide it so that
the upcoming menu feature can space lines out correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new 'font' command which allows the fonts to be listed as well as
selecting a different font and size.
Allow the test to run on sandbox, where multiple font/size combinations
are supported, as well as sandbox_flattree, where they are not.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is enabled for LCD but not for VIDEO. Enable it since it is useful
to be able to clear the screen and adds very little code.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to support multiple fonts. Add a function to
handle this as well as one to list the available fonts.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the truetype console supports only a single font and size. It
is useful to be able to support different combinations. As a first step,
move the metrics into there own structure and allow having multiple
metrics.
Signed-off-by: Simon Glass <sjg@chromium.org>
Put this check into a function so we can use it elsewhere. Also drop the
macros which do the same thing but are not actually used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Generalise the video_clear() function to allow filling with a different
colour.
Tidy up the comments while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is actually a panel, not a video device. Rename the option, move it
into the right place and make it depend on PANEL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move these commands and the implementation to the cmd/ directory, which is
where most commands are kept.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
[agust: keep vidconsole_position_cursor() in vidconsole uclass]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Add an exported function which allows the cursor position to be set to
pixel granularity. Make use of this in the existing code.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these are attached to vidconsole which means that the video
uclass requires that a console is enabled. This is not the intention.
The colours are a reasonable way of indexing common colours in any case,
so move them to the video uclass instead.
Rename vid_console_color() to video_index_to_colour() now that it is more
generic. Also fix the inconsistent spelling in these functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
The wrong fields are pulled out of the timings here so the values
programmed into the DSI_VID_HSA_LINES/DSI_VID_HBP_LINES and
DSI_VID_VSA_LINES/DSI_VID_VBP_LINES registers are swapped.
Use the right fields so that the correct values are programmed.
Fixes: d4f7ea83fc ("video: add MIPI DSI host controller bridge")
Signed-off-by: John Keeping <john@metanate.com>
Various minor changes to core dm and sandbox
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Merge tag 'dm-pull-29oct22' of https://source.denx.de/u-boot/custodians/u-boot-dm
Fix pylibfdt warnings and use setuptools to build
Various minor changes to core dm and sandbox
When probing a device fails NULL pointer is returned, and following
devices in uclass list cannot be iterated. Skip to next device on error
instead.
With that the only condition under which these simple iteration
functions return error is when the dm is not initialized at uclass_get
time. This is not all that interesting, change return type to void.
Fixes: 6494d708bf ("dm: Add base driver model support")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
uclass_first_device/uclass_next_device return value will be removed,
don't use it.
With the current implementation dev is equivalent to !ret. It is
redundant to check both, ret check can be replaced with dev check, and
ret check inside the iteration is dead code.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
device_probe returns early when the device is already activated.
Add a note to the documentation that it can be used on already activated
devices.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
The distutils package is deprecated. The upstream libfdt repo uses
setuptools for building the pylibfdt module, so bring in that code,
suitably modified for U-Boot. Also bring in the README.
The modifications include setting the version correctly, making use of
the environment variables provided by the Makefile and various tweaks
to the directories.
Note that the version omits the minus character at the start of
EXTRAVERSION, since this creates a warning. The build is really just used
within U-Boot itself, so it doesn't matter too much if the version matches
upstream, or exactly matches U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
The sandbox64 variant is currently building the sandbox thermal driver
but not the corresponding uclass driver. This results in the sandbox64
variant not booting with the test device tree. Enable building the
thermal uclass for the sandbox64 variant as well.
Also enable the temperature command to allow the test to be run on the
sandbox64 variant.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adding support to symlink an image packaged using binman.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently sandbox configuration defautls to 64bit and there is no
automation for building 32bit sandbox on 32bit hosts.
Use _LP64 macro as heuristic for detecting 64bit targets.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is needed in the platforms that use "ranges" node property for
address translation in their dts for TPL.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Python 3.10 requires defining PY_SSIZE_T_CLEAN. This will be fixed in
swig 4.10 but it is not clear when it will be released. There was a
warning since python 3.8.
Link: https://github.com/swig/swig/pull/2277
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
python does not like the u-boot- prefix in the version, drop it.
/usr/lib/python3.10/site-packages/setuptools/dist.py:544: UserWarning:
The version specified ('u-boot-2022.10') is an invalid version, this may
not work as expected with newer versions of setuptools, pip, and PyPI.
Please see PEP 440 for more details.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This path does not seem to be present in clang-14 for some reason. Relax
the regular expression so that the test works, at least for non-LTO.
Signed-off-by: Simon Glass <sjg@chromium.org>
The call to device_bind_with_driver_data() passes id->data but if
the entry has no of_match then the id has not been set by the selected
driver.
Normally this passes unnoticed since a previous driver likely had an
of_match value, so the id is set to that. Of course it is not correct
to pass the id->data from a different driver.
With clang-14 the driver ordering is such that the id is never actually
set in the 'bind /usb@1 usb_ether' line in test_bind_unbind_with_node()
thus causing a crash.
Fix this by passing 0 if the of_match for a driver does not exist.
Signed-off-by: Simon Glass <sjg@chromium.org>
Matching anything that just happens to have the sought-for label as a
prefix is wrong. For example, if the board designer has designated 10
lines for debug purposes, named "debug1" through "debug10", and we are
looking up "debug1", if debug10 happens to be met first during the
iteration we'd wrongly return that.
In theory, this can break existing users that could rely on this
quirk, but OTOH keeping the current broken semantics can cause a lot
of grief for people hitting this in the future and not understanding
why they don't find the line they expect. Considering how few in-tree
defconfigs currently set DM_GPIO_LOOKUP_LABEL (ignoring sandbox, only
four "real" boards), let's fix it before the use becomes more
widespread.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
The jmp_buf type is required by the C99 specification.
Defining it for x86 fixes building the longjmp unit test.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If longjmp(jmp_buf env, int val) is called with val = 0, the setjmp()
macro must return 1.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
pci_find_first_device description says it can be used for iteration with
itself but it should really be with pci_find_next_device
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Remove prototype for the removed function fdt_fixup_nor_flash_size.
This patch has no impact as the function is never used.
Fixes: 98f705c9cefd ("powerpc: remove 4xx support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In a couple of places the document says u-boot,pre-reloc but all
examples show u-boot,dm-pre-reloc, use the latter consistently.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are two problems with both strcmp and strncmp:
(1) The C standard is clear that the contents should be compared as
"unsigned char":
The sign of a nonzero value returned by the comparison functions
memcmp, strcmp, and strncmp is determined by the sign of the
difference between the values of the first pair of characters (both
interpreted as unsigned char) that differ in the objects being
compared.
(2) The difference between two char (or unsigned char) values can
range from -255 to +255; so that's (due to integer promotion) the
range of values we could get in the *cs-*ct expressions, but when that
is then shoe-horned into an 8-bit quantity the sign may of course
change.
The impact is somewhat limited by the way these functions
are used in practice:
- Most of the time, one is only interested in equality (or for
strncmp, "starts with"), and the existing functions do correctly
return 0 if and only if the strings are equal [for strncmp, up to
the given bound].
- Also most of the time, the strings being compared only consist of
ASCII characters, i.e. have values in the range [0, 127], and in
that case it doesn't matter if they are interpreted as signed or
unsigned char, and the possible difference range is bounded to
[-127, 127] which does fit the signed char.
For size, one could implement strcmp() in terms of strncmp() - just
make it "return strncmp(a, b, (size_t)-1);". However, performance of
strcmp() does matter somewhat, since it is used all over when parsing
and matching DT nodes and properties, so let's find some other place
to save those ~30 bytes.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
- Reduce memory usage in SPL in some cases, clarify some standalone API
license issues, fix a Kconfig dependency, pin to a specific version of
python setuptools for now, fix a signing problem in mkimage and add a
memory uclass.
The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
- Asynchronous SRAM-like memories and ASICs
- Asynchronous, synchronous, and page mode burst NOR flash
- NAND flash
- Pseudo-SRAM devices
This driver will take care of setting up the GPMC based on
the settings specified in the Device tree and then
probe its children.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
GPMC stands for General Purpose Memory Controller and it is
present on many Texas Instruments SoCs.
It supports a number of Asynchronous and Synchronous interfaces
and has various settings to configure the bus interface.
The DT bindings define all the various GPMC settings.
As the GPMC supports multiple devices on the bus, each
device is represented as a child and the respective
GPMC settings are situated there. (see ti,gpmc-child.yaml)
These binding docs are picked up from the Linux kernel.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Introduce CONFIG_SPL_MEMORY to allow Memory drivers to
be built for SPL.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The version used on Ubuntu 2022.04 produces a number of warnings:
/usr/lib/python3/dist-packages/pkg_resources/__init__.py:116:
PkgResourcesDeprecationWarning: 1.16.0-unknown is an invalid version
and will not be supported in a future release
Same with: 0.1.43ubuntu1 11.4.1ubuntu1 2.22.1ubuntu1 1.1build1
According to [1] this is a bug in setuptools. Employ the workaround for
now.
[1] https://askubuntu.com/questions/1406952/what-is-the-meaning-of-this-
pkgresourcesdeprecationwarning-warning-from-pipenv
Signed-off-by: Simon Glass <sjg@chromium.org>
The "common.h" header is not covered by the licensing exception for
standalone applications. Let's drop inclusion of this header from the
hello_world example to prove that a standalone app can be built without
it.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
On 2010-01-27, an email [1] was sent to the mailing list by Wolfgang
Denk which clarified the intended licensing exceptions for standalone
applications. As the "export.h" header and the "stubs.c" source files
are required to implement a standalone application, the intention was
that these files be covered by the licensing exception. This is made
clear in the following quotes from that email:
"exports.h" should be added to the "allowed" file list; there should
be no need to include "common.h". Eventually this needs fixing.
Patches are welcome.
"examples/standalone/stubs.c" should be added to the "allowed" file
list (the ppc_*jmp.S files are LGPLed).
There should be no doubts - the intention is clear, the current state
may need improvement. Help (read: patches) welcome.
[1]: https://lists.denx.de/pipermail/u-boot/2010-January/067174.html
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
OMAP3 BeagleBoard NAND boot hangs when spl_load_legacy_img() tries
to read the header into 'struct hdr' which is allocated on the
stack.
As the header has already been read once before by spl_nand.c,
we can avoid the extra header allocation and read here by
simply passing around the pointer to the header.
This fixes NAND boot on OMAP3 BeagleBoard.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
Just like we exclude data-size, data-position, and data-offset from
fit_config_check_sig, we must exclude them while signing as well.
While we're at it, use the FIT_DATA_* defines for fit_config_check_sig
as welll.
Fixes: 8edecd3110e ("fit: Fix verification of images with external data")
Fixes: c522949a29d ("rsa: sig: fix config signature check for fit with padding")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- nuvoton: add expire function for generic reset (Jim)
- handle watchdogs during keyed autoboot (Rasmus)
- cyclic: Don't disable cylic function upon exceeding CPU time (Stefan)
- ulp wdog: Updates to support iMX93 and DM (Alice)
Avoid concatenation with following message.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
If a regulator does not support .set_suspend_enable or
.set_suspend_value then ret is set to ENOSYS early in the function.
The most serious impact of this is that when no automatic setting of
voltage is needed then the final regulator_set_enable() is skipped
because ret has not been cleared.
It seems that the error handling for regulator_set_suspend_value() is
also wrong as if this succeeds then the normal boot-on checks are still
required, and again ENOSYS needs special treatment here.
Fixes: 11406b8f7e ("dm: regulator: support regulator more state")
Signed-off-by: John Keeping <john@metanate.com>
Currently the 'sf update' command fails in case the 'start' offset is
not aligned to SPI NOR erase block size. Add the missing alignment
calculation. In case the start offset is in the middle of erase block,
round start address down to the nearest aligned one, compare only the
updated data between what is in the SPI NOR and what is being written,
copy new data at offset of the compare buffer, and write back the entire
erase block.
This is useful e.g. on i.MX6Q where the u-boot-with-spl.imx is at
offset 0x400 in the SPI NOR, while the SPI NOR may have erase block
size e.g. 0x1000 bytes.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Layerscape update
- support sysreset,
- de-select FSL_IFC when booting from SD
- disable unused parts of ICID tables
- reduce ns_dev size for csu
- enable dma snooping for ls104x
- nand driver fixups for ls1043ardb rev 7.0 boards.
Enable boot/bootd command in toradex colibri-imx7 defconfig,
it's just convenient to have it in and every other toradex board
already includes it.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Avoid the following build errors after the device tree sync:
drivers/spi/mxs_spi.c: In function ‘mxs_spi_probe’:
drivers/spi/mxs_spi.c:327:25: error: ‘struct dtd_fsl_imx23_spi’ has no
member named ‘spi_max_frequency’
327 | priv->max_freq = dtplat->spi_max_frequency;
| ^~
drivers/spi/mxs_spi.c:328:23: error: ‘struct dtd_fsl_imx23_spi’ has no
member named ‘num_cs’
328 | plat->num_cs = dtplat->num_cs;
| ^~
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Multiple boards create duplicate entries in their respective
-u-boot.dtsi files which all basically do the same thing.
To consolidate these and make it easier to make improvements
going forward, consolidate them all into one place.
This file creates a flash.bin image using binman, and supports
LPDDR4, DDR4 and DDR3. Since individual boards use different
peripherals and different UART ports, those entries were kept
in their respective board files, but the spba1 node was addded
which contains all UART1-3 to help facilitate SPL_DM_SERIAL.
Individual users will still need to include their respective
UART and pinctrl nodes for those UARTS.
This consolidated file also supports generating a flash.bin file
which can boot from flexSPI if CONFIG_FSPI_CONF_HEADER is
enabled.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Commit 290ffe5788 (imx8m: fix reading of DDR4 MR registers) lifted a
private definition of lpddr4_mr_read() from imx8mm-cl-iot-gate board
code to drivers/ddr/imx/imx8m/ddrphy_utils.c, because that version
actually seems to work in practice.
However, commit 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
reintroduced the broken version in drivers/ddr/imx/imx8m/ddr_init.c,
copied most of the rest of ddrphy_utils.c to
drivers/ddr/imx/phy/ddrphy_utils.c, and stopped building
drivers/ddr/imx/imx8m/ddrphy_utils.c [and that file was then finally
completely removed with 7e9bd84883 (imx8m: ddrphy_utils: Remove unused
file)].
I assume this must have broken the imx8mm-cl-iot-gate board, at least
those that have not had their eeprom programmed with the proper
information. It certainly did break our out-of-tree board which always
reads back the ID register and uses that for a sanity check.
So apply the fix from 290ffe5788 once again.
Fixes: 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Fabio Estevam <festevam@denx.de>
- enable bootcount command
- integrate bootcount using SNVS_LP general purpose register LPGPR0
- enable link-time optimisation
- explicitly set a boot delay of one second
- enable CRC32 and MD5
- enable command for low-level access to data in a partition
- enable time commands
- enable PMIC commands
- improve ETHPRIME configuration
- enable eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- remove stale PFUZE100 PMIC driver
- enable thermal management unit driver
- enable more USB host functionality
- enable hexdump
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Update the distro config env memory layout for the Verdin iMX8M Mini and
Verdin iMX8M Plus again:
- loadaddr=0x48200000 allows for 128MB area for uncompressing (ie FIT
images, kernel_comp_addr_r, kernel_comp_size)
- fdt_addr_r = loadaddr + 128MB - allows for 128MB kernel
- scriptaddr = fdt_addr_r + 512KB - allows for 512KB fdt
- ramdisk_addr_r = scriptaddr + 512KB - allows for 512KB script
Memory layout taken from commit fd5c7173ade4
("imx8m{m,n}_venice: update env memory layout").
Note that for our regular BSP Layers and Reference Images for Yocto
Project an updated distro boot script is required (see
meta-toradex-bsp-common/recipes-bsp/u-boot/u-boot-distro-boot).
Note that this corrects a pre-maturely applied version 2 of the same
patch set.
Fixes: bbe0089d29e ("verdin-imx8mm: verdin-imx8mp: update env memory layout")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
The GW7904 is based on the i.MX 8M Mini SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- microSD connector with UHS support
- LIS2DE12 3-axis accelerometer
- Gateworks System Controller
- IMX8M FEC
- 2x RS232 off-board connectors
- PMIC
- 10x bi-color LED's
- 1x miniPCIe socket with PCIe and USB2.0
- 802.3at Class 4 PoE
- 10-30VDC input via barrel-jack
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam.
i.Core MX8M Plus needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Plus PCIe
- MIPI CSI
- 2x CAN
- Audio Out
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam.
i.Core MX8M Plus needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit.
Add support for it.
Sync the i.Core MX8M Plus is an EDIMM SoM based on NXP
devicetree file from linux-next tree.
commit <aec8ad34f7f24> (arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit)
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
from Engicam.
General features:
- NXP i.MX8M Plus
- Up to 4GB LDDR4
- 8 eMMC
- Gigabit Ethernet
- USB 3.0, 2.0 Host/OTG
- PCIe 3.0 interface
- I2S
- LVDS
- rest of i.MX8M Plus features
i.Core MX8M Plus needs to mount on top of Engicam baseboards
for creating complete platform solutions.
Add support for it.
Sync the i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
from Engicam devicetree file from linux-next tree.
commit <eefe06b295087> (arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM)
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The GW7903 has a BD71847 PMIC on I2C1. Adjust the model compare strings
to add it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Enable driver model for ulp watchdog timer. When CONFIG_WDT=y and the
status of device node is "okay", initr_watchdog will be called and
finally calls ulp_wdt_probe() and ulp_wdt_start().
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The reset source of the external PMIC on i.MX93 is WDOG_ANY PAD and the
source of WDOG_ANY PAD is interrupt. Therefore, using PMIC to reset
needs to enable the watchdog interrupt.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The WDOG clocks are sourced from the fixed 32KHz (lpo_clk).When the
timeout period exceeds 2 seconds, the value written to the TOVAL
register is larger than 16-bit can represent. Enabling watchdog
prescaler to solve this problem.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
To use 32bits refresh and unlock command as default, check the CMD32EN
bit to select the corresponding commands.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
With the migration of the watchdog infrastructure to cyclic functions
it's been noticed, that at least one watchdog driver is broken now. As
the execution time of it's watchdog reset function is quite long.
In general it's not really necessary (right now) to disable the cyclic
function upon exceeding CPU time usage. So instead of disabling the
cylic function in this case, let's just print a warning once to show
this potential problem to the user.
Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Tom Rini <trini@konsulko.com>
Cc: Pali Rohár <pali@kernel.org>
In order to test that we properly handle watchdog(s) during the "wait
for the user to interrupt autoboot" phase, we need a watchdog device
to be watching us.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
In order to test that U-Boot actually maintains the watchdog device(s)
during long-running busy-loops, such as those where we wait for the
user to stop autoboot, we need a watchdog device that actually does
something during those loops; we cannot test that behaviour via the DM
test framework.
So introduce a relatively simple watchdog device which is simply based
on calling the host OS' alarm() function; that has the nice property
that a new call to alarm() simply sets a new deadline, and alarm(0)
cancels any existing alarm. These properties are precisely what we
need to implement start/reset/stop. We install our own handler so that
we get a known message printed if and when the watchdog fires, and by
just invoking that handler directly, we get expire_now for free.
The actual calls to the various OS functions (alarm, signal, raise)
need to be done in os.c, and since the driver code cannot get access
to the values of SIGALRM or SIG_DFL (that would require including a
host header, and that's only os.c which can do that), we cannot simply
do trivial wrappers for signal() and raise(), but instead create
specialized functions just for use by this driver.
Apart from enabling this driver for sandbox{,64}_defconfig, also
enable the wdt command which was useful for hand-testing this new
driver (especially with running u-boot under strace).
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
This is a companion to u-boot,noautostart. If one has a single
watchdog device that one does want to have auto-started, but several
others that one doesn't, the only way currently is to set the
CONFIG_WATCHDOG_AUTOSTART and then use the opt-out for the majority.
The main motivation for this is to add an autostarted watchdog device
to the sandbox (to test a fix) without having to set AUTOSTART in
sandbox_defconfig and add the noautostart property to the existing
devices. But it's also nice for symmetry, and the logic in
init_watchdog_dev() becomes simpler to read because we avoid all the
negations.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Correct pointer dereferencing check to be more consistent.
Eliminate the below smatch warning:
drivers/mmc/mmc.c:3118 mmc_init_device()
warn: variable dereferenced before check 'm' (see line 3116)
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
in FIFO mode transfers if events occur in the following order:
mask = dwmci_readl(host, DWMCI_RINTSTS);
// Hardware asserts DWMCI_INTMSK_DTO here
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);
if (mask & DWMCI_INTMSK_DTO) {
// Unreachable as DTO is cleared without being handled!
return 0;
}
Only clear interrupts that we have seen and are handling so that DTO is
not missed.
Signed-off-by: John Keeping <john@metanate.com>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (Rock PI 4B)
Tested-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The SDMMC IOs can be in an IO domain, that has to be enabled.
This is done by enabling vqmmc in the driver.
This has no impact on configurations not using an IO domain, the check
can then be executed on all platforms managing regulator, and the vqmmc
regulator enabled on all platforms having it in their DT.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The UHS modes for SD, HS200 and HS400 modes for eMMC are not supported
by the stm32_sdmmc2 driver.
Make it clear by removing the corresponding caps after parsing the DT.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
To support dual data rate with STM32 sdmmc2 driver, the dedicated bit
(DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass
(no divider) is not allowed in this case. This is required for the
eMMC DDR modes.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add Socionext F_SDH30_E51 IP support. The features of this IP includes
CMD/DAT line delay and force card insertion mode for non-removable cards.
And the IP needs to add some quirks.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
This patch defines a quirk to disable the block count
for single block transactions.
This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Get rid of discrepancy beween comment /* 250 ms */ and code
which shifts by 4 thus dividing by 16.
So change code to shift by 2 and make the timeout value 250 ms.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Array index for SCCR 22th DWORD should be 21.
Fixes: bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map")
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The flash's internal address mode is tracked by nor->add_mode_nbytes and
it is set to 3 in BFPT parse. SEMPER multi-die package parts (>1Gb) are
3- or 4-byte address mode by default, depending on model number. We need
to make sure that 4-byte address mode is used for multi-die package parts.
For single-die package parts (<=1Gb), registers can be accessed by 3-byte
address. Read, program, and erase use the 4B opcodes that always take
4-byte address regardless of flash's internal address mode.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Read/Write Any Register commands take 3- or 4- byte address depending on
flash's internal address mode. The nor->addr_width tracks number of
address bytes used in read/program/erase ops that can be 4
(with 4B opcodes) regardless of flash's internal address mode. The
nor->addr_mode_nbytes tracks flash's internal address mode so replace
nor->addr_width by that.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The nor->addr_width tracks number of address bytes used in
read/program/erase ops and eventually set to 4 for >16MB chips, regardless
of flash's internal address mode. For Infineon SEMPER flash's, we use
Read/Write Any Register commands for configuration and status check.
These commands take 3- or 4-byte address depending on flash's internal
address mode.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
JESD216D-01 mentions that "defaults to 3-Byte mode; enters 4-Byte mode on
command."
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add flash info table entries for s28hl512gt, s28hl01gt, and s28hs01gt.
These devices have the same functionality as s28hs512t.
In spi-nor-core, use device ID byte to detect S28 family instead of
device name.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Change configuration macro name to support all other devices in SEMPER S28
family.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Change prefix to support all other devices in SEMPER S28 family.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
- NC-SI handling support and enable on evb-ast2[56]00, gpio driver for
ADP5585, improve qfw support, print more sysresets info, gw_ventana
and gcc-12 bugfix, improve BCB support, fix a few typos and remove an
unused keymile CONFIG symbol.
In some cases, the param variable is wrong, and in other cases we have
undocumented arguments.
Fix the docs.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For other sandbox tests the printed test name corresponds to the
configuration except for this one.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
For some blk operations, it's possible that a different hw partition
gets selected via blk_dselect_hwpart().
In that case, only the region of the device covered by that partition
is accessible.
This breaks "bcb load" which attempts to read the gpt and assumes it's
on the user(0) hw partition:
=> bcb load 2 misc
GUID Partition Table Header signature is wrong: 0xDE7B17AD07D9E5D6 != 0x5452415020494645
find_valid_gpt: *** ERROR: Invalid GPT ***
GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645
find_valid_gpt: *** ERROR: Invalid Backup GPT ***
Error: mmc 2:misc read failed (-2)
Add a fail-safe in __bcb_load() to ensure we will always read from the
user(0) hwpartition.
This fixes the following fastboot sequence:
$ fastboot erase mmc2boot1 # switch to hwpart1
$ fastboot reboot bootloader # switch to hwpart0, then reads GPT
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Building with GCC 12.2 results in an error
board/gateworks/gw_ventana/gw_ventana.c:636:68: error: the comparison
will always evaluate as 'true' for the address of 'pwm_padmux' will
never be NULL [-Werror=address]
636 | } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") &&
| ^~
Remove the superfluous check.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Boards can have multiple sysresets, iterate all when printing sysreset
info.
Fixes: 23471aed5c ("board_f: Add reset status printing")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
At the moment the QEMU boot sequence tries various (storage) devices
when trying to find a payload to boot.
To simplify starting a specific kernel and initrd, there is also the qfw
command, which can use the files specified on the QEMU command line, via
the -kernel and -initrd options.
Add this command to the list of boot options to try. Since users
specifying those options on the command line probably explicitly want
to run them, let's place the new command first. Without those options,
the qfw command will just gracefully fail, and we continue with the
existing order.
This allows auto-booting of specific kernels in QEMU, for instance in CI
systems.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When we try to load a kernel via the QEMU firmware device, we currently
"return -1;" if no kernel was specified on the QEMU command line. This
leads to the usage output, which is confusing (since nothing on the
command line was really wrong), but also somewhat hides the actual error
message.
Return CMD_RET_FAILURE (1), as it's a proper error, and make the message
more clear that this is not only a "warning".
This helps to call this command in boot scripts, and to gracefully
continue if this doesn't work.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
At the moment the QEMU firmware command just prints the size of the
loaded binaries on the console.
To go with all the other load methods, and many boot scripts'
expectations, also store the size of the file loaded last in the
environment variable "filesize".
We first put the kernel size in there, but overwrite this with the
initrd size, should we have one, because this is probably the more
prominent user of $filesize (in the booti or bootz command).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Add gpio driver for ADP5585 I/O Expander Controller. The ADP5585 is a 10
input/output port expander and can be used to increase the number of
I/Os available to a processor.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Aspeed BMCs are commonly used with NC-SI. A system indicates the driver
should configure the link over NC-SI using the device tree.
Add it to the defconfig so we get compile coverage of the driver, even
if the EVBs do not normally use it.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Update the ftgmac100 driver to support NC-SI instead of an mdio phy
where available. This is a common setup for Aspeed AST2x00 platforms.
NC-SI mode is determined from the device-tree if either phy-mode sets it
or the use-ncsi property exists. If set then normal mdio setup is
skipped in favour of the NC-SI phy.
Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Adds an "ncsi" command to manually start NC-SI configuration.
Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Add the handling of NC-SI ethernet frames, and add a check at the start
of net_loop() to configure NC-SI before starting other network commands.
Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
- Enforce CONFIG_DM being enabled (which has been the case for all
boards for a bit now) and remove non-DM_KEYBOARD options as they're also
unused for some time now.
There are no platforms that have not migrated to using DM_KEYBOARD,
remove the legacy option.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are no longer any platforms which do not enable DM, move this to a
def_bool y and remove the check in the Makefile.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Merge tag 'u-boot-at91-fixes-2023.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91
First set of u-boot-at91 fixes for the 2023.01 cycle:
This small fixes set includes an indentation fix for sam9x60 DT and one
name for one pin for sama7g5.
When the imx8mm.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree. This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot. Fix this by adding the spba node to the spl
device tree to restore normal booting.
Based on the patch from Adam Ford for the imx8mn-beacon-kit-u-boot
board.
Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
When the imx8mm.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree. This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot. Fix this by adding the spba node to the spl
device tree to restore normal booting.
Based on the patch from Adam Ford for the imx8mn-beacon-kit-u-boot
board.
Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Fix the MMC env device for boards with eMMC by adding a
board_mmc_get_env_dev override to return the boot device as the
MMC env device.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
With sf update fixed to support unaligned start offset, use plain
sf update to update the bootloader in SPI NOR. This also helps
avoid the case where not enough SPI NOR has been erased and the
bootloader has been written to unerased area, and thus corrupted.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The btrfs filesystem provides advanced functionality like copy-on-write
and snapshots, as well as metadata and data duplication and checksumming.
Enable btrfs in U-Boot to permit even the primary partition to be btrfs
and let system boot from it.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
issue:
CAAM fails with key error when perform Modular Exponentiation
using PKHA Block in CAAM
Fix:
add flush and invalidate dcache for keys, signature
and output decrypted data processed by CAAM.
Fixes: 34276478f7 (DM: crypto/fsl - Add Freescale rsa DM driver)
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Update the distro config env memory layout for the Apalis iMX6,
Colibri iMX6, Colibri iMX6ULL and Colibri iMX7:
- loadaddr=0x84200000 (resp. 0x14200000 on them i.MX 6) allows for 64MB
area for uncompressing (ie FIT images)
- fdt_addr_r = loadaddr + 64MB : allows for 64MB kernel
- scriptaddr = fdt_addr_r + 512KB : allows for 512KB fdt
- pxefile_addr_r = scriptaddr + 512KB : allows for 512KB script
- ramdisk_addr_r = pxefile_addr_r + 512KB : allows for 1MB extlinux.conf
Memory layout analogous to 64-bit one from commit fd5c7173ade4
("imx8m{m,n}_venice: update env memory layout") but left pxefile_addr_r
updated according to doc/develop/distro.rst.
This fixes a potential issue caused by the compressed kernel being
relocated on top of the ramdisk causing its corruption.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
After commit 395110284b56 ("nitrogen6x: Populate FDTFILE at build-time
for all platforms") iMX.6Q Sabrelite fails to boot due to a bad fdtfile
string:
Retrieving file: /dtbs/5.18.0-0.deb11.4-armmp/"imx6q-sabrelite".dtb
** File not found /dtbs/5.18.0-0.deb11.4-armmp/"imx6q-sabrelite".dtb **
CONFIG_DEFAULT_DEVICE_TREE option is string typed, so __stringify() is
adding extra quotes. Remove this.
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
The QSPI clocks are only used when CONFIG_NXP_FSPI=y, so only build the
QSPI clocks in this case to reduce the final SPL binary size.
Signed-off-by: Fabio Estevam <festevam@denx.de>
The ecspi clocks are only used when CONFIG_DM_SPI=y, so only build the
ecspi clocks in this case to reduce the final SPL binary size.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Ethernet is not used inside SPL, so move the IMX8MM_CLK_ENET_AXI clock
inside the non-SPL block to reduce the final SPL binary size.
Signed-off-by: Fabio Estevam <festevam@denx.de>
PWM is not used inside SPL, so do not define the PWM clocks inside
SPL to reduce the final SPL binary size.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Move init_clk_usdhc to non-clk driver case, since assigned-clocks properties
will initialize the clocks by clk driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
... to avoid loosing characters when pasting text into the serial console.
This allows to remove the workaround to disable the vidconsole output
when no HDMI device is detected. This workaround only was there to speed-up
serial console processing.
Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Add Serial Download Protocol support as it is a useful method to
load flash.bin to RAM and run it via 'uuu'.
With this patch, it is possible to start both U-Boot SPL and U-Boot
proper using the following 'uuu'command:
$ uuu -brun spl flash.bin
Based on a patch from Marek Vasut for the imx8mm-mx8menlo board.
Also, to fit the SPL binary into the internal RAM, select CONFIG_LTO
to reduce its size.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Add an entry for USB boot so that U-Boot could be loaded via
the Serial Download Protocol.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Enable DM USB, DM PHY and USB gadget support in imx8mm-mx8menlo SPL
to let the board continue SDP loading of second stage after the first
stage was loaded by BootROM SDP implementation. It is not possible to
jump back into BootROM v1 and let the BootROM implementation continue
the SDP loading, all this has to be performed by the U-Boot CI HDRC
controller driver and SDP protocol implementation, both of which fit
into the SPL just barely.
With this patch, it is possible to start both U-Boot SPL and U-Boot
using e.g. uuu on this board as follows:
$ uuu -brun spl flash.bin
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The current implementation of spl_board_init() USB boot handling is
not correct, the MX8MM BootROM v1 does not support SDP load when
re-entered from U-Boot SPL, it is up to U-Boot to perform the next
stage load using its own internal CI gadget driver and SDP protocol
implementation. Drop the spl_board_init() to let SPL continue with
normal load in case the SDP support is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The current implementation of spl_board_init() is not correct,
the MX8MM BootROM v1 does not support SDP load when re-entered
from U-Boot SPL, it is up to U-Boot to perform the next stage
load using its own internal CI gadget driver and SDP protocol
implementation. Drop the spl_board_init() to let SPL continue
with normal load in case the SDP support is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Instead of duplicating code implemented by i.MX8M version of arch_misc_init()
in every board, enable CONFIG_ARCH_MISC_INIT and call arch_misc_init() from
spl_board_init(). This removes the duplication. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The signal name of pin PB2 with function F is FLEXCOM11_IO1
as it is defined in the datasheet.
Fixes: 558378a4cd ("ARM: mach-at91: add support for new SoC sama7g5")
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
The indentation went far on the right due to an extra tab for
each pinctrl sub-nodes.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
- dts update and sync for rk356x, rk3288, rk3399 from Linux;
- Add rk3399 EAIDK-610 board support;
- Update for puma-rk3399 board;
- some fix and typo fix in different drivers;
The first production revision of the MX8M Mini Menlo board implements
a hardware change which swaps console UART and another UART connector.
Implement the swap, which maps the console UART back to the way Verdin
console is mapped.
Signed-off-by: Marek Vasut <marex@denx.de>
The GW7903 revision B adds two additional GPIO's to control the
direction of the 2 isolated digital I/O circuits.
Define them as:
- dig1_ctl
- dig2_ctl
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Update the GW74xx PMIC configuration:
- increase VDD_SOC DVS1 to 0.85V per datasheet
- increase VDD_SOC DVS0 to 0.95V before first DRAM access
- increase VDD_ARM DVS0 to 0.95V to support kernel overdrive voltage (OD)
- remove unnecessary changes to VDD_DRAM as we don't use 3GHz DRAM
- remove unnecessary change to LDO2 as it is unused
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
v2: update commit log with more detail
Update the M2 socket gpio hogs such that they are not active on boot by
flagging them as GPIO_ACTIVE_HIGH so that 'output-high' drives high.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Update the UART config gpio hogs such that it is configured for RS232
by default on boot. Additionally rename them to match the names used
on the reset of the venice boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add RAM auto-sizing, without this change memory size for all SKU is set
to 8GB and the system will crash on SKU with less memory as soon as the
non existent memory addresses are accessed.
Fixes: 2bc2f817cea7 ("board: toradex: add verdin imx8m plus support")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
With this call the following attributes get set to the device-tree
and are then accessible from linux in /proc/device-tree/
serial-number: The serial number that is stored in config-block
toradex,board-rev: The version of the module (e.g. V1.1A)
toradex,product-id: The SKU number of the module runnin
Fixes: commit 2bc2f817cea7 ("board: toradex: add verdin imx8m plus support")
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
With this call the following attributes get set to the device-tree
and are then accessible from linux in /proc/device-tree/
serial-number: The serial number that is stored in config-block
toradex,board-rev: The version of the module (e.g. V1.1A)
toradex,product-id: The SKU number of the module running
Fixes: commit 14d5aeff776b ("board: toradex: Add Verdin iMX8M Mini support")
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Enable the I2C bus and set a env variable for the reset GPIO of the touch
controller. This allows us to probe the panel in a script.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This adds support for the Kontron Electronics SoM SL i.MX8MM OSM-S
and the matching baseboard BL i.MX8MM OSM-S.
The SoM hardware complies to the Open Standard Module (OSM) 1.0
specification, size S (https://sget.org/standards/osm).
The existing board configuration for the non-OSM SoM is reused and
allows to detect the SoM variant at runtime.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Refactor the code a bit without any functional changes.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Improve the naming of the regulators to contain the voltage rail
names from the schematic.
Suggested-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
It turns out that it is not necessary to declare the VSELECT signal as
GPIO and let the PMIC driver set it to a fixed high level. This switches
the voltage between 3.3V and 1.8V by setting the PMIC register for LDO5
accordingly.
Instead we can do it like other boards already do and simply mux the
VSELECT signal of the USDHC interface to the pin. This makes sure that
the correct voltage is selected by setting the PMIC's SD_VSEL input
to high or low accordingly.
Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This adjusts the names of the boards and SoMs to the official naming
used by Kontron marketing. These changes also affect devicetree
names and compatibles. The same changes have been submitted to the
Linux kernel.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This sets an env variable 'som_type' from the board code. It can
later be used by environment scripts, e. g. to select the proper
devicetree for the board.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
These parameters are needed for stable performance on new hardware
with Nanya LPDDR4 chips.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
The new stable configuration is missing the 100mt setpoint, remove
it before updating the config to make sure the changes are separated
cleanly.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Fix the spaces and alignment for easier tracking of changes and comparing
with configs generated by the tools.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable the bootaux command in order to be able to load a
binary into the M4 core when needed.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Move the environment from the board header to a separate text file
and also drop those variables that are already set in env_default.h
from the Kconfig options.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
In case we boot from SD card or eMMC, we also want to load
the environment from the according boot device.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable the redundant environment feature to allow falling back in case of
storage corruption. The partition layout for the SPI NOR device is added
to the devicetree.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable the MTD command to be used for the SPI NOR on the SoM.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This allows using the command line with longer lines like
large scripts in env variables.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Nowadays detecting the SPI NOR as boot device from the ROMAPI is
fixed and works even if the SPI NOR is used as fallback boot device.
Therefore we don't need this workaround anymore.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This was initially enabled, but got accidentally dropped while
migrating Kconfig options and resyncing the defconfig in:
commit 9802154a94d6 ("configs: Resync with savedefconfig")
Let's enable this again to be able to boot from SPI NOR.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
The display isn't and won't be used in U-Boot. Also the display setup
is not yet supported in mainline Linux, so even for cases where the
U-Boot devicetree is passed to the kernel there is currently no use
for this configuration.
Selecting the proper configuration in the kernel FIT image automatically
depending on the detected hardware can be handled by a script in the
environment.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Move the environment from the board header to a separate text file
and also drop those variables that are already set in env_default.h
from the Kconfig options or are not needed anymore.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Instead of checking both, SPI NOR and MMC for loading U-Boot proper
and the environment, implement a way to detect the actual boot
device even if the BootROM doesn't report it and we can't rely
solely on the fuse settings, as by default we use MMC as primary
boot device and boot from SPI NOR via the secondary fallback device
(EEPROM Recovery Mode).
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
The SPI NOR is on ECSPI1 so CONFIG_ENV_SPI_BUS should be 1
to detect the environment on the SPI NOR.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
The board support was merged at the same time as some Kconfig options
for SPL were migrated/renamed. As a result some essential features
like serial output, MMC support, etc. are currently missing. Fix this
by enabling the required options.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
There is no reason for restricting the use of the flash.bin target
to the i.MX8 platform. Others can benefit from this as well.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
When booting from USB/SDP mmc_get_env_dev() returns
CONFIG_SYS_MMC_ENV_DEV as the MMC env device (while booting from MMC
will call board_mmc_get_env_dev() to get this). Configure
CONFIG_SYS_MMC_ENV_DEV for SDHC3 (devno=2) as all Gateworks Venice
boards use SDHC3 as eMMC so that persistent env works when booting from
USB/SDP.
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This contains various fixes (some long overdue) for the next release.
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Merge tag 'clk-2023.01' of https://source.denx.de/u-boot/custodians/u-boot-clk
Clock patches for 2023.01
This contains various fixes (some long overdue) for the next release.
Beside some rather unexciting sync of the DTs from the kernel tree, and
some Kconfig cleanup, there are some improvements for the ARMv5 Allwinner
family, to support boards with the F1C200s (64MB DRAM) better. We will
get actual board support as soon as the DTs have passed the Linux review
process.
There is also support for the X96 Mate TV Box, featuring the H616 SoC and
a full 4GB of DRAM.
Also we found the secret to enable SPI booting on the H616 (pin PC5 must
be pulled to GND), so the SPI boot support patch is now good to go.
Passed the gitlab CI, plus briefly tested on Pine64-LTS, LicheePi Nano,
X96 Mate and OrangePi Zero.
Check firmware_fdt_addr header to see if it
is a valid fdt blob.
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The IPI scheme in OpenSBI has been updated to support 8-core AE350
platform, the plicsw configuration needs to be modified accordingly.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Since OpenSBI commit bf3ef53bb7f5 ("firmware: Enable FW_PIC by default"),
OpenSBI runs directly at the load address without any code movement.
This causes the SPL version of QEMU 'virt' U-Boot does not boot Linux
kernel anymore. In that case, OpenSBI is loaded and runs at 0x81000000,
and it creates a 512KiB PMP window from that address. When booting
the Linux kernel, moving kernel to its linking address 0x80200000
overlaps the PMP window, and a PMP access failure is raised.
Update SPL_OPENSBI_LOAD_ADDR to load OpenSBI to a safe address.
Reported-by: Yangjie Zhang <pyjmstr@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Yangjie Zhang <pyjmstr@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The k210 driver is selected by sandbox_defconfig.
Building the sandbox on 32bit systems fails with:
test/dm/k210_pll.c: In function ‘dm_test_k210_pll_calc_config’:
include/linux/bitops.h:11:38: warning:
left shift count >= width of type [-Wshift-count-overflow]
11 | #define BIT(nr) (1UL << (nr))
| ^~
test/dm/k210_pll.c:36:54: note: in expansion of macro ‘BIT’
36 | error = abs((error - BIT(32))) >> 16;
| ^~~
Use the BIT_ULL() macro to create a u64 value.
Replace abs() by abs64() to get correct results on 32bit system
Apply the same for the unit test.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
The riscv32 toolchain for GCC-12 provided by kernel.org contains libgcc.a
compiled for double-float. To link to it we have to adjust how we build
U-Boot.
As U-Boot actually does not use floating point at all this should not
make a significant difference for the produced binaries.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
In the sbi command use the same short texts for the legacy extensions
as the SBI specification 1.0.0.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
If calling 'Get SBI specification version' fails, write an error message
and return CMD_RET_FAILURE.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The SBI command can print out the version number of the SBI implementation.
Choose the correct output format for RustSBI.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
In clk_clean_rate_cache, clk->rate should update the private clock
struct, in particular when CCF is activated, to save the cached
rate value.
When clk_get_parent_rate is called, the cached information
is read from pclk->rate, with pclk = clk_get_parent(clk).
As the cached is read from private clk data, the update should
be done also on it.
Fixes: 6b7fd3128f7 ("clk: fix set_rate to clean up cached rates for the hierarchy")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220620153717.v2.1.Ifa06360115ffa3f3307372e6cdd98ec16759d6ba@changeid
Link: https://lore.kernel.org/r/20220712142352.RESEND.v2.1.Ifa06360115ffa3f3307372e6cdd98ec16759d6ba@changeid/
All functions getting and setting clock rate use ulong for rate, only
clk_get_parent_rate is an exception. Change the return value to match
other clock rate funcrions.
Most users directly assign the rate to unsigned long anyway, and the few
users that use u64 (not s64) multiply the rate so they may need the
extra bits for the result in their use case.
Fixes: 4aa78300a0 ("dm: clk: Define clk_get_parent_rate() for clk operations")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220928103757.11870-1-msuchanek@suse.de
Some boards with the Allwinner F1C100s family SoCs use UART1 for its
debug UART, so define the pins for the SPL and the pinmux name and mux
value for U-Boot proper.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
So far we stated the lack of a lowlevel() init function for the
Allwinner F1C100s board by defining the respective SKIP_* symbol in the
board's defconfig. However we don't expect any *board* to employ such
low level code, so expect this to be never used for the ARMv5 Allwinner
SoCs.
Select the appropriate symbols in the Kconfig, so that we can remove
them from the defconfig, and avoid putting them in future defconfigs for
other boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The default load addresses for the various payloads (kernel, DT,
ramdisk) on systems with just 32MB of DRAM have some issues:
For a start the preceding comment doesn't match the actual values:
apparently they were copied from the 64MB S3 layout, then halved, but
since 0x5 is NOT the half of 0x10, they don't match up.
Also those projected maximum sizes are quite restrictive: it's not easy
to build a compressed kernel image with just 4MB. The only defconfig in
mainline Linux that supports the F1C100s (the only 32MB user so far)
creates a 6MB compressed / 15MB uncompressed kernel.
Rearrange the default load addresses to accommodate such a kernel: we
allow an 7MB/16MB kernel, and up to 5MB of ramdisk, stuffing the smaller
binaries like the DTB towards the end, just before the relocated U-Boot.
Shrink the size for DTB and scripts on the way, there is no need for
allowing up to 512K for them.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Traditionally we assumed that every Allwinner board would come with at
least 256 MB of DRAM, and set our DRAM layout accordingly. This affected
both the default load addresses, but also U-Boot's own address
expectations (like being loaded at 160 MB).
Some SoCs come with co-packaged DRAM, but only provide 32 or 64MB. So
far we special-cased those *chips*, as there was only one chip per DRAM
size. However new chips force us to take a more general approach.
Introduce a Kconfig symbol, which provides the minimum DRAM size of the
board. If nothing else is specified, we use 256 MB, and default to
smaller values for those co-packaged SoCs.
Then select the different DRAM maps according to this new symbol, so
that different SoCs with the same DRAM size can share those definitions.
Inspired by an idea from Icenowy.
This is just refactoring: compiled for all boards before and after this
patch: the binaries were identical.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
As the compile error when D-Cache is enabled is gone, we can have
D-Cache enabled now.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The enable_caches function in architecture-specific board code is only
necessary for V7A CPUs, code for both V8A and ARM926 have already
declared this function.
Only provide our implementation of enable_caches() for V7A CPUs.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The X96 Mate TV box is a TV box with the Allwinner H616 SoC. It is
available with up to 4GB of DRAM and 64GB eMMC.
The DRAM chips require a different configuration when compared to the
OrangePi Zero2, we must not use read/write training and write leveling.
Add a defconfig for the box, so that we can easily build U-Boot for it.
We synced the .dts file already from the kernel tree.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
At present the display does not work since it needs the reset driver to
operate. Fix this by enabling it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: cd529f7ad62 ("rockchip: video: edp: Add missing reset support")
Fixes: 9749d2ea29e ("rockchip: video: vop: Add reset support")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Now that a single binary containing TPL/SPL correctly formatted for SPI
flashes and U-Boot proper, can be generated by binman, let's do it.
Also update the documentation to tell the user to use this newly
generated file instead of manually generating and flashing the binaries.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The offset of the SPL payload on Puma is different than for other
Rockchip devices in that it is stored at offset 256K instead of much
further away in the MMC.
Flashing one binary instead of two at different offsets is much more
user friendly so let's migrate to it by modifying the offset in the Puma
specific Device Tree.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Depending on the toolchain used to compile the SPL for Puma RK3399-Q7
module, the board does not boot because the resulting binary is too big
to fit in SRAM.
Let's add a TPL so that there's no need to fiddle with or hack the
defconfig to have a working bootloader.
This follows what's been done for the majority of other RK3399-based
boards.
See the original commit for the first migrations:
bdc00080111f "rockchip: rk3399: update defconfig for TPL"
Unfortunately, the offset in SPI-NOR for U-Boot proper needs to be
modified, since the move from SPL to TPL+SPL for idbloader.img (and the
"only the first 2KB per 4KB blocks are written" "hack" for rkspi format)
increased the size above 256KB. Let's move it to 512KB to, hopefully, be
safe.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The SPL payload offset when booting from SPI defaults to
CONFIG_SYS_SPI_U_BOOT_OFFS but can be overridden by
u-boot,spl-payload-offset. The Device Tree for Puma Haikou has this
property so there's no need to have this one option in the defconfig,
especially since they are not in sync and therefore confusing.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chances are when one boots U-Boot proper from a given storage medium,
they want the same medium to be used to load and store the environment.
This basically allows to have completely separate U-Boot (TPL/SPL/U-Boot
proper/environment) per storage medium which is convenient when working
with recovery from SD-Card as one would just need to insert a properly
configured SD-Card into the device to have access to their whole debug
setup.
No fallback mechanism is provided as to not dirty other storage medium
environment by mistake. However, since arch_env_get_location() is called
by env_init() which is part of the pre-relocation process, a valid,
non-ENVL_UNKNOWN, value shall be returned otherwise the relocation fails
with the following message:
initcall sequence 00000000002866c0 failed at call 0000000000256b34 (err=-19)
This valid, non-ENVL_UNKNOWN, value is ENVL_NOWHERE which requires to
always select CONFIG_ENV_IS_NOWHERE otherwise this work-around does not
work.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's a SPI-NOR flash available from which SPL and U-Boot proper can
be booted, it makes sense to also allow this medium to store U-Boot
environment so let's enable it.
The Device Tree advertises a max frequency of 50MHz so let's set the
config option appropriately.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Automatically detect which MMC device (SD-Card or eMMC) was used to load
U-Boot proper and load the environment from that MMC device instead of
a hardcoded one.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
CONFIG_ENV_OFFSET is set in the defconfig to a different value already
so this isn't used. Let's remove it as to not confuse users.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Trying to load U-Boot proper from SPL when SPL was not loaded from
SD-Card is currently not working because the SDMMC pins aren't muxed
correctly. It is assumed the BootROM is doing this for us when booting
from SD-Card hence why it's not needed when booting TPL/SPL from
SD-Card.
The pinctrl properties are removed from the SPL DT property removal list
and the pinctrl configuration nodes made available in the SPL DT, in
addition to the pull-up configurations to allow loading U-Boot proper
from SD-Card as a fallback mechanism for SPI-NOR and eMMC.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On Haikou devkit, it is possible to disable eMMC and SPI-NOR to force
booting from SD card or USB via rkdeveloptool by toggling a switch. This
switch needs to be overridden in software to be able to access eMMC and
SPI-NOR once the device has booted from SD Card. Puma SoM can override
this pin via gpio3_d5.
Until now, fixed regulator device was abused to model this, but since
there's now support for GPIO hogs, let's use it.
Since we want to be able to boot the SPL from SD Card but give it the
ability to load U-Boot proper from a fallback medium such as eMMC and
SPI-NOR, SPL support for GPIO hogs needs to be enabled too. Support for
other kinds of regulators are not needed anymore, so let's disable them.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
distroboot should try first on the same MMC medium as the one the SPL
loaded U-Boot proper from. This was the case when the introducing commit
was merged because the default order was eMMC first and then SD card.
The check was therefore made only on whether we booted from SD card,
because otherwise the order was the expected one.
However, in commit b212ad24a604 ("rockchip: Fix MMC boot order"), the
order was swapped. Meaning our simple check is now useless.
Let's fix that by accounting for all scenarii: default boot_targets has
mmc0 first but booting from SD Card, mmc1 first but booting from eMMC.
Fixes: b212ad24a604 ("rockchip: Fix MMC boot order")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Specification
- Rockchip RK3399
- LPDDR3 4GB
- TF sd scard slot
- eMMC
- AP6255 for WiFi + BT
- Gigabit ethernet
- HDMI out
- 40 pin header
- USB 2.0 x 2
- USB 3.0 x 1
- USB 3.0 Type-C x 1 work in otg mode
- 12V DC Power supply
The dts file is sync from linux-next[0].
[0]:https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
CONFIG_SERIAL_TAG is not selectable for ARM64 machines. While
get_board_serial is weakly defined if ENV_VARS_UBOOT_RUNTIME_CONFIG is
defined, it is only called when CONFIG_SUPPORT_PASSING_ATAGS is defined,
which also is not selectable for ARM64 machines. Therefore this is dead
code so let's remove it.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RAM_PX30_DDR4 is for DDR4 support and not DDR3 so let's fix the typo.
Fixes: 2db36c64bd5a ("ram: rockchip: px30: add a config-based ddr selection")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
UART0 can obviously also be used for debug uart in U-Boot, so let's add
its support.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The check to perform is on CONFIG_SPL_GPIO and not SPL_GPIO.
Because this was never compiled in, it missed an include of cru.h that
was not detected before. Let's include it too.
Also switch to IS_ENABLED in-code check as it is the preferred
inclusion/exclusion mechanism.
Fixes: 07586ee4322a ("rockchip: rk3399: Support common spl_board_init")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The check to perform is on CONFIG_SPL_DM_REGULATOR and not
SPL_DM_REGULATOR. Also switch to in-code check instead of ifdefs.
Fixes: 07586ee4322a ("rockchip: rk3399: Support common spl_board_init")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com> # Rock960
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The original code set up the DDR clock to 48 MHz, not 50MHz as
requested, and did it in a way that didn't satisfy the Application
Notes in RK3399 TRM [1]. 2.9.2.B says:
PLL frequency range requirement
[...]
FOUTVCO: 800MHz to 3.2GHz
2.9.2.A :
PLL output frequency configuration
[...]
FOUTVCO = FREF / REFDIV * FBDIV
FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2
FREF = 24 MHz
The original code gives FOUTVCO: 24MHz/1 * 12 = 288MHz < 800MHz
And the resulting FOUTPOSTDIV is 288MHz / 3 / 2 = 48MHz
but the requested frequency was 50MHz
Note:
2.7.2 Detail Register Description
PMUCRU_PPLL_CON0 says
fbdiv
Feedback Divide Value
Valid divider settings are:
[16, 3200] in integer mode
So .fbdiv = 12 wouldn't be right. But 2.9.2.C says:
PLL setting consideration
[...]
The following settings are valid for FBDIV:
DSMPD=1 (Integer Mode):
12,13,14,16-4095 (practical value is limited to 3200, 2400, or 1600
(FVCOMAX / FREFMIN))
[...]
So .fbdiv = 12 would be right.
In any case FOUTVCO is still wrong. I thank YouMin Chen for
confirmation and explanation.
Despite documentation, I don't seem to be able to reproduce a
practical problem with the wrong FOUTVCO. When I initially found it I
thought some problems with detecting the RAM capacity in my Rock Pi 4B
could be related to it and my patch seemed to help. But since I'm no
longer able to reproduce the issue, it works with or without this
patch. And meanwhile a patch[2] by Lee Jones and YouMin Chen addresses
this issue. Btw, shouldn't that be commited?
So this patches solves no visible problem. Yet, to prevent future
problems, I think it'd be best to stick to spec.
An alternative to this patch could be
{.refdiv = 1, .fbdiv = 75, .postdiv1 = 6, .postdiv2 = 6};
This would theoretically consume more power and yield less jitter,
according to 2.9.2.C :
PLL setting consideration
[...]
For lowest power operation, the minimum VCO and FREF frequencies
should be used. For minimum jitter operation, the highest VCO and
FREF frequencies should be used.
[...]
But I haven't tried it because I don't think it matters much. 50MHz
for DDR is only shortly used by TPL at RAM init. Normal operation is
at 800MHz. Maybe it's better to use less power until later when more
complex software can control batteries or charging or whatever ?
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Link: [1] https://opensource.rock-chips.com/images/e/ee/Rockchip_RK3399TRM_V1.4_Part1-20170408.pdf
Link: [2] https://patchwork.ozlabs.org/project/uboot/list/?series=305766
Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Tested-by: Michal Suchánek <msuchanek@suse.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Partial sync of rk3288.dtsi from Linux version 5.18
Changed:
only properties and functions that are not yet included
swap some clocks positions
fix some irq numbers
style and sort nodes
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to better compare the Linux rk3288.dtsi version
with the u-boot version update the cpu and gpu nodes.
Changed:
use operating-points-v2
update thermal for all cpus
add labels to all cpus
change gpu compatible
change gpu interrupt names
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to better compare the Linux rk3288.dtsi version
with the u-boot version move thermal sub nodes to the dtsi
file and remove rk3288-thermal.dtsi
Changed:
replace underscore in nodename
remove comments about sensor and ID
use gpu phandle
add #cooling-cells to gpu node
lower critical temparature
remove linux,hwmon property
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This is not needed or used, and adds code size. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The phycore_rk3288 board has a SPL size problem,
so remove phycore_init() function to stay within the limits.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
All of the required values for using the omap_wdt.c driver are found in
<asm/ti-common/omap_wdt.h> and this is what is indirectly pulled in via
<asm/arch/hardware.h> when it exists.
Signed-off-by: Tom Rini <trini@konsulko.com>
For some unknown reason GNU assembler version 2.31.1 (arm-linux-gnueabi-as
from Debian Buster) cannot compile following code from located in file
board/nokia/rx51/lowlevel_init.S:
kernoffs:
.word KERNEL_OFFSET - (. - CONFIG_SYS_TEXT_BASE)
when CONFIG_SYS_TEXT_BASE is set to 0x80008000. It throws strange compile
error which is even without line number:
AS board/nokia/rx51/lowlevel_init.o
{standard input}: Assembler messages:
{standard input}: Error: attempt to get value of unresolved symbol `L0'
make[2]: *** [scripts/Makefile.build:293: board/nokia/rx51/lowlevel_init.o] Error 1
I have no idea about this error and my experiments showed that ARM GNU
assembler is happy with negation of that number. So changing code to:
kernoffs:
.word . - CONFIG_SYS_TEXT_BASE - KERNEL_OFFSET
and then replacing mathematical addition by substraction of "kernoffs"
value (so calculation of address does not change) compiles assembler file
without any error now.
There should be not any functional change.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These hardware register definitions are common for all K3, remove
duplicate data them by moving them to hardware.h.
While here do some minor whitespace cleanup + grouping.
Signed-off-by: Andrew Davis <afd@ti.com>
This matches how this would be done in Linux and these functions
do the alignment for us which makes the code look cleaner.
Signed-off-by: Andrew Davis <afd@ti.com>
DMA operations should function on DMA addresses, not virtual addresses.
Although these are usually the same in U-Boot, it is more correct
to be explicit with our types here.
Signed-off-by: Andrew Davis <afd@ti.com>
We should clean the caches before any DMA operation and clean+invalidate
after. This matches what the DMA framework does for us already but adds
it to the two functions here in this driver that don't yet go through the
new DMA framework.
Signed-off-by: Andrew Davis <afd@ti.com>
The DMA'd memory area needs cleaned and invalidated after the DMA
write so that any stale cache lines do not mask new data.
Signed-off-by: Andrew Davis <afd@ti.com>
This matches what we did for pre-K3 devices. This allows us to build
boot commands that can check for our device type at runtime.
Signed-off-by: Andrew Davis <afd@ti.com>
Add support for j784s4-wiz-10g device which has two core reference
clocks (e.g core_ref_clk, core_ref1_clk) which requires an additional
mux selection option.
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Move to latest DDR4 1600MT/s for k3-am64-evm based on EMIF tool
v0.08.40.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Move k3-am64-sk to use 1600MT/s LPDDR4 configuration and update to latest EMIF
tool v0.08.40.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Support VBE OS requests / fixups
Minor error-handling tweaks to bootm command
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Merge tag 'dm-pull-18oct22' of https://source.denx.de/u-boot/custodians/u-boot-dm
Update uclass iterators to work better when devices fail to probe
Support VBE OS requests / fixups
Minor error-handling tweaks to bootm command
The OrangePi Zero 2 board comes with 2MB of SPI flash, from which the
BROM is able to boot from. Please note that the fuse setup requires
PC5 (BOOT_SEL3) to be pulled to GND for that to actually work.
Enable the SPL code responsible for finding and loading U-Boot proper and
friends, so that u-boot-sunxi-with-spl.bin can be written into the flash.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Ivan Shishkin <s45rus@gmail.com>
The H616 SoC uses the same SPI IP as the H6, also shares the same clocks
and reset bits.
The only real difference is a slight change in the pin assignment: the
H6 uses PC5, the H616 PC4 instead. This makes for a small change in
our spi0_pinmux_setup() routine.
Apart from that, just extend the H6 #ifdef guards to also cover the H616,
using the shared CONFIG_SUN50I_GEN_H6 symbol.
Also use this symbol for the Kconfig dependency.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Ivan Shishkin <s45rus@gmail.com>
When some configuration symbols were converted from header files to
Kconfig, their values were placed into *every* defconfig file.
Since we now have sensible per-SoC defaults defined in Kconfig, those
values are now redundant, and can just be removed.
This affects CONFIG_SPL_STACK, CONFIG_SYS_PBSIZE, CONFIG_SPL_MAX_SIZE,
and CONFIG_SYS_BOOTM_LEN.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Some configuration symbols formerly defined in header files were
recently converted to Kconfig symbols. This moved their value definition
into *every* defconfig file, even though those values are hardly board
choices.
Use the new Kconfig option to define per-SoC default values, in just one
place, which makes the definition in each defconfig file redundant.
We refrain from setting a sunxi specific value for CONFIG_SYS_BOOTM_LEN,
so this defaults to a much better 64MB for uncompressed arm64 kernels.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Update the devicetree files from the Linux kernel, version v6.0-rc4.
This is covering the 32-bit SoCs, from arch/arm/boot/dts/.
This avoids the not backwards-compatible r_intc binding change, to allow
older kernels to boot, but the other nodes are updated.
Not much change here, the vast majority is actually cosmetic: node names
and using symbolic names for the the RTC clocks.
The R40 boards gain DVFS support.
Some A23/A33 tablet DTs are unified into a single file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Update the devicetree files from the Linux kernel, version v6.0-rc4.
This is covering the 64-bit SoCs, from arch/arm64/boot/dts/allwinner.
This avoids the not backwards-compatible r_intc binding change, to allow
older kernels to boot, but the other nodes are updated.
Not much change here, the vast majority is actually cosmetic: node names
and using symbolic names for the the RTC clocks.
Some A64 boards gain some audio nodes.
The H616 DTs are now switched to the version finally merged into the
kernel, which brings some changes, but none affecting U-Boot.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Fix the compilation issue when CONFIG_DEBUG_UART is activated
drivers/serial/serial_stm32.o: in function `debug_uart_init':
drivers/serial/serial_stm32.c:291: undefined reference to \
`board_debug_uart_init'
The board_debug_uart_init is needed for SPL boot, called in
cpu.c::mach_cpu_init(); it is defined in board/st/stm32mp1/spl.c.
But with the removal #ifdefs patch, the function debug_uart_init() is
always compiled even if not present in the final U-Boot image.
This patch adds a file to provided this function when DEBUG_UART and SPL
are activated.
Fixes: c8b2eef52b6c ("stm32mp15: tidy up #ifdefs in cpu.c")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The PWR regulators don't need be removed as they are already deactivated.
This patches is a alignment with the accepted patch in Linux device tree
in commit a34b42f8690c ("ARM: dts: stm32: fix pwr regulators references
to use scmi").
Fixes: 69ef98b209e7 ("ARM: dts: stm32mp15: alignment with v5.19")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Fix the frequencies listed in PLL configuration comments to match
the actual frequencies programmed into hardware. Furthermore, add
a comment which explains how those frequencies are calculated, so
it won't be necessary to look it up all over the datasheet and
make more mistakes in the calculation in the future.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add DT for DHCOR Testbench board, which is a testbench for testing of
DHCOR SoM during manufacturing. This is effectively a trimmed down
version of AV96 board with CSI-2 bridge, HDMI bridge, WiFi, Audio and
LEDs removed and used as GPIOs instead. Furthermore, the PMIC Buck3
is always configured from PMIC NVM to cater for both 1V8 and 3V3 SoM
variant.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The btrfs filesystem provides advanced functionality like copy-on-write
and snapshots, as well as metadata and data duplication and checksumming.
Enable btrfs in U-Boot to permit even the primary partition to be btrfs
and let system boot from it.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In case the regulator-always-on is present in regulator DT node,
the regulator is always reconfigured to the voltage set in DT on
probe, even if regulator_set_value() has been called before. Drop
the property from AV96 U-Boot DT and enable the regulator manually
in code, as the board already reconfigures the Buck3 regulator in
code per PMIC NVM content instead.
Fixes: 0adf10a87b1 ("ARM: dts: stm32: Configure Buck3 voltage per PMIC NVM on Avenger96")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
When a FIT includes some OS requests, U-Boot should process these and add
the requested info to corresponding subnodes of the /chosen node. Add a
pytest for this, which sets up the FIT, runs bootm and then uses a C
unit test to check that everything looks OK.
The test needs to run on sandbox_flattree since we don't support
device tree fixups on sandbox (live tree) yet. So enable BOOTMETH_VBE and
disable bootflow_system(), since EFI is not supported on
sandbox_flattree.
Add a link to the initial documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this function's comment and also the livetree documentation, so it
is clear when to use the function.
Signed-off-by: Simon Glass <sjg@chromium.org>
As a starting point, add support for providing random data, if requested
by the OS. Also add ASLR, as a placeholder for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
(fixed up to use uclass_first_device_err() instead)
To avoid duplicating code, create a new fit_util module which provides
various utility functions for FIT. Move this code out from the existing
test_fit.py and refactor it with addition parameters.
Fix up pylint warnings in the conversion.
This involves no functional change.
Signed-off-by: Simon Glass <sjg@chromium.org>
Make sure the log_msg_ret() values are unique so that the log trace is
unambiguous with LOG_ERROR_RETURN. Also avoid reusing the 'node' variable
for two different nodes in bootmeth_vbe_simple_ft_fixup(), since this is
confusing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we support multiple device trees with the ofnode interface, we
can pass the correct FDT to this event. This allows the 'working' FDT to
be fixed up, as expected, so long as OFNODE_MULTI_TREE is enabled.
Also make sure we don't try to do this with livetree, which does not
support fixups yet.
Signed-off-by: Simon Glass <sjg@chromium.org>
This information needs to be set up by the bootstd tests as well. Move it
into a common function and ensure it is executed before any bootstd test
is run.
Make sure the 'images' parameter is set correctly for fixups.
Signed-off-by: Simon Glass <sjg@chromium.org>
The working FDT is the one which comes from the OS and is fixed up by
U-Boot. When the bootm command runs, it sets up the working FDT to be the
one it is about to pass to the OS, so that fixups can happen.
This seems like an important step, so add a message indicating that the
working FDT has changed. This is shown during the running of the bootm
command.
Signed-off-by: Simon Glass <sjg@chromium.org>
When looking for a filesystem on a partition we should do so quietly. At
present if the filesystem is very small (e.g. 512 bytes) we get a host of
messages.
Update these to only show when debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code uses casts between addresses and pointers, so does not work with
sandbox. Update it so we can allow sandbox to do device tree fixups.
Signed-off-by: Simon Glass <sjg@chromium.org>
Functions which implement commands must return a CMD_RET_... error code.
At present bootm can return a negative errno value in some cases, thus
causing strange behaviour such as trying to exit the shell and printing
usage information.
Fix this by returning the correct value.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present when bootm fails, it says:
subcommand not supported
and then prints help for the bootm command. This is not very useful, since
generally the error is related to something else, such as fixups failing.
It is quite confusing to see this in a test run.
Change the error and show the error code.
We could update the OS functions to return -ENOSYS when they do not
support the bootm subcommand. But this involves some thought since this is
arch-specific code and proper errno error codes are not always returned.
Also, with the code as is, all required subcommands are of course
supported - a problem would only come if someone added a new one or
removed support for one from an existing OS. Therefore it seems better to
leave that sort of effort for when our bootm tests are improved.
Note: v1 of this patch generated a discussion[1] about printing error
strings automatically using printf(). That is outside the scope of this
patch but will be dealt with separately.
[1] https://patchwork.ozlabs.org/project/uboot/patch/20220909151801.336551-3-sjg@chromium.org/
Signed-off-by: Simon Glass <sjg@chromium.org>
The _err variant iterators use the simple iterators without suffix as
basis.
However, there is no user that uclass_next_device_err for iteration,
many users of uclass_first_device_err use it to get the first and
(assumed) only device of an uclass, and a couple that use
uclass_next_device_err to get the device following a known device in the
uclass list.
While there are some truly singleton device classes in which more than
one device cannot exist these are quite rare, and most classes can have
multiple devices even if it is not the case on the SoC's EVB.
In a later patch the simple iterators will be updated to not stop on
error and return next device instead. With this in many cases the code
that expects the first device or an error if it fails to probe may get
the next device instead. Use the _check iterators as the basis of _err
iterators to preserve the old behavior.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The return value is not used for anythig, and in a later patch the
behavior of the _err iterator will change in an incompatible way.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update pvblock_probe() to avoid using internal var:
Signed-off-by: Simon Glass <sjg@chromium.org>
In a later patch sysinfo_get will be changed to return the device in cae
of an error. Set sysinfo to NULL on error to preserve previous behavior.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
eth_get_dev relies on the broken behavior that returns an error but not
the device on which the error happened which gives the caller no
reasonable way to report or handle the error.
In a later patch uclass_first_device_err will be changed to return the
device on error but eth_get_dev stores the returned device pointer
directly in a global state without checking the return value. Unset the
pointer again in the error case.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
blk_first_device_err/blk_next_device_err uses
uclass_first_device_err/uclass_next_device_err for device iteration.
Although the function names superficially match the return value from
uclass_first_device_err/uclass_next_device_err is never used
meaningfully, and uclass_first_device/uclass_next_device works equally
well for this purpose.
In the following patch the semantic of
uclass_first_device_err/uclass_next_device_err will be changed to be
based on uclass_first_device_check/uclass_next_device_check breaking
this sole user that uses uclass_next_device_err for iteration.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are a couple users of uclass_next_device return value that get the
first device by other means and use uclass_next_device assuming the
following device in the uclass is related to the first one.
Use uclass_next_device_err because the return value from
uclass_next_device will be removed in a later patch.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is a number of users that use uclass_first_device to access the
first and (assumed) only device in uclass.
Some check the return value of uclass_first_device and also that a
device was returned which is exactly what uclass_first_device_err does.
Some are not checking that a device was returned and can potentially
crash if no device exists in the uclass. Finally there is one that
returns NULL on error either way.
Convert all of these to use uclass_first_device_err instead, the return
value will be removed from uclass_first_device in a later patch.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are a few commands that iterate uclass with
uclass_first_device/uclass_next_device or the _err variant.
Use the _check class iterator variant to get devices that fail to probe
as well, and print the status.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use uclass_first_device_check/uclass_next_device_check to correctly
count buses that fail to probe.
Fixes: d3e19cf919 ("w1: Add 1-Wire uclass")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The code checks that uclass_first_device returned a device but the
returned value that is assigned is never used. Use
uclass_first_device_err instead, and move the error return outside of
the if block.
Fixes: f4ec1ae08e ("mxc_ipuv3_fb.c: call display_enable")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is a complaint in the code that iterates keyboards that we don't
have the _check variant of class iterator but we in fact do, use it.
In the code that iterates video devices there is an attempt to print
errors but the simple iterator does not return a device when there is an
error. Use the _check variant of the iterator as well.
Also format error messages consistently.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The code checks the return value from uclass_first_device as well as
that the device exists but it passes on the return value which may be
zero if there are no gadget devices. Just check that a device was
returned and return -ENODEV otherwise.
Also remove the dev variable which is not really used for anything.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
bootdev_list() uses uclass_*_device_err() to iterate devices.
However, the only value _err adds is returning an error when the device
pointer is null, and that's checked anyway.
Also there is some intent to report errors, and that's what
uclass_*_device_check() is for, use it.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When there is no PCI bus uclass_first_device will return no bus and no
error which will result in pci_find_first_device calling
skip_to_next_device with no bus, and the bus is only checked at the end
of the while cycle, not the beginning.
Fixes: 76c3fbcd3d ("dm: pci: Add a way to iterate through all PCI devices")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
We already have a function for probing all devices of a specific class,
use it.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
uclass_probe_all uses uclass_first_device/uclass_next_device assigning
the return value.
The interface for getting meaningful error is
uclass_first_device_check/uclass_next_device_check, use it.
Also do not stop iteration when an error is encountered. Probing all
devices includes those that happen to be after a failing device in the
uclass order.
Fixes: a59153dfeb ("dm: core: add function uclass_probe_all() to probe all devices")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
A recent change to regmap breaks building of phycore-rk3288 for me. The
difference is only a few bytes. Somehow CI seems to pass, even though it
fails when I run docker locally. But it prevents me from sending any more
pull requests.
In any case this board is clearly near the limit. We could revert the
offending change, but it is needed for sandbox tests.
Instead, add a way to drop the range checks in SPL, since they end up
doing nothing if everything is working as expected.
This makes phycore-rk3288 build again for me and reduces the size of SPL
slightly for a number of boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 947d4f132b4 ("regmap: fix range checks")
None of the values in this struct are larger than 256, so we can reduce
the members to u8s. This saves around 1K.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Several parts of the ICID table are only necessary for U-Boot proper.
Disable them in SPL. This saves around 500 bytes.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
FSL_IFC should only be selected when booting from NAND flash (or when
NAND_FSL_IFC is enabled). The existing logic does this correctly when
QSPI is also enabled, but not when just booting from SD.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Binman needs this module to build sandbox_vpl and it is needed elsewhere
in CI.
Add it to the docker file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xpyron.glpk@gmx.de>
CONFIG_SYSRESET provides its own implementation of reset_cpu. Disable
our version when it is enabled.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The LS1043ARDB rev v7.0 board replace nand device MT29F4G08ABBDAH4-AITX:D
with MT29F4G08ABBFAH4-AIT:F. Reflecting this change in board_fix_fdt().
CPLD V3.0 is needed for nandboot as the nand device changed.
A new macro CPLD_CFG_RCW_SRC_NAND_4K(4Kpage) is added to distinguish from
CPLD_CFG_RCW_SRC_NAND(2Kpage) to support nandboot on rev v7.0 board.
Signed-off-by: Wei Lu <w.lu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This enables eDMA snooping on the LS1043A and LS1046A. This will allow
marking the I2C, LPUART, and SPI devices on these SoCs as DMA coherent.
Oddly, this bit is only documented for the LS1043A, and is marked as
"reserved" in the LS1046ARM. I have tested this patch on the LS1046A
and found that marking i2c0 as dma-coherent works without issue.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Loadfile2 code is installing two protocols on it's own handle
and uses efi_delete_handle() to clean it up on failure(s). However
commit 05c4c9e21ae6 ("efi_loader: define internal implementations of
install/uninstallmultiple") prepares the ground for us to clean up
efi_delete_handle() used in favor of Install/UninstallMultipleProtocol.
While at it clean up the non needed void casts to (void *) on the
protolcol installation.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* don't use EFI_CALL() for variable services
* don't use runtime pointer to access exported function
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This function is already defined in spi.h but no implementation of it
currently exists in the tree. The implementation is based on the static
function spi_set_speed_mode(). The function prototype is modified so
that an success or error condition can be returned to the caller.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Space key is indicated by two different bits. Some HW models indicate press
of space key only by the first bit. Qemu indicates it by both bits at the
same time, which is currently interpreted by u-boot as double key press.
Fix this issue by setting first bit when only second is set (to support HW
models which indicate press only by second bit) and always clearing second
bit before processing to not report double space key press.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fix typo that was caused by the same feature being split in to 2 different
configuration options. Replace CONFIG_USBNET_DEVADDR with
CONFIG_USBNET_DEV_ADDR
Signed-off-by: Ignacio Zamora <nachopitt@gmail.com>
MSM SMEM driver is currently missing <linux/sizes.h> header and throws
the following compile error:
drivers/smem/msm_smem.c: In function ‘qcom_smem_get_ptable’:
drivers/smem/msm_smem.c:635:71: error: ‘SZ_4K’ undeclared (first use in this function)
635 | ptable = smem->regions[0].virt_base + smem->regions[0].size - SZ_4K;
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: luka.perkov@sartura.hr
The test relies on memory being available at 0x0. This in not valid for
many boards.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When the CCF is activated, the dev->parent is not necessary
the reference to SCMI transport and the function devm_scmi_of_get_channel
failed for the registered SCMI clock, child for protocol@14,
the channel is null and the SCMI clock driver crash for any operations.
This patch changes the first parameter of the ops of_get_channel(),
aligned with other process_msg() to pass directly the good reference,
i.e. parent result of find_scmi_transport_device(dev)
which return the reference of the scmi transport device.
Fixes: 8e96801aa6a ("firmware: scmi: add multi-channel support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
To allow easily iterate over all UBI volumes, add a new command which
either print all user UBI volumes on output or set them into env variable.
As UBI volumes can have arbitrary name/label, in most cases it is useful to
iterate them by their numbers. This can be achieved by -numeric flag.
This functionality is similar to already existing 'part list' command which
prints partitions on formatted block device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Provide a simple sandbox driver for the thermal uclass.
It simply registers and returns 100 degrees C if requested.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently, there is no way for users to check the readings from thermal
sensors from U-boot console, only some boards print it during boot.
So, lets add a simple "temperature" command that allows listing thermal
uclass devices and getting their value.
Note that the thermal devices are intenionally probed if list is used as
almost always they will not get probed otherwise and there is no way for
users to manually call probe on a certain device from console.
Assumption is made that temperature is returned in degrees C and not
milidegrees like in Linux as this is what most drivers seem to return.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add xxd command to print file content as hexdump to standard out
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Roger Knecht <rknecht@pm.me>
This buffer has the concatenated prefix and name written into it, so it
must be large enough to cover both strings plus the terminating NUL.
Fixes: 92c4a95ec7 ("pinctrl: Add new function pinctrl_generic_set_state_prefix()")
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Setting an alternative signature info node in "pre_load_sig_info_path"
allows verification of an image using the bootm pre-load mechanism with
a different key, e.g.: setenv pre_load_sig_info_path "/alt/sig" ; bootm
preload [addr]
Signed-off-by: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Putting these definitions in a header will allow signatures to be
validated independently of bootm.
Signed-off-by: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix a copy-paste error I did when inserting the comment.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The option SHA256_ALGO does not exist. Remove selecting it.
Fixes: 26dd9936574 ("lib: add crypt subsystem")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
This adds keyword devicetree-overlay as an alias for fdtoverlays in
extlinux (sysboot) and pxe to better follow the Boot Loader Specification
[1], improves documentation around them by adding an example for both
fdtoverlays and devicetree-overlay and the environment variable required
for this feature. The link for the spec is updated to the current one.
[1] https://systemd.io/BOOT_LOADER_SPECIFICATION/
Signed-off-by: Edoardo Tomelleri <e.tomell@gmail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
common/spl/spl_atf.c:187:51: warning: value size does not match register
size specified by the constraint and modifier [-Wasm-operand-widths]
__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
^
common/spl/spl_atf.c:187:34: note: use constraint modifier "w"
__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
^~
%w0
Use %x0 to match what Linux does in <asm/sysreg.h> write_sysreg().
Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Nick Desaulniers <ndesaulniers@google.com>
It seems that for aarch64, unless we apply dynamic relocations to the
location being relocated, we fail to boot.
As Fangrui notes:
For dynamic relocations using the RELA format (readelf -Wr), GNU ld
sets the initial content to r_addend; ld.lld doesn't do that by
default (needs --apply-dynamic-relocs).
Otherwise .rodata appears to be full of NUL-bytes before relocation,
causing crashes when trying to invoke the function pointers in
init_sequence_f from initcall_run_list().
Link: https://reviews.llvm.org/D42797
Suggested-by: Fangrui Song <maskray@google.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Nick Desaulniers <ndesaulniers@google.com>
When building the standalone example with llvm, the link step fails:
examples/standalone/libstubs.o: In function `dummy':
include/_exports.h:10: undefined reference to `jt'
include/_exports.h:11: undefined reference to `jt'
include/_exports.h:12: undefined reference to `jt'
include/_exports.h:13: undefined reference to `jt'
include/_exports.h:14: undefined reference to `jt'
examples/standalone/libstubs.o:include/_exports.h:15:
more undefined references to `jt' follow
Indeed, the standalone libstubs.o does use the jt symbol, but it was
marked 'static' in stubs.c. It's strange how gcc builds are working.
Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Rick Chen <rick@andestech.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Nick Desaulniers <ndesaulniers@google.com>
Documentation:
* man-page for cls command
* update build requirements
UEFI
* Fix bugs in the Stop() function of the EFi Driver Binding protocol
for block devices
* Avoid EFI_CALL() when invoking CloseProtocol()
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Merge tag 'efi-2023-01-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2023-01-rc1-2
Documentation:
* man-page for cls command
* update build requirements
UEFI
* Fix bugs in the Stop() function of the EFi Driver Binding protocol
for block devices
* Avoid EFI_CALL() when invoking CloseProtocol()
When host issues "fastboot reboot fastboot", it's expected that the
board drops the USB connection before resetting.
On some boards, such as Khadas VIM3L and SEI610, this is not the case.
We observe the following error:
$ fastboot reboot fastboot
Rebooting into fastboot OKAY [ 0.004s]
fastboot: error: Failed to boot into userspace fastboot; one or more components might be unbootable.
This does not happen when we use the RST button on the board.
It can be reproduced in linux with:
# echo b > /proc/sysrq-trigger
In this case, we hit a undefined hardware behavior, where D+ and D-
are in an unknown state. Therefore the host can't detect usb
disconnection.
Make sure we always call usb_gadget_release() when a "fastboot reboot"
command is issued.
Note: usb_gadget_release() should be called before g_dnl_unregister()
because g_dnl_unregister() triggers a complete() call on each
endpoint (thus calling do_reset()).
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Remove unused ehci_{setup,shutdown}_phy() helpers now replaced by
generic_{setup,shutdown}_phy().
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Replace ehci_setup_phy() and ehci_shutdown_phy () by respectively
generic_setup_phy() and generic_shutdown_phy().
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Replace ohci_setup_phy() and ohci_shutdown_phy () by respectively
generic_setup_phy() and generic_shutdown_phy().
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
In drivers usb/host/{ehci,ohci}-generic.c, {ehci,ohci}_setup_phy() and
{ehci,ohci}_shutdown_phy() shares 95% of common code.
Factorize this code in new generic_{setup,shudown}_phy() functions.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Take the USB_ETHER ifdef block apart and make use of obj-$(VAR) instead
to include the source files in build. The duplicate CI_UDC entry is now
removed, the USB_DEVICE ifdef is now reduced to core.o ep.o addition,
the ether.o can be conditionally compiled in using USB_ETHER.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The env_get() might be undefined in case ENV_SUPPORT is disabled,
which may happen e.g. in SPL. Add missing ifdef guard around the
env_get() to prevent build failure.
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Fabio Estevam <festevam@denx.de>
Make it clearer why InstallMultipleProtocolInterfaces is invoked with two
NULLs:
* rename guid to esp_guid
* put protocol GUIDs and the related interfaces on same lines
* add comment
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
* Replace the OpenProtocol() call by efi_search_protocol().
* Remove the CloseProtocol() call.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Avoid EFI_CALL() by using efi_close_protocol().
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Allow avoiding using EFI_CALL() when closing a protocol by providing an
internal function.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The CloseProtocol() boot service requires a handle as first argument.
Passing the protocol interface is incorrect.
CloseProtocol() only has an effect if called with a non-zero value for
agent_handle. HandleProtocol() uses an opaque agent_handle when invoking
OpenProtocol() (currently NULL). Therefore HandleProtocol() should be
avoided.
* Replace the LocateHandle() call by efi_search_protocol().
* Remove the CloseProtocol() call.
Fixes: 8d99026f0697 ("efi_loader: capsule: support firmware update")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The CloseProtocol() boot service requires a handle as first argument.
Passing the protocol interface is incorrect.
CloseProtocol() only has an effect if called with a non-zero value for
agent_handle. HandleProtocol() uses an opaque agent_handle when invoking
OpenProtocol() (currently NULL). Therefore HandleProtocol() should be
avoided.
* Replace the LocateHandle() call by efi_search_protocol().
* Remove the CloseProtocol() call.
* Remove a superfluous goto.
Fixes: ce3dbc5d080d ("efi_loader: add UEFI GPT measurement")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
We must always call EFI_EXIT() when returning from an EFIAPI function.
Fixes: 05ef48a2484b ("efi_driver: EFI block driver")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This function is only used inside efi_boottime.c and is not safe to use
outside of this context.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
part is unsigned. So it must be printed with %u.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
We want tests to avoid the usage of sudo. Describe that virt-make-fs can
generate disk images without being root.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Packages python3-filelock python3-pytest-xdist as required to run
'make tests'. Add them to the required packages list in the documentation.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide a man-page for the cls command.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The cls command works fine on the serial console. There is no reason to
let it depend on the availability of video.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
- mtd: Update the function name to 'rfree'
- Support NAND ONFI EDO mode for imx8mn architecture
- dm: clk: add missing stub when CONFIG_CLK is deactivated
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Merge tag 'u-boot-nand-20221009' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash
- mtd: Update the function name to 'rfree'
- Support NAND ONFI EDO mode for imx8mn architecture
- dm: clk: add missing stub when CONFIG_CLK is deactivated
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221007122003.11239-11-ada@thorsis.com
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221007122003.11239-10-ada@thorsis.com
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221007122003.11239-9-ada@thorsis.com
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221007122003.11239-8-ada@thorsis.com
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221007122003.11239-7-ada@thorsis.com
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221007122003.11239-6-ada@thorsis.com
Warning appears if built with FPGA_DEBUG defined:
CC drivers/fpga/virtex2.o
/mnt/data/adahl/src/u-boot/drivers/fpga/virtex2.c: In function ‘virtex2_ssm_load’:
/mnt/data/adahl/src/u-boot/drivers/fpga/virtex2.c:333:11: warning: format ‘%d’ expects argument of type ‘int’, but argument 4 has type ‘size_t’ {aka ‘long unsigned int’} [-Wformat=]
PRINTF("%s:%d:done went active early, bytecount = %d\n",
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
__func__, __LINE__, bytecount);
~~~~~~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/virtex2.c:25:37: note: in definition of macro ‘PRINTF’
#define PRINTF(fmt, args...) printf(fmt, ##args)
^~~
/mnt/data/adahl/src/u-boot/drivers/fpga/virtex2.c: In function ‘virtex2_ss_load’:
/mnt/data/adahl/src/u-boot/drivers/fpga/virtex2.c:468:12: warning: format ‘%d’ expects argument of type ‘int’, but argument 4 has type ‘size_t’ {aka ‘long unsigned int’} [-Wformat=]
PRINTF("%s:%d:done went active early, bytecount = %d\n",
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
__func__, __LINE__, bytecount);
~~~~~~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/virtex2.c:25:37: note: in definition of macro ‘PRINTF’
#define PRINTF(fmt, args...) printf(fmt, ##args)
^~~
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221007122003.11239-5-ada@thorsis.com
The additional comma messes up the arguments.
Warning appears if built with FPGA_DEBUG defined:
CC drivers/fpga/spartan3.o
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan3.c: In function ‘spartan3_sp_load’:
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan3.c:118:11: warning: too many arguments for format [-Wformat-extra-args]
PRINTF ("%s: Function Table:\n"
^~~~~~~~~~~~~~~~~~~~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan3.c:18:37: note: in definition of macro ‘PRINTF’
#define PRINTF(fmt,args...) printf (fmt ,##args)
^~~
Fixes: 875c78934ee2 ("Add Xilinx Spartan3 family FPGA support Patch by Kurt Stremerch, 14 February 2005")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221007122003.11239-4-ada@thorsis.com
That extra comma messes up format arguments.
Warning appears if built with FPGA_DEBUG defined:
CC drivers/fpga/spartan2.o
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan2.c: In function ‘spartan2_sp_load’:
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan2.c:112:11: warning: too many arguments for format [-Wformat-extra-args]
PRINTF ("%s: Function Table:\n"
^~~~~~~~~~~~~~~~~~~~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan2.c:12:37: note: in definition of macro ‘PRINTF’
#define PRINTF(fmt,args...) printf (fmt ,##args)
^~~
CC drivers/fpga/spartan3.o
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan3.c: In function ‘spartan3_sp_load’:
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan3.c:117:11: warning: too many arguments for format [-Wformat-extra-args]
PRINTF ("%s: Function Table:\n"
^~~~~~~~~~~~~~~~~~~~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan3.c:17:37: note: in definition of macro ‘PRINTF’
#define PRINTF(fmt,args...) printf (fmt ,##args)
^~~
Fixes: e221174377d7 ("Initial revision")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221007122003.11239-3-ada@thorsis.com
Fix the following sparse and compile time warning
triggered with W=1:
drivers/clk/clk_versal.c:605:5:
warning: no previous prototype for 'versal_clock_setup'
[-Wmissing-prototypes]
605 | int versal_clock_setup(void)
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20221007105535.31902-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Before this patch you could see in the log:
U-Boot SPL 2022.10-rc5 (Sep 29 2022 - 15:29:27 +0200)
PMUFW: v1.1
Loading new PMUFW cfg obj (32 bytes)
PMUFW: No permission to change config object
Loading new PMUFW cfg obj (2032 bytes)
where it is visible that permission is check before sending PMUFW
configuration (big size).
When this patch is applied it is visible that order is correct.
U-Boot SPL 2022.10-rc5 (Sep 29 2022 - 15:47:08 +0200)
Loading new PMUFW cfg obj (2032 bytes)
PMUFW: v1.1
Loading new PMUFW cfg obj (32 bytes)
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a0bf4f46d670023da4f848790eece6fff22090c2.1664962765.git.michal.simek@amd.com
Compiling with GCC-12 leads to an error:
+board/xilinx/common/board.c:479:37: error: the comparison will always
evaluate as 'true' for the address of 'mac_addr' will never be NULL
[-Werror=address]
+ 479 | if (!desc->mac_addr[i])
+ | ^
Remove the redundant check.
Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
In function ‘set_dfu_alt_info’ a comparison of a u8 value against
0 is done. Since it is always false, change the signature of this
function to use an `int` instead, which match the type used in caller:
`multi_boot()`.
Fix the following warning triggered with W=1:
board/xilinx/zynqmp/zynqmp.c:651:23:
warning: comparison is always false due to limited range of data type
[-Wtype-limits]
651 | if (multiboot < 0)
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20221004055254.26246-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Fix the following sparse and compile time warning triggered with W=1:
drivers/soc/soc_xilinx_zynqmp.c:288:5:
warning: no previous prototype for 'soc_xilinx_zynqmp_get_machine'
[-Wmissing-prototypes]
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20221004055201.26146-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
cpu-info.c defines print_cpuinfo(), but neglected to
include its declaration, causing the following sparse and
compile time warnings:
board/xilinx/common/cpu-info.c:10:5:
warning: no previous prototype for 'print_cpuinfo'
[-Wmissing-prototypes]
Include init.h, which includes the missing declaration.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20221004055053.26047-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Since commit 8d38a8459b0d ("mtd: Rename free() to rfree()")
the function has been renamed to rfree(), so update the description
inside the mtd_oob_region structure as well.
Fixes: 8d38a8459b0d ("mtd: Rename free() to rfree()")
Reported-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Add support for imx8mn architecture in order to run the NAND
in fast edo mode.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Rename the gpmi_apb_bch clock name to gpmi_bch_apb, as you can find in
the device tree.
Fixes: commit a59691280daca ("MXS_NAND: Add clock support for iMX8")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
This clock name is not present in any U-boot and Linux kernel device
tree.
Fixes: commit a59691280daca ("MXS_NAND: Add clock support for iMX8")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
It is used as delay for gpmi write strobe.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Add gpmi nand clock. Those clock can be used in mxs nand driver
to run nand to EDO mode 5, 4, ...
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Add shared counter in order to avoid to swich off clock that
are already used.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Add missing stub for functions [devm_]clk_...() when CONFIG_CLK is
deactivated.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
This fixes the below build error if nand.c is included in
an SPL build.
/work/u-boot/drivers/mtd/nand/raw/nand.c: In function ‘nand_init_chip’:
/work/u-boot/drivers/mtd/nand/raw/nand.c:82:28: error: ‘nand_chip’ undeclared (first use in this function)
82 | struct nand_chip *nand = &nand_chip[i];
| ^~~~~~~~~
/work/u-boot/drivers/mtd/nand/raw/nand.c:82:28: note: each undeclared identifier is reported only once for each function it appears in
/work/u-boot/drivers/mtd/nand/raw/nand.c:84:20: error: ‘base_address’ undeclared (first use in this function); did you mean ‘base_addr’?
84 | ulong base_addr = base_address[i];
| ^~~~~~~~~~~~
| base_addr
Fixes: 068c41f1cc77 ("Finish conversion CONFIG_SYS_NAND_SELF_INIT to Kconfig")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
- Update RISC-V to use 32bit or 64bit toolchains, depending on if we're
building for 32bit or 64bit CPUs. This requires updating the Docker
container as well to have the 32bit toolchain.
- Assorted platform updates for developerbox, armv8 platforms in
general, TI K3 and AM65 platforms, nuvoton NPCM845 SoC and then clock
driver, ftgpio010 support, and common/board_f cleanups.
The following description is copied from the equivalent patch for the
Linux Kernel proposed by Aurelien Jarno:
>From version 2.38, binutils default to ISA spec version 20191213. This
means that the csr read/write (csrr*/csrw*) instructions and fence.i
instruction has separated from the `I` extension, become two standalone
extensions: Zicsr and Zifencei. As the kernel uses those instruction,
this causes the following build failure:
arch/riscv/cpu/mtrap.S: Assembler messages:
arch/riscv/cpu/mtrap.S:65: Error: unrecognized opcode `csrr a0,scause'
arch/riscv/cpu/mtrap.S:66: Error: unrecognized opcode `csrr a1,sepc'
arch/riscv/cpu/mtrap.S:67: Error: unrecognized opcode `csrr a2,stval'
arch/riscv/cpu/mtrap.S:70: Error: unrecognized opcode `csrw sepc,a0'
Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Christian Stewart <christian@paral.in>
Reviewed-by: Rick Chen <rick@andestech.com>
riscv32 needs a different toolchain than riscv64
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
For building riscv32 targets we should use the riscv32 toolchain.
Add it to the Docker image.
Drop the riscv toolchain-alias as we do not need it in future.
While in here, update to the latest "jammy" tag.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
[trini: Update to latest jammy tag]
Signed-off-by: Tom Rini <trini@konsulko.com>
Fix the following sparse and compile time warning triggered with W=1:
drivers/spi/zynqmp_gqspi.c:286:6:
warning: no previous prototype for 'zynqmp_qspi_set_tapdelay'
[-Wmissing-prototypes]
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20221004053730.25602-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
make W=1 generates the following warning in cpu_disable, cpu_status and
cpu_release functions.
arch/arm/mach-zynqmp/mp.c:166:16: warning: comparison of unsigned expression
in '>= 0' is always true [-Wtype-limits]
166 | if (nr >= ZYNQMP_CORE_APU0 && nr <= ZYNQMP_CORE_APU3) {
| ^~
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20221004053454.25470-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
For the TI SoCs affected by errata i2329, enable MDIO manual
mode by default
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
In certain TI SoCs, on the CPSW and ICSS peripherals, there is
a possibility that the MDIO interface returns corrupt data on
MDIO reads or writes incorrect data on MDIO writes. There is also
a possibility for the MDIO interface to become unavailable until
the next peripheral reset.
The workaround is to configure the MDIO in manual mode and disable the
MDIO state machine and emulate the MDIO protocol by reading and writing
appropriate fields in MDIO_MANUAL_IF_REG register of the MDIO controller
to manipulate the MDIO clock and data pins.
More details about the errata i2329 and the workaround is available in:
https://www.ti.com/lit/er/sprz487a/sprz487a.pdf
Add implementation to disable MDIO state machine, configure MDIO in manual
mode and provide software MDIO read and writes via MDIO bitbanging. Allow
the MDIO to be initialized based on the need for manual mode.
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Include linux/sizes.h because it defines SZ_64K which is used in many
places inside k3-udma.c
This fixes the error: ‘SZ_64K’ undeclared which appears during build
time
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
When MMU is already enabled then dcache_enable() does not call mmu_setup()
and so setup_all_pgtables() is also never called.
In this situation when some driver calls mmu_set_region_dcache_behaviour()
function then U-Boot crashes with error message:
Emergency page table not setup.
Fix this issue by explicitly calling setup_all_pgtables() in dcache_enable()
function near condition for mmu_setup().
This change fixes chainloading U-Boot from U-Boot on Turris Mox board which
uses mvneta ethernet driver which calls mmu_set_region_dcache_behaviour().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
In order to move ppc-specific code out of setup_dest_addr(), provide an
arch-specific variant arch_setup_dest_addr(), that can be used by
architecture code to fix up the initial reloc address.
It is called at the end of setup_dest_addr() initcall and the default
implementation is a nop stub.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
asm/mach_type.h header and CONFIG_MACH_TYPE macro are arm-specific, so move
related bdinfo logic to arch_setup_bdinfo() in arch/arm/lib/bdinfo.c.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
The XTRN_DECLARE_GLOBAL_DATA_PTR declarations in ppc code are permanently
commented out, so there are no users for this macro:
#if 1
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
#else /* We could use plain global data, but the resulting code is bigger */
#define XTRN_DECLARE_GLOBAL_DATA_PTR extern
#define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \
gd_t *gd
#endif
Remove all references to this macro, but add a documentation note regarding
the possibility of using plain global data for the GD pointer.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
dram_init() can't modify global/static variables, so
move the mem_map setup later when bss is available.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
In general handles should only be deleted if the last remaining protocol
is removed. Instead of explicitly calling
efi_create_handle -> efi_add_protocol -> efi_delete_handle which blindly
removes all protocols from a handle before removing it, use
InstallMultiple/UninstallMultiple which adheres to the EFI spec and only
deletes a handle if there are no additional protocols present
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A following patch is cleaning up the core EFI code trying to remove
sequences of efi_create_handle, efi_add_protocol.
Although this works fine there's a problem with the latter since it is
usually combined with efi_delete_handle() which blindly removes all
protocols on a handle and deletes the handle. We should try to adhere to
the EFI spec which only deletes a handle if the last instance of a protocol
has been removed. Another problem is that efi_delete_handle() never checks
for opened protocols, but the EFI spec defines that the caller is
responsible for ensuring that there are no references to a protocol
interface that is going to be removed.
So let's fix this by replacing all callsites of
efi_create_handle(), efi_add_protocol() , efi_delete_handle() with
Install/UninstallMultipleProtocol.
In order to do that redefine functions that can be used by the U-Boot
proper internally and add '_ext' variants that will be used from the
EFI API
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since I am co-maintaining EFI with Heinrich remove the special
entry for EFI variable storage via OP-TEE
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Move the registration of events for the addition and removal of block
devices to the block device driver. Here we can add a reference to the
EFI Driver Binding protocol as context.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
A function event_notify() exists. We should not use the same name for and
EFI event. Rename events in unit tests.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
For handling added and removed block devices we need to register events
which has to be done when the driver is installed.
This patch only creates an empty init function that will be filled with
code later on. The function needs to be called before any EFI block devices
are used. Move the efi_driver_init() call to early init.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
DisconnectController() is based on the open protocol information created
when the driver opens a protocol with BY_CHILD_CONTROLLER or BY_DRIVER.
To create an open protocol information it is required to supply the handle
of the driver as agent handle. This information is available as field
DriverBindingHandle in the driver binding protocol.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* Convert code comments in include/efi_driver.h to Sphinx style.
* Add include/efi_driver.h to the HTML documentation.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
* Carve out function efi_bl_create_block_device() from efi_bl_bind().
* Add a check for U-Boot devices to efi_bl_bind().
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Currently we have subcommands 'efidebug dh' which shows protocols per
handle and 'efidebug devices' which shows the device path. None shows which
U-Boot device matches the handle.
Change 'efidebug dh' to show the device path and the U-Boot device if any
is associated with the handle.
Remove 'efidebug devices'.
Old output of 'efidebug dh':
Handle Protocols
================ ====================
000000001b22e690 Device Path, Block IO
000000001b22e800 Device Path, Block IO, system, Simple File System
New output of 'efidebug dh':
000000001b22e690 (host0)
/VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/VenHw(bbe4e671-5773-4ea1-9aab-3a7dbf40c482,00)
Block IO
000000001b22e800 (host0:1)
/VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/VenHw(bbe4e671-5773-4ea1-9aab-3a7dbf40c482,00)/HD(1,GPT,7e5c17c5-3f5f-49d0-ae96-511b21d7f273,0x800,0x3f7df)
Block IO
system
Simple File System
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
If creating the block device fails,
* delete all created objects and references
* close the protocol interface on the controller
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When deleting a device or a handle we must remove the link between the two
to avoid dangling references.
Provide function efi_unlink_dev() for this purpose.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
dp_alloc() may return NULL. This needs to be caught.
Fixes: 98d48bdf415e ("efi_loader: provide a function to create a partition node")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
On the 32bit ARM sandbox 'dm ut dm_test_devm_regmap' fails with an abort.
This is due to incorrect range checks.
On 32-bit systems the size of size_t and int is both 32 bit. The expression
(offset + val_len) is bound to overflow if offset == -1. Add an overflow
check.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
VHV gpio is connected to MCU and only on updated board design. Without it
eFUSE programming does not work. Omnia MCU driver exports this GPIO to
U-Boot under name mcu_56 and only when it is supported by MCU. So U-Boot
fuse command refuse eFUSE programming on older board design when VHV gpio
is not available.
We tested that Armada 385 without connected VHV gpio can do eFUSE
programming but only for some bits and only sometimes - it is unstable.
And better to be disabled on older board design without VHV gpio support.
Signed-off-by: Pali Rohár <pali@kernel.org>
VHV_Enable GPIO is required to enable during eFuse programming on Armada
SoCs not from 3700 family. Add support for enabling and disabling VHV pin
via GPIO during eFuse programming, when specified.
All details are in Marvell AN-389: ARMADA VHV Power document
(Doc. No. MV-S302545-00 Rev. C, August 2, 2016).
Note that due to HW Errata 3.6 eFuse erroneous burning (Ref #: HWE-3718342)
VHV power must be disabled while core voltage is off to prevent erroneous
eFuse programming.
This is specified in Marvell ARMADA 380/385/388 Functional Errata,
Guidelines, and Restrictions document
(Doc. No. MV-S501377-00 Rev. D, December 1, 2016).
Signed-off-by: Pali Rohár <pali@kernel.org>
This patch implements LD eFuse programming support. Armada 385 contains two
LD eFuse lines, each is 256 bit long with one additional lock bit. LD 0
line is mapped to U-Boot fuse bank 64 and LD 1 line to fuse bank 65. U-Boot
32-bit fuse words 0-8 are mapped to LD eFuse line bits 0-255. U-Boot fuse
word 9 is mapped to LD eFuse line lock bit.
So to program LD 1 General Purpose Data line, use U-Boot fuse command:
=> fuse prog -y 65 0 0x76543210
=> fuse prog -y 65 1 0xfedcba98
=> fuse prog -y 65 2 0x76543210
=> fuse prog -y 65 3 0xfedcba98
=> fuse prog -y 65 4 0x76543210
=> fuse prog -y 65 5 0xfedcba98
=> fuse prog -y 65 6 0x76543210
=> fuse prog -y 65 7 0xfedcba98
=> fuse prog -y 65 8 0x1
Signed-off-by: Pali Rohár <pali@kernel.org>
Move the code making sure that the timer is initialized only once into
orion_timer_init(), which is called from timer_early_init() and from
orion_timer_probe(). This way the timer is not re-initialized.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Michael Walle <michael@walle.cc>
Cc: Pali Rohár <pali@kernel.org>
Since the move to CONFIG_TIMER with support for CONFIG_TIMER_EARLY, this
platform specific init_timer() function is not needed any more. Let's
remove it completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Michael Walle <michael@walle.cc>
Cc: Pali Rohár <pali@kernel.org>
BootROM loads kwbimage header to L2-SRAM and BootROM reserve only 192 kB for it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Replace the if/else chain in pxa_ecc_init() with a lookup table. This
makes the code more concise and hopefully easier to follow. Remove the
unused ecc_layout tables and replace it with a single dummy one (the
pxa3xx driver has never used this but the mtd subsystem expects it to be
provided).
Tested on an Allied Telesis x530 switch with Micron MT29F2G08ABAEAWP
NAND Flash.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
These boards are out of maintenance and can be removed.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Firmware calls need node_id which is basically "power-domains" id.
At present static values are used based on the "device_id" property of
dt.
Instead of this, read "power-domains" id from dt and use it. Add a
element called node_id in priv structure and read it from dt. Replace
static node_id with this priv->node_id across the driver.
Since "device_id" is not used anywhere else simply remove it.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20220930092548.18453-3-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
In Versal platform power domain node_id is bigger than u8, hence
change prototype to u32 to accommodate. Change u8 to u32 in the function
prototypes that use node_id and remove casting to u32 from
xilinx_pm_request() call parameters.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20220930092548.18453-2-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Here are the smatch warning messages:
drivers/net/xilinx_axi_emac.c:324 axiemac_phy_init()
error: 'phydev' dereferencing possible ERR_PTR()
drivers/net/zynq_gem.c:340 zynq_phy_init()
error: 'priv->phydev' dereferencing possible ERR_PTR()
Fix by adding error checking before dereferencing the pointer.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20220929045605.23964-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The maximum length is capped similarly to the emaclite_send function.
Avoid integer underflow for values of ip->ip_len < 30, the minimum
length of an IP packet is 21 bytes.
Signed-off-by: Samuel Obuch <samuel.obuch@codasip.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/20220927112103.155689-3-samuel.obuch@codasip.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Use __raw_read* and __raw_write* functions to ensure read/write
is passed to the memory-mapped regions, as non-volatile accesses
may get optimised out.
Signed-off-by: Samuel Obuch <samuel.obuch@codasip.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/20220927112103.155689-2-samuel.obuch@codasip.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Function ioremap_nocache seems to be defined only for MIPS and Microblaze
architectures. Therefore, the function call in the emaclite driver causes
this driver to be unusable with other architectures, for example RISC-V.
Use ioremap function instead of ioremap_nocache, and include linux/io.h
instead of asm/io.h, so that ioremap function is automatically created,
if not defined by the architecture. We can switch to the ioremap function,
as Microblaze's ioremap_nocache is just empty and in MIPS implementations
of ioremap_nocache and ioremap are the same.
Signed-off-by: Samuel Obuch <samuel.obuch@codasip.com>
Link: https://lore.kernel.org/r/20220927112103.155689-1-samuel.obuch@codasip.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
To check dynamic loading of config object, currently APU_0 is used.
Suggestion from pmwfw team is to load OCM_BANK_0 and check for
XST_PM_NO_ACCESS error only to skip future config objects. Other errors
should not be considered for skipping. Change from NODE_APU_0 to
NODE_OCM_BANK_0 and check for XST_PM_NO_ACCESS to skip future config
objects.
Add ": " to printf statement when there is no permission to load config
object, to align with PMUFW version print.
Update kernel doc for return value for zynqmp_pmufw_load_config_object().
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2784018844ba4afced0e3edff76bdbfe532f517d.1664523444.git.michal.simek@amd.com
For future DM based FPGA drivers and for now to have a meaningful
logging class for old FPGA drivers.
Suggested-by: Michal Simek <michal.simek@amd.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Dahl <post@lespocky.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20220930120430.42307-2-post@lespocky.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
When the imx8mn.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree. This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot. Fix this by adding the spba node to the spl
device tree to restore normal booting.
Based on the patch from Adam Ford for the imx8mn-beacon-kit-u-boot
board.
Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
When the imx8mn.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree. This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot. Fix this by adding the spba node to the spl
device tree to restore normal booting.
Based on the patch from Adam Ford for the imx8mn-beacon-kit-u-boot
board.
Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
To quote the author:
At present the ofnode interface is somewhat limited, in that it cannot
access the device tree provided by the OS, only the one used by U-Boot
itself (assuming these are separate). This prevents using ofnode functions
to handle device tree fixups, i.e. ft_board_setup() and the like.
The ofnode interface was introduced to allow a consistent API to access
the device tree, whether a flat tree or a live tree (OF_LIVE) is in use.
With the flat tree, adding nodes and properties at the start of the tree
(as often happens when writing to the /chosen node) requires copying a
lot of data for each operation. With live tree, such operations are
quite a bit faster, since there is no memory copying required. This has to
be weighed against the required memory allocation with OF_LIVE, as well
as the cost of unflattening and flattening the device tree which U-Boot
is running.
This series enables support for access to multiple device trees with the
ofnode interface. This is already available to some extent with OF_LIVE,
but some of the ofnode functions need changes to allow the tree to be
specified.
The mechanism works by using the top 1-4 bits of the device tree offset.
The sign bit is not affected, since negative values must be supported.
With this implemented, it becomes possible to use the ofnode interface
to do device tree fixups. The only current user is the EVT_FT_FIXUP
event.
This has two main benefits:
- ofnode can now be used everywhere, in preference to the libfdt calls
- live tree can eventually be used everywhere, with potential speed
improvements when larger number of fixups are used
This series is only a step along the way. Firstly, while it is possible
to access the 'fix-up' tree using OF_LIVE, most of the fixup functions use
flat tree directly, rather than the ofnode interface. These need to be
updated. Also the tree must be flattened again before it is passed to the
OS. This is not currently implemented.
With OFNODE_MULTI_TREE disabled this has almost no effect on code size:
around 4 bytes if EVENT is enabled, 0 if not. With the feature enabled,
the increase is around 700 bytes, e.g. on venice2:
$ buildman -b ofn2a venice2 -sS --step 0
Summary of 2 commits for 1 boards (1 thread, 64 jobs per thread)
01: image: Drop some other #ifdefs in image-board.c
arm: w+ venice2
48: wip
arm: (for 1/1 boards) all +668.0 text +668.0
This size increase is not too bad, considering the extra functionality,
but is too large to enable everywhere. So for now this features needs to
be opt-in only, based on EVENT.
Documentation:
* doc: improve description of autostart
UEFI:
* prefix test functions with efi_st_ in the LoadImage unit test
* avoid a warning message in efi_initrd_deregister()
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Merge tag 'efi-2022-10-rc6' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-10-rc6
Documentation:
* doc: improve description of autostart
UEFI:
* prefix test functions with efi_st_ in the LoadImage unit test
* avoid a warning message in efi_initrd_deregister()
At present ofnode_write_prop() is inconsistent between livetree and
flattree, in that livetree requires the caller to ensure the property
value is stable (e.g. in rodata or allocated) but flattree does not, since
it makes a copy.
This makes the API call a bit painful to use, since the caller must do
different things depending on OF_LIVE.
Add a new 'copy' argument which tells the function to make a copy if
needed. Add some tests to cover this behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current tests do not cover all functions, nor do they cover the new
multi-tree functionality. Add and update the tests accordingly and update
the 'future work' notes in the documentation.
There is a still more testing needed for the failure cases, since at
present some ofnode functions return a libfdt error code instead of
converting it to an errno.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some ofnode functions can only operate on the default device tree, i.e.
U-Boot's control FDT. Add comments to that effect. Fix up the reference to
device tree bindings while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
We need to be able to look up phandles in any FDT, not just the control
FDT. Use the 'other' FDT to test this, with a helper function which gets
this as an oftree that can then we used as needed.
Add a few more tests and some comments at the top of the file, to explain
what is going on.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add the logic to redirect requests for the device tree through a function
which can look up the tree ID. This works by using the top bits of
ofnode.of_offset to encode a tree.
It is assumed that there will only be a few device trees used at runtime,
typically the control FDT (always tree ID 0) and possibly a separate FDT
to be passed the OS.
The maximum number of device trees supported at runtime is 8, with this
implementation. That would use bits 30:28 of the node-offset value,
meaning that the positive offset range is limited to bits 27:0, versus
30:1 with this feature disabled. That still allows a device tree of up
to 256MB, which should be enough for most FITs. Larger ones can be
supported by using external data with the FIT, or by enabling OF_LIVE.
Update the documentation a little and fix up the comment for
ofnode_valid().
Signed-off-by: Simon Glass <sjg@chromium.org>
At present, unless OF_LIVE is enabled, ofnode only supports access to one
device tree, the control FDT. This is because only the node offset is
encoded in ofnode, with the tree being implicit.
This makes ofnode (without OF_LIVE) unsuitable for device tree fixups, as
implemented by ft_board_setup() and other such functions.
To solve this, we can use the top bits of the node offset to hold a tree
ID.
Add the definitions for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function turns out to be a little confusing since it looks up a path
and also registers the tree. Split it into two, one that gets the root
node and one that looks up a path, so the purpose is clear.
Registering the tree will happen in a function to be added in a later
patch, called oftree_from_fdt().
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases we want to obtain an ofnode in the same tree as a different
ofnode, such as when looking up a subnode. At present this is trivial,
since there is only one tree. When there are multiple trees, this
implementation will change.
Also move the ofnode_to_offset() function up higher in the header file,
since we will need to provide a different implementation with multiple
trees.
Signed-off-by: Simon Glass <sjg@chromium.org>
When we have multiple trees, the ofnode logic needs to be told which one
to use. Create a new function which takes an oftree argument, along with
a helper to obtain the FDT pointer from an oftree.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present dm_test_ofnode_root() does this manually. Add some inline
functions to handle it, so this code can be centralised.
Add oftree functions to produce a null tree and to check whether a tree
is valid or not.
Signed-off-by: Simon Glass <sjg@chromium.org>
The flat device tree is assumed to be the control FDT but this is not
always the case. Update the ofnode implementation to obtain the node via
an function call so we can eventually add support for selecting different
trees.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there is only one device tree used by the ofnode functions,
except for some esoteric use of live tree. In preparation for supporting
more than one, add a way to reset the list of device trees.
For now this does nothing.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current tests do not cover all the behaviour. Add some more.
Tidy up a few inconsistencies between livetree and flattree which come to
light with these tests. Also drop the -ENODATA error since it is never
actually returned.
Signed-off-by: Simon Glass <sjg@chromium.org>
An upcoming patch set creates a global function flush(). To make debugging
easier we should not use the same name for a static function.
Rename static functions in the LoadImage() unit test adding an efi_st_
prefix.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Complete the list of commands influenced by the autostart environment
variable.
Make it clearer what values qualifies at 'yes'.
Eventually the list of environment variables is to be alphabetically
sorted. Move autostart up.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The current implementation creates a 'name' value for every node. This
is not needed for the latest device tree format, which includes a name in
the node header.
Adjust the code to point the name at the node header instead.
Also simplify ofnode_get_name(), now that we can rely on it to set the
name correctly. Update the comment to make it clear what name the root
node has.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current name is quite unwieldy. Change it to use an ofprop_ prefix
and shorten it. Fix the return-value comment while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the function to mark it with the const attribute. Also avoid
calling it multiple times in the devfdt_get_addr_index() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a test flag which indicates that the 'other' FDT should be set up
ready for use. Handle this by copying in the FDT, unflattening it for
livetree tests. Free the structures when the tests have run.
We cannot use the other FDT unless we are using live tree or
OFNODE_MULTI_TREE is enabled, since only one tree is supported by the
ofnode interface in that case. Add this condition into
ut_run_test_live_flat() and update the comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide a way to copy over the 'other' FDT when running tests. This loads
it and allocates memory for the copy, if not done already, then does the
copy.
Avoid using U-Boot's malloc() pool for these copies, at least for now,
since they are part of the test system.
Tidy up the cpu.c header files while here.
Signed-off-by: Simon Glass <sjg@chromium.org>
We need an 'other' FDT which is different from the control FDT, so we can
check that the ofnode tests correctly handle them both.
Add this to the build along with a way to read it into the sandbox state.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this implementation is specific to loading the test FDT. We
plan to load others, so create a generic function to handle this.
The path is now limited to 256 characters, to simplify the code.
When there is an empty argv[0] (which should not happen), the function now
just uses the path as is, with no prefix.
Signed-off-by: Simon Glass <sjg@chromium.org>
This was a workaround for a rare situation. Now that it will be more
common and we have a proper fix, drop the flag. We can run both types of
tests in the same sandbox executable, even if the flat device tree is
modified.
Signed-off-by: Simon Glass <sjg@chromium.org>
If the device tree changes during a test and we cannot restore it, mark
it as such so that future tests which need the live tree are skipped.
Signed-off-by: Simon Glass <sjg@chromium.org>
When the flat device tree changes it can mess up the live tree since that
uses the flat tree for its strings. This affects only a few sandbox tests
which modify the device tree, but the number will grow as ofnode support
for writing improves.
While the control FDT is not intended to change while U-Boot is running,
some tests do so. For example, the ofnode interface only supports
modifying properties in the control FDT, so tests must use that.
To solve this problem, keep a copy of the FDT and restore it as needed
when the test is finished. The copy only happens on sandbox (except SPL
builds), to reduce memory usage and because these tests are not useful on
other boards. For other boards, a checksum is taken to ensure that nothing
changes.
It would be possible to always checksum the FDT on sandbox and only
restore it if needed, but this is slightly slower than restoring it every
time, at least with crc8.
Move the code which checks for success to the very end, for clarity.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we support writing to ofnodes, the const is not accurate. Drop
it to avoid undesirable casting.
Also drop the ofnode_to_npw() which is now the same as ofnode_to_np().
Signed-off-by: Simon Glass <sjg@chromium.org>
Add this feature to the ofnode interface, supporting both livetree and
flattree. If the node exists it is returned, along with a -EEXIST error.
Update the functions it calls to handle this too.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is helpful to test that out-of-memory checks work correctly in code
that calls malloc().
Add a simple way to force failure after a given number of malloc() calls.
Fix a header guard to avoid a build error on sandbox_vpl.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
At present the live tree tests are not run on sandbox. This bug is in two
parts, with a duplicate flag value and incorrect logic in the test runner.
This was not noticed because the bug was fixed in a later commit and does
not cause test failures.
Fix this.
Fixes: 7b1dfc9fd7e ("dm: core: Prepare for updating the device tree with ofnode")
Signed-off-by: Simon Glass <sjg@chromium.org>
This function currently assumes that the control FDT is used. Update it
to allow a root node to be passed, so it can work with any tree.
Also add a comment to ofnode_get_by_phandle() so that its purpose is
clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present only one spy is allowed per event. Update the naming to allow
more than one, since some need this flexibility, e.g. the EVT_FT_FIXUP
event.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the log functions instead of pr_...() so we can avoid using __func__.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This is not needed and we should avoid typedefs. Use the struct instead
and rename it to indicate that it really is a legacy struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
When the embedded device tree is pointed to by the __dtb_dt_*begin
symbols, it seems to be covered by the early relocation code and doesn't
need to be manually patched.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
The function calls opendir() but missing the corresponding
closedir() before exit the function.
Add missing closedir() to fix it.
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
The situation is similar to commit bf6376642fe8 ("board: ti: common:
board_detect: Fix EEPROM read quirk"). This is seen on a variant of
eeproms seen on some BeagleBone-AI64 which now has a mix of both 1 byte
addressing and 2 byte addressing eeproms.
Unlike the am335x (ti_i2c_eeprom_am_get) and dra7
(ti_i2c_eeprom_dra7_get) which use constant data structure which allows
us to do a complete read of the data, the
am6(ti_i2c_eeprom_am6_get) eeprom parse operation is dynamic.
This removes the option of being able to read the complete eeprom data
in one single shot.
Fortunately, on the I2C bus, we do see the following behavior: In 1
byte mode, if we attempt to read the first header data yet again, the
misbehaving 2 byte addressing device acts in constant addressing mode
which results in the header not matching up and follow on attempt at 2
byte addressing scheme grabs the correct data.
This costs us an extra ~3 milliseconds, which is a minor penalty
compared to the consistent image support we need to have.
Reported-by: Jason Kridner <jkridner@beagleboard.org>
Fixes: a58147c2dbbf ("board: ti: common: board_detect: Do 1byte address checks first.")
Signed-off-by: Nishanth Menon <nm@ti.com>
Commit c0fce929564f("vexpress64: fvp: enable OF_CONTROL") added code to
consider a potential DTB address being passed in the x0 register, or
revert to the built-in DTB otherwise.
The former case was used when using the boot-wrapper, to which we sell
U-Boot as a Linux kernel. The latter was meant for TF-A, for which we
couldn't find an easy way to use the DTB it uses itself. We have some
quirk to filter for a valid DTB, as TF-A happens to pass a pointer to
some special devicetree blob in x0 as well.
Now the TF-A case is broken, when enabling proper emulation of secure
memory (-C bp.secure_memory=1). TF-A carves out some memory at the top
of the first DRAM bank for its own purposes, and configures the
TrustZone DRAM controller to make this region secure-only. U-Boot will
then hang when it tries to relocate itself exactly to the end of DRAM.
TF-A announces this by carving out that region of the /memory node, in
the DT it passes on to BL33 in x1, but we miss that so far.
Instead of repeating this carveout in our DT copy, let's try to look for
a DTB at the address x1 points to as well. This will let U-Boot pick up
the DTB provided by TF-A, which has the correct carveout in place,
avoiding the hang.
While we are at it, make the detection more robust: the length test (is
the DT larger than 256 bytes?) is too fragile, in fact the TF-A port for
a new FVP model already exceeds this. So we test x1 first, consider 0
an invalid address, and also require a /memory node to detect a valid DTB.
And for the records:
Some asking around revealed what is really going on with TF-A and that
ominous DTB pointer in x0: TF-A expects EDK-2 as its non-secure payload
(BL33), and there apparently was some long-standing ad-hoc boot protocol
defined just between the two: x0 would carry the MPIDR register value of
the boot CPU, and the hardware DTB address would be stored in x1.
Now the MPIDR of CPU 0 is typically 0, plus bit 31 set, which is defined
as RES1 in the ARMv7 and ARMv8 architectures. This gives 0x80000000,
which is the same value as the address of the beginning of DRAM (2GB).
And coincidentally TF-A put some DTB structure exactly there, for its
own purposes (passing it between stages). So U-Boot was trying to use
this DTB, which requires the quirk to check for its validity.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Peter Hoyes <peter.hoyes@arm.com>
This line probably got in by mistake as there is no fs_mutex member in
the btrfs_fs_info struct.
Signed-off-by: Pankaj Raghav <p.raghav@samsung.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
The max size is defined at architectural level. On the same commit
I have checked mostly all the other architecture and look like they are
Fixes: commit ca8a329a1b7f ("Convert CONFIG_SPL_PAD_TO et al to Kconfig")
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
- autoboot: make sure watchdog device(s) are handled with keyed
autoboot (Rasmus)
- gpio_wdt: use __udelay() to avoid recursion (Rasmus)
- watchdog: max6370: use __udelay() to avoid recursion (Pali)
- SPL fixes for STM32F7 MCUs
- Device tree alignement with kernelv6.0-rc4 for MCU's board
- Device tree alignement with kernelv6.0-rc3 for MPU's board
- Update DDR node for STM32MP15
- Cleanup config file for STM32MP1
- Update for cmd_stm32key command
- Fix compatible string to add partitions for STM32MP1
- Update for stm32programmer tool
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Merge tag 'u-boot-stm32-20220927' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
- Increase SYS_MALLOC_F_LEN for STM32 MCU's board
- SPL fixes for STM32F7 MCUs
- Device tree alignement with kernelv6.0-rc4 for MCU's board
- Device tree alignement with kernelv6.0-rc3 for MPU's board
- Update DDR node for STM32MP15
- Cleanup config file for STM32MP1
- Update for cmd_stm32key command
- Fix compatible string to add partitions for STM32MP1
- Update for stm32programmer tool
Currently, AUTOBOOT_KEYED and its variant AUTOBOOT_ENCRYPTION are
broken when one has an external always-running watchdog device with a
timeout shorter than the configured boot delay (in my case, I have a
gpio-wdt one with a timeout of 1 second), because we fail to call
WATCHDOG_RESET() in the loops where we wait for the bootdelay to
elapse.
This is done implicitly in the !AUTOBOOT_KEYED case,
i.e. abortboot_single_key(), because that loop contains a
udelay(10000), and udelay() does a WATCHDOG_RESET().
To fix this, simply add similar udelay() calls in the other loops.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
The udelay() function in lib/time.c contains a WATCHDOG_RESET()
call. So use __udelay() in max6370_wdt.c to prevent recursion.
Fixes: 0a095fc53b15 ("watchdog: Add MAX6370 watchdog timer driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The udelay() function in lib/time.c contains a WATCHDOG_RESET()
call. The only reason this doesn't lead to a catastrophic infinite
recursion is due to the rate-limiting in wdt-uclass.c:
if (time_after_eq(now, priv->next_reset)) {
priv->next_reset = now + priv->reset_period;
wdt_reset(dev);
}
But this would fall apart if ->next_reset was updated after calling the
device's reset method.
This is needlessly fragile, and it's easy enough to avoid that
recursion in the first place by just using __udelay() directly.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
Some STM32 MCU's board need their SYS_MALLOC_F_LEN value enlarged
to avoid the "alloc space exhausted" error message during their boot
process.
Use the default SYS_MALLOC_F_LEN value which is set to 0x2000 in
Kconfig.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
xilinx:
- Add support for new Versal NET SOC
zynqmp:
- Use mdio bus for ethernet phy description
- Wire ethernet phy reset via i2c-gpio
versal:
- Config cleanup
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Merge tag 'xilinx-for-v2023.01-rc1-v2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2023.01-rc1 (round 2)
xilinx:
- Add support for new Versal NET SOC
zynqmp:
- Use mdio bus for ethernet phy description
- Wire ethernet phy reset via i2c-gpio
versal:
- Config cleanup
By pressing "c" key during SPL execution, we force U-boot execution
instead of a kernel XIP image.
This fixes a hard fault when booting stm32f746-disco in SPL with "c"
key pressed during SPL execution.
U-Boot SPL 2022.10-rc5-00009-g40d02baa91 (Sep 20 2022 - 17:21:21 +0200)
Trying to boot from XIP
Hard fault
pc : 080083fc lr : 08000d1b xPSR : 21000000
r12 : 2004f108 r3 : 080083fd r2 : 00000028
r1 : 2004f0c8 r0 : 2004f0e4
Resetting CPU ...
This is due to SYS_UBOOT_START flag set to 0x080083FD which is not correct.
If unset, SYS_UBOOT_START is set by default to CONFIG_SYS_TEXT_BASE
which match with our requirement.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
STM32F746 embeds 1 MB of internal flash [0x08000000-0x080fffff],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
STM32F746 embeds 1 MB of internal flash [0x08000000-0x080fffff],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
Device tree alignment with kernel v6.0-rc4.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Versal NET platform is based on Versal chip which is reusing a lot of IPs.
For more information about new IPs please take a look at DT which describe
currently supported devices.
The patch is adding architecture and board support with soc detection
algorithm. Generic setting should be very similar to Versal but it will
likely diverge in longer run.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/320206853dc370ce290a4e7b6d0bb26b05206021.1663589964.git.michal.simek@amd.com
Currently all GPIOs supported by CMD_EXT_CONTROL/CMD_GET_EXT_CONTROL_STATUS
commands (last 16 GPIOs) are available only when FEAT_PERIPH_MCU feature
bit is set. So do not register these GPIOs by U-Boot driver when this
feature bit is not set, so U-Boot 'gpio' command would see only GPIOs which
really exists.
Fixes: 5e4d24ccc115 ("gpio: Add Turris Omnia MCU driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Disable AVAILABLE_HARTS mechanism to make sure that all harts
can boot to Kernel shell successfully.
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
In SMP all harts will register themself in available_hart
during start up. Then main hart will send IPI to other harts
according to this variables. But this mechanism may not
guarantee that all other harts can jump to next stage.
When main hart is sending IPI to other hart according to
available_harts, but other harts maybe still not finish the
registration. Then the SMP booting will miss some harts finally.
So let it become an option and it will be enabled by default.
Please refer to the discussion:
https://www.mail-archive.com/u-boot@lists.denx.de/msg449997.html
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
U-Boot and SPL don't necessary share the same location, so we might end
with U-Boot SPL in read-only memory (XIP) and U-Boot in read-write memory.
In case of non XIP boot mode, we rely on such variables as "hart_lottery"
and "available_harts_lock" which we use as atomics.
The problem is that CONFIG_XIP also propagate to main U-Boot, not only SPL,
so we need CONFIG_SPL_XIP to distinguish SPL XIP from other XIP modes.
This adds an option special for SPL to behave it in XIP manner and we don't
use hart_lottery and available_harts_lock, during start proccess.
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Rick Chen <rick@andestech.com>
When processing USB_REQ_CLEAR_FEATURE, USB_REQ_SET_FEATURE, and
USB_REQ_GET_STATUS packets in dwc2_ep0_setup an out of bounds access
can occur. This is caused by the wIndex field of the usb control packet
being used as an index into an array whose size is DWC2_MAX_ENDPOINTS (4).
Signed-off-by: Alison Huffman <alisn@google.com>
final patch for blk improvements
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Merge tag 'dm-next-25sep22' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next
sandbox SCSI conversion to driver model
final patch for blk improvements
Add a simple uclass test for SCSI. It reads the partition table from a
disk image and checks that it looks correct.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.
Also drop the SATA command, which does not work with driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
This will be needed to run unit tests, once the SCSI code is used for USB
as well. Enable it for all sandbox builds.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this code out of the helper function so we can (later) add it as part
of the shared emulation code. Set a default value of 0 for buff_used since
that is what we use when there is an error.
Signed-off-by: Simon Glass <sjg@chromium.org>
In preparation for sharing the emulation code between two drivers, move
some of the fields into a new struct. Use a separate header file so it
can be used by various drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
This has the same name as a field in our local private struct, which is
confusing. Change the name to xfer_len instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
The following faulty behavior was observed. The sandbox configured with
CONFIG_SANDBOX_CRASH_RESET=y was invoked with
./u-boot -T -S
After executing `exception undefined' the sandbox reboots.
When executing `exception undefined' the sandbox exits with SIGSEGV.
The expected behavior is that the sandbox should reboot again.
If we are relaunching the sandbox in a signal handler, we have to unblock
the respective signal before calling execv(). See signal(7) man-page.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To quote the author:
On certain places it is required to flush output print buffers to ensure
that text strings were sent to console or serial devices. For example when
printing message that U-Boot is going to boot kernel or when U-Boot is
going to change baudrate of terminal device.
Some console devices, like UART, have putc/puts functions which just put
characters into HW transmit queue and do not wait until all data are
transmitted. Doing some sensitive operations (like changing baudrate or
starting kernel which resets UART HW) cause that U-Boot messages are lost.
Therefore introduce a new flush() function, implement it for all serial
devices via pending(false) callback and use this new flush() function on
sensitive places after which output device may go into reset state.
This change fixes printing of U-Boot messages:
"## Starting application at ..."
"## Switch baudrate to ..."
In addition, take a patch from Heinrich to rename some EFI test
functions in order to not conflict with this series.
In a lot of cases kernel resets UART HW. To ensure that U-Boot messages
printed before booting the kernel are not lost, call new U-Boot console
flush() function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Changing baudrate is a sensitive operation. To ensure that U-Boot messages
printed before changing baudrate are not lost, call new U-Boot console
flush() function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Like in all other console functions, implement also serial_flush() function
as a fallback int console flush() function.
Flush support is available only when config option CONSOLE_FLUSH_SUPPORT is
enabled. So when it is disabled then provides just empty static inline
function serial_flush().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
UART drivers have putc/puts functions which just put characters into HW
transmit queue and do not wait until all data are transmitted.
Implement flush callback via serial driver's pending(false) callback which
waits until HW transmit all characters from the queue.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
On certain places it is required to flush output print buffers to ensure
that text strings were sent to console or serial devices. For example when
printing message that U-Boot is going to boot kernel or when U-Boot is
going to change baudrate of terminal device.
Therefore introduce a new flush() and fflush() functions into console code.
These functions will call .flush callback of associated stdio_dev device.
As this function may increase U-Boot side, allow to compile U-Boot without
this function. For this purpose there is a new config CONSOLE_FLUSH_SUPPORT
which is enabled by default and can be disabled. It is a good idea to have
this option enabled for all boards which have enough space for it.
When option is disabled when U-Boot defines just empty static inline
function fflush() to avoid ifdefs in other code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
An upcoming patch set creates a global function flush(). To make debugging
easier we should not use the same name for a static function.
Rename static functions in the LoadImage() unit test adding an efi_st_
prefix.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
To quote the author, for the first 9 patches:
This patch series fixes U-Boot code to correctly handle RAM size larger
than 2 GB and then fixes fsl ddr driver to do not crash U-Boot when 4 GB
DDR module is detected when U-Boot operates in 32-bit mode (as opposite
of the 36-bit mode).
With this patch series it is possible to boot 32-bit U-Boot with 4 GB
SODIMM DDR3 module without crashes. U-Boot will still use just
CONFIG_MAX_MEM_MAPPED amount of RAM, but it is better than crashing due
to the truncating of 4GB value to 32-bit number (which is zero).
I tested this patch series on powerpc P2020 based board but only with
U-Boot v2022.04 because U-Boot master branch is still broken on P2020.
And then the final two patches here are (in my mind at least) related
clean-ups.
32-bit U-Boot builds cannot use more than around 2 GB of DDR memory. But on
some platforms/boards it is possible to connect also 4 GB SODIMM DDR memory.
U-Boot currently prints only effective size of RAM which can use, which may
be misleading as somebody would expect that this line prints total size of
connected DDR modules. So change show_dram_config code to prints both real
and effective DRAM size if they are different. If they are same then print
just one number like before. It is possible that effective size is just few
bytes smaller than the real size, so print both numbers only in case
function print_size() prints formats them differently.
Signed-off-by: Pali Rohár <pali@kernel.org>
Function print_size() round size to the nearst value with one decimal
fraction number. But in special cases also unit order may overflow.
For example value 1073689396 is printed as "1024 MiB" and value 1073741824
as "1 GiB".
Fix this issue by detecting order overflow and increasing unit order.
With this change also value 1073689396 is printed as "1 GiB".
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
During init_dram() is called also setup_ddr_tlbs_phys() function which may
print message about unmapped DDR memory. So in this case print also
re-aligning filler after unmapped DDR memory message.
Signed-off-by: Pali Rohár <pali@kernel.org>
Currently U-Boot SPL prints just generic message "2 GiB left unmapped".
Change it to more detailed "2 GiB of DDR memory left unmapped in U-Boot".
This is just U-Boot configuration and operating system may map more (or
also less) memory.
Signed-off-by: Pali Rohár <pali@kernel.org>
During init_dram() is called also compute_lowest_common_dimm_parameters()
function which prints multi-line detailed output. So print also re-aligning
filler after "Detected ?DIMM" line to have "DRAM: " output aligned.
Signed-off-by: Pali Rohár <pali@kernel.org>
U-Boot core code already handles the case when RAM size is bigger than
CONFIG_MAX_MEM_MAPPED. So there is no need to do duplicate check in fsl ddr
driver for CONFIG_MAX_MEM_MAPPED. Instead simplify code to just check if
RAM size can be representable in phys_size_t type. And avoid printing
warning if phys_size_t is just 1 byte smaller than RAM size, which is the
typical situation with 4 GB DDR module.
Signed-off-by: Pali Rohár <pali@kernel.org>
Function fsl_ddr_compute() always return size in unsigned long long type,
but function fsl_ddr_sdram_size() returns size in phys_size_t type.
When 36-bit addressing mode is not enabled then phys_size_t type is only
32-bit and thus it cannot store value 4GB (0x100000000). Function
fsl_ddr_sdram_size() in this case returns truncated value 0x0.
Fix this issue by returning the highest representable value, which is
0xffffffff (4GB - 1 byte).
This change fixes crashing of proper U-Boot because it detected 4 GB module
as RAM with zero size.
Signed-off-by: Pali Rohár <pali@kernel.org>
Check needs to be done against CONFIG_MAX_MEM_MAPPED macro and not fixed
size 4GB (as CONFIG_MAX_MEM_MAPPED can be lower and for example for e500
cores it is just 2GB). Also fix printf re-align, which should be applied
only for non-SPL builds, during init_dram() call.
Signed-off-by: Pali Rohár <pali@kernel.org>
Members gd->ram_size and gd->ram_top are of type phys_addr_t which does not
have to fit into ulong type. So cast them into unsigned long long.
Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
changed type of ram_top member from ulong to phys_addr_t but did not
changed types in board_get_usable_ram_top() function which returns value
for ram_top.
So change ulong to phys_addr_t type also in board_get_usable_ram_top()
signature and implementations.
Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ensure that top of RAM can be represented by phys_size_t type. If RAM is
too large or RAM base address is too upper then limit RAM size to prevent
address space overflow.
Signed-off-by: Pali Rohár <pali@kernel.org>
CONFIG_MAX_MEM_MAPPED when defined specifies upper memory mapped limit.
So check for it always, and not only when CONFIG_VERY_BIG_RAM is defined.
Signed-off-by: Pali Rohár <pali@kernel.org>
To quote the author:
This patch series add support for MediaTek MT7981/MT7986 SoCs with their
reference boards and related drivers.
This patch series add basic boot support on eMMC/SD/SPI-NOR/SPI-NAND for
these boards. The clock, pinctrl drivers and the SoC initializaton code
are also included.
Product spec for MT7986:
https://www.mediatek.com/products/home-networking/mediatek-filogic-830
This patch adds more nand headers in two new types:
1. HSM header, used for spi-nand thru SNFI interface
2. SPIM header, used for spi-nand thru spi-mem interface
The original nand header is renamed to AP header.
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The predefined NAND headers take too much spaces in the mtk_image.c.
Moving them into a new file can significantly improve the readability of
both mtk_image.c and the new mtk_nand_headers.c.
This is a preparation for adding more NAND headers.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The verification code of gfh header for NAND and non-NAND are identical.
It's better to define a individual function to reduce redundancy.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Add basic CPU driver used to retrieve CPU model information.
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds clock driver support for MediaTek MT7981 SoC
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds clock driver support for MediaTek MT7986 SoC
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This adds the CLK_XTAL macro/flag to allow modeling clocks which are
directly connected to the xtal clock.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds infrasys clock mux support for mediatek clock drivers.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds support for a clock node to configure its parent clock
where possible.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The mtk clock framework in u-boot uses array index for searching clock
parent (kernel uses strings for search), so we need to specify a special
clock with ID=0 for CLK_XTAL in u-boot.
In the mt7622/mt7629 clock tree, the clocks with ID=0 never call
mtk_topckgen_get_mux_rate, adn return xtal clock directly. This what we
expected.
However for newer chips, they may have some clocks with ID=0 not
representing the xtal clock and still needs mtk_topckgen_get_mux_rate be
called. Current logic will make entire clock driver not working.
This patch adds a flag to indicate that whether a clock driver needs clocks
with ID=0 to call mtk_topckgen_get_mux_rate.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds pinctrl and gpio support for MT7986 SoC
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds pinctrl and gpio support for MT7981 SoC
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds a pinctrl header for common pinconf parameters such as
pull-up/pull-down resistors and drive strengths.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds support for MediaTek I2C interface
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds support for spi-mem controller found on newer MediaTek SoCs
This controller supports Single/Dual/Quad SPI mode.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
Add watchdog support for MediaTek MT7986 SoC
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch add general-purpose timer support for MediaTek MT7981/MT7986.
These two SoCs uses a newer version of timer with its register definition
slightly changed.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds PWM support for MediaTek MT7981 SoC.
MT7981 uses a different register offset so we have to add a version field
to indicate the IP core version.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The input clock for uart is too slow (25MHz) which introduces frequent data
error on both receiving and transmitting even if the baudrate is 115200.
Using high-speed can significantly solve this issue.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The baud clock on some platform may change due to assigned-clock-parent
set in DT. In current flow the baud clock is only retrieved during probe
stage. If the parent of the source clock changes after probe stage, the
setbrg will set wrong baudrate.
To get the right clock rate, this patch records the baud clk struct to the
driver's priv, and changes the driver's flow to get the clock rate before
calling _mtk_serial_setbrg().
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds support for MediaTek MT7981 and MT7986. Both chips uses
PDMA v2.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds support for PDMA v2 hardware. The PDMA v2 has extended the
DMA descriptor to 8-words, and some of its fields have changed comparing
to the v1 hardware.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch is a preparation for adding a new version of PDMA of which the
DMA descriptor fields has changed. Using bitfields will result in a complex
modification. Convert bitfields to u32 units can solve this problem easily.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Using a single soc id to control different initialization and TX/RX flow
for all SoCs is not extensible if more hardware variations are added in
the future.
This patch introduces a struct to replace the original mtk_soc to allow
the driver be able handle newer hardwares.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add eMMC and SDXC support for MediaTek MT7981/MT7986 SoCs
Both chips support SDXC and eMMC 4.5. MT7986A supports eMMC 5.1.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds general board files based on MT7981 SoCs.
MT7981 uses one mmc controller for booting from both SD and eMMC, and the
pins of mmc controller are also shared with spi controller.
So three configs are need for these boot types:
1. mt7981_rfb_defconfig - SPI-NOR and SPI-NAND
2. mt7981_emmc_rfb_defconfig - eMMC only
3. mt7981_sd_rfb_defconfig - SD only
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Add general board files based on MT7986 SoCs.
MT7986 uses one mmc controller for booting from both SD and eMMC.
Both MT7986A and MT7986B use the same pins for spi controller.
Configs for various boot types:
1. mt7986_rfb_defconfig - SPI-NOR and SPI-NAND for MT7986A/B
2. mt7986a_bpir3_emmc_defconfig - eMMC for MT7986A only
3. mt7986a_bpir3_sd_defconfig - SD for MT7986A only
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds basic support for MediaTek MT7981 SoC.
This include the file that will initialize the SoC after boot and its
device tree.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds basic support for MediaTek MT7986 SoC.
This include the file that will initialize the SoC after boot and its
device tree.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Remove the unnecessary nodes for TFABOOT and keep the mandatory part
in SOC dtsi, only the DDRCTRL and DDRPHY addresses.
This patch allows to manage the DDR configuration setting in U-Boot
device tree only if it is needed, when CONFIG_SPL is defined.
With TFABOOT, the DDR configuration is done in TF-A BL2 and the DDR size
is dynamically computed in U-Boot since commit d72e7bbe7c28 ("ram:
stm32mp1: compute DDR size from DDRCTL registers").
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Remove the unnecessary comment after the CONFIG_SYS_BOOTM_LEN
migration to Kconfig.
Fixes: c45568cc4e51 ("Convert CONFIG_SYS_BOOTM_LEN to Kconfig")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change the mask of OTP0 used to close the device on STM32MP
- STM32MP15x: bit 6 of OPT0
- STM32MP13x: 0b111111 = 0x3F for OTP_SECURED closed device
And support the 2 keys for STM32MP13x
- PKHTH : Hash of the 8 ECC Public Keys Hashes Table
(ECDSA is the authentication algorithm)
- EDMK : Encryption/Decryption Master Key
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Update the command stm32key to support several keys selected by
key name and managed by the new sub-command:
stm32key list
stm32key select [<key>]
stm32key read -a
This patch doesn't change the STM32MP15 behavior, only PKH is
supported, but it is a preliminary patch for STM32MP13 support.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Split the read_hash_otp function and introduce the helper function
read_close_status to read the close status in OTP separately of the PKH.
This patch is a preliminary step for STM32MP13 support.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add defines for value used in stm32key for BSEC permanent lock status
and error.
This patch is a preliminary step to support more lock status in BSEC
driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Current compatible string used to update SPI NAND and SPI NOR devices
can lead to a wrong partitions update (for example, SPI NAND partitions
added to SPI NOR node in the device tree). To avoid this wrong behavior,
use jedec,spi-nor compatible string for SPI NOR devices and spi-nand
compatible string for SPI NAND devices.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Improve the partitioning trace done in command stm32prog:
- remove the trace "partition: Done" when the GPT partitioning is not done
- indicate the mmc instance used for each 'gpt write' command
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
As the SMC is only supported in SP-MIN for STM32MP15x, the associated
partition should be absent when the TA NVMEM is not available in OPT-TEE
in STM32MP13x.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Solve many compilation warning when stm32prog is activated on the aarch64.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change the defaut flashlayout location, hardcoded at STM32_DDR_BASE,
to CONFIG_SYS_LOAD_ADDR to avoid issue on board with reserved memory
at STM32_DDR_BASE.
This patch changes the command behavior for STM32MP13 and STM32MP15
platform, as CONFIG_SYS_LOAD_ADDR(0xc2000000) != STM32_DDR_BASE
but without impact for serial boot with STM32CubeProgrammer.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
When the STM32CubeProgrammer sent a empty flashlayout.tsv
file, the command stm32prog correctly parse the file
but data->dev_nb = 0 and the stm32prog_devices_init
operations should be skipped.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
When CONFIG_IMX_HAB is selected the 'hab_status' command reports several
error events, indicating that the BootROM failed to authenticate the SPL.
After inspecting the content of the memory location that corresponds to
the DTB load address, the content did not match with the DTB binary,
showing that some kind of memory corruption/overlap occurred.
Letting the CONFIG_SPL_FIT_IMAGE_TINY option to be selected causes the
DTB to be properly placed into RAM and no more overlap occurs.
With this change, the 'hab_status' command returns no more error events,
which indicates that the BootROM succeeded to authenticate the SPL.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
When running the script to sign SPL/U-Boot on a kontron-sl-mx8mm board,
the fit_block_size was calculated as 0x1000 instead of 0x1020.
Add an extra parenthesis pair to fix it.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Apply a lost patch
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Merge tag 'dm-pull-21sep22' of https://source.denx.de/u-boot/custodians/u-boot-dm
Fix futility bintool to run on newer distros
Apply a lost patch
A binary download is not great, since it depends on libraries being
present in the system. Build futility from source instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
The fdt command currently handles stringlists as strings in 'fdt get value'
subcommand. Since strings in FDT stringlists are separated by '\0', only
the first value gets inserted into the environment variable passed to the
'fdt get value' command.
Example, consider the following DT snippet:
/ { compatible = "foo", "bar" };
The following command only reports the first string in stringlist:
=> fdt get value var / compatible ; print var
foo
It is not possible to assign list of null-terminated strings into U-Boot
environment variable. Add optional 'index' parameter to the subcommand
'fdt get value <var> <path> <prop> [<index>]' which lets user specify which
string within the stringlist should be assigned into the 'var' variable.
The default value of 'index' is 0 in case it is not present. This way the
'fdt' command API does not change and existing scripts are not broken.
The following command now reports the Nth string in stringlist, counting
from zero:
=> fdt get value var / compatible 1 ; print var
bar
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
TI DP83867 is using strapping based on MIO pins. Tristate setup can influce
PHY address. That's why switch description with ethernet-phy-id compatible
string which enable calling reset. PHY itself setups phy address after
power up or reset. Reset description will be added in separate commit.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/52bf9ac0453d4e4896d8edd2618e684bb1ff6012.1662721547.git.michal.simek@amd.com
The upstream Linux DSA drivers do not require phy-handle nodes in
the DSA ports yet the U-Boot DSA drivers do. Add a phy-handle and
the mdio nodes to the u-boot.dtsi file so that future dts file
syncrhonization between Linux and U-Boot don't break networking.
Fixes: 24a7a3c1c042 ("imx8mm: synchronise device tree with linux")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The upstream Linux DSA drivers do not require phy-handle nodes in
the DSA ports yet the U-Boot DSA drivers do. Add a phy-handle and
the mdio nodes to the u-boot.dtsi file so that future dts file
syncrhonization between Linux and U-Boot don't break networking.
Fixes: e0caa84ca685 ("imx8mp: synchronise device tree with linux")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Merge tag 'u-boot-at91-2023.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2023.01 cycle:
This feature set includes the important update on PIO4 pinctrl driver
that solves a long time mismatch between Linux and U-boot, related on
the unification of pinctrl and gpio driver support, now respecting the
pinctrl bindings ABI; and also support for pinctrl subnodes. The feature
set also adds support for PDA screen detection for sam9x60_curiosity
board , one fix for SD-Card reinsertion and one fix for sam9x60 clocks.
With the recent changes in the Orion timer driver Kconfig setup, the
board specific enabling is not needed any more. This patch sync's these
2 boards with their current defconfig version.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Michael Walle <michael@walle.cc>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Adding the "u-boot,dm-pre-reloc" DT property to the timer node is
necesssary to support the timer in the early boot phases (e.g.
SPL & pre-reloc).
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Add the DT bindings / descriptions for timer0 & timer1, exactly as done
in mainline Linux.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
This patch changes the compilation, so that the Armada 375 board(s) are
compiled in a separate step. This is necessary for the timer dts
conversion, as A375 has a different / timer description in the dts.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Now that the new timer support is available for these platforms, let's
select this IF for all these platforms. This way it's not necessary
that each board changes it's config header.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Add timer_get_boot_us() to support boards, that have CONFIG_BOOTSTAGE
enabled, like pogo_v4.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
This patch adds support for other Marvell Armada SoC's, supporting the
25MHz fixed clock operation, like the Armada XP etc.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
With the recent changes in the Marvel mvneta network driver, the MDIO
bus is not connected any more. This patch updates the DT nodes to use
the nodes from the dtsi files instead of creating ad-hoc nodes.
Signed-off-by: Stefan Roese <sr@denx.de>
- Remove EFI support as it's not used on this board
- Disable CONFIG_FIT_PRINT to reduce the serial output (minimal speedup)
Signed-off-by: Stefan Roese <sr@denx.de>
32-bit Marvell Armada BootROMs limit maximal size of SPL image to 192 kB.
So define 192 kB (= 0x30000) limit as default value for SPL_SIZE_LIMIT.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Maximal size of u-boot kwb image binary is $CONFIG_ENV_OFFSET which is
0xF0000 = 983040 bytes. So add missing CONFIG_BOARD_SIZE_LIMIT definition
to ensure that u-boot binary does not overflow to the u-boot env storage.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently CONFIG_BOARD_SIZE_LIMIT check is ignored for u-boot-spl.kwb
target. Fix it by adding missing $(BOARD_SIZE_CHECK) macro.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This driver is not used by any system and is long unmaintained, drop it.
There is a DWC2 OTG driver which is maintained, see CONFIG_USB_GADGET_DWC2_OTG .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
commit 970bf8603b87 ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
had an unintended side effect of resulting in a bootcmd env var change
for boards like venice that did not have CONFIG_USE_BOOTCOMMAND defined
and relied on it being defaulted in include/config_distro_bootcmd.h.
Following that patch it instead got defaulted in tools/env/fw_env_private.h
Fix this by enabling CONFIG_USE_BOOTCOMMAND for venice.
Fixes: commit 970bf8603b87 ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
I messed up application of patch 5a428e751044 ("mmc: fsl_esdhc_spl: Add
support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS"). I took it from
a work-in-progress branch where I changed usage of
CONFIG_SDCARD to CONFIG_SD_BOOT
and refactored
SYS_MPC85XX_NO_RESETVEC
mess.
But these changes aren't in master yet. Fix the wrong usage of these
macros.
Fixes: 5a428e751044 ("mmc: fsl_esdhc_spl: Add support for builds without
CONFIG_SYS_MMC_U_BOOT_OFFS")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
Previously, in order for the `pinctrl-*` DT node properties
to be properly processed, the pinctrl's subnodes were limited
to only having the `pinmux` property as well as other additional
properties (slew-rate, bias-disable, etc.). Now, with this patch
the pinctrl driver is made to work similarly to the one from Linux.
It can now distinguish between one subnode and a subnode with multiple
subnodes.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
This has been done in order to align the DT of U-Boot with the DT
of Linux. In Linux, a phandle from a '-gpio' DT property is linked
to the pinctrl driver, a single driver that handles both pinctrl
settings and offers GPIO API to callers. On the other hand,
U-Boot redirects such phandle to a corresponding UCLASS_GPIO
driver, because U-Boot offers two different types of drivers
in this case: UCLASS_PINCTRL which handles pin functions and
UCLASS_GPIO which handles gpio requests as a gpio provider.
Due to this, we have two drivers in Uboot, but the Devicetree
has a single node. Thus, just one of the drivers can be probed
for the DT node during platform initialization, before relocation.
Our previous solution in U-Boot was to have a different devicetree:
the gpio node has a subnode for the pinctrl driver, which
is not compliant with Linux ABI. Furthermore, our documentation
for this type of nodes mentions no such gpio compatible.
After this patch, we can no longer add nodes with a gpio
compatible in the DT. Thus, in order to link the pinctrl driver to
the gpio one, a hook to the bind method of the former in U-Boot has
been added and the GPIO related compatibles have been removed to
avoid conflict when compatibles are enumerated and bound to drivers
during platform start before relocation. The bind method will attach
the GPIO driver to the pinctrl DT node so that every phandle coming
from '-gpio' DT properties will be redirected to a valid driver
attached to the pinctrl DT node.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
This patch makes sure that the Devicetree for the sama7
boards are aligned with the Devicetree from Linux. This
implies removing the GPIO compatible and replacing it
with the PINCTRL one, as well as unifying the SDMMC
pinctrl related subnodes under one single subnode.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
This patch makes sure that the Devicetree for the sama5
boards are aligned with the Devicetree from Linux. This
implies removing the GPIO compatible and replacing it
with the PINCTRL one, as well as unifying the SDMMC
pinctrl related subnodes under one single subnode.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
ddrck and qspick should have mck_div as parent clocks to be in sync with
linux driver.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Call the PDA detection mechanism at boot time so that we can
have the pda environment variable ready for use.
Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
SAM9X60 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol. Enabling one wire and eeprom drivers
for this memory.
Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
Whenever the SD Card would be removed and then re-inserted while in the
U-Boot command line, the `SDBPWR` bit of the `SDMMC_PCR` register would
remain unset afterwards. In order for the bit to be set again after
re-insertion, register an additional `deferred_probe` method that the
DM would then transparently call. This method will call the generic
`sdhci_probe` which will, during its execution flow, set this bit to 1.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reported-by: Mihai Sain <mihai.sain@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
Adjust the DRAM timing settings for this board per ones provided
by hardware department. The change is applied to the LPDDR4 MR11
register CA ODT configuration, from RZQ/6 to RZQ/3, which fixes
stability issues on subset of boards. The DDR PHY PIE block has
been updated accordingly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable GPIO hog support in SPL to match the GPIO hog support in U-Boot proper.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
- integrate bootcount using SNVS_LP general purpose register LPGPR0
- enable link-time optimisation
- explicitly set a boot delay of one second
- enable CRC32 and MD5
- enable command for low-level access to data in a partition
- enable time commands
- enable PMIC commands
- improve ETHPRIME configuration
- enable eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- remove stale PFUZE100 PMIC driver
- enable thermal management unit driver
- enable more USB host functionality
- enable hexdump
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
"alloc space exhausted" happens in very early stage, which could be seen
with DEBUG_UART options enabled and leeds to an non-functional board.
kontron_pitx_imx8m:
CONFIG_DEBUG_UART_BASE=0x30880000 # for serial3
CONFIG_DEBUG_UART_CLOCK=24000000
imx8mqevk:
CONFIG_DEBUG_UART_BASE=0x30860000 # for uart1
CONFIG_DEBUG_UART_CLOCK=24000000
It is because CONFIG_SYS_MALLOC_F_LEN is too small and still leave
CONFIG_SPL_SYS_MALLOC_F_LEN as 0x2000.
Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
only waiting for TXEMPTY leads to corrupted messages going over the
wire - which is fixed by making use of the FIFO
this change is following the linux kernel uart driver
(drivers/tty/serial/imx.c), which also checks UTS_TXFULL
instead of UTS_TXEMPTY
Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
on imx8(mm) the RXDMUXSEL needs to be set for data going over the wire
(as observable on a connected 'scope) to actually make it into the
RXFIFO
the reference manual is not overly clear about this, and only
mentiones that "UCR3_RXDMUXSEL should always be set." - and since the
CR3 register reverts to its reset values after setting the baudrate,
setting this bit is done during '_mxc_serial_setbgr'
Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Currently, when running ./scripts/get_maintainer.pl on serial_mxc.c
no i.MX maintainer is returned.
Fix it by adding an entry for this driver.
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
This code part is broken, remove it.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
This code part is broken, remove it.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
- Annotate boot devices available in spl_board_boot_device().
- Drop SD3_BOOT/MMC3_BOOT not available for boot on Verdin iMX8M Mini.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Prepare for optional job ring driver model. Sec may be initialized based
on the job ring information processed from the device tree.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Update the distro config env memory layout for the Verdin iMX8M Mini and
Verdin iMX8M Plus:
- loadaddr=0x48280000 allows for 128.5MB area for uncompressing (ie FIT
images, kernel_comp_addr_r, kernel_comp_size)
- fdt_addr_r = loadaddr + 127.5MB : allows for 127.5MB kernel
- scriptaddr = fdt_addr_r + 512KB : allows for 512KB fdt
- ramdisk_addr_r = scriptaddr + 512KB : allows for 512KB script
Memory layout taken from commit fd5c7173ade4
("imx8m{m,n}_venice: update env memory layout") but moved loadaddr by an
additional 0.5MB to avoid "Moving Image from 0x48200000 to 0x48280000"
during booti plus actually defining kernel_comp_size to make booti work.
Note that for our regular BSP Layers and Reference Images for Yocto
Project an updated distro boot script is required (see
meta-toradex-bsp-common/recipes-bsp/u-boot/u-boot-distro-boot).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Commit 99c7cc58e12 ("ddr: imx: Add i.MX9 DDR controller driver")
contains an inobvious side-effect which renders all systems using
DRAM controller at 3732 MT/s unbootable. The change is located in
ddrphy_init_set_dfi_clk(), where the switch case statement entry
3732 changed to entry 3733, so any board with DDR calibration data
for 3732 MT/s operations needs to be updated to 3733 MT/s to match
the change.
Since there is currently only one such board, update the board instead
of handling both 3732 and 3733 options in the driver. It is likely the
NXP MX8MP RPA update will follow and use the later value too.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
The ddrphy_utils.c is now deduplicated in drivers/ddr/imx/phy/ddrphy_utils.c ,
this drivers/ddr/imx/imx8m/ddrphy_utils.c is a remnant from when the
deduplication was implemented and was not removed. Remove it as it is
unused.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Erase the entire U-Boot area during U-Boot update instead of just
a subset of it. This way, in case u-boot-with-spl.imx grows, the
sf write won't write over non-erased part of the SPI NOR.
Signed-off-by: Marek Vasut <marex@denx.de>
Fix copy-paste error of the I2C5 bus recovery GPIO assignment,
the I2C5 GPIOs are on gpio3 instead of gpio5.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
The ECSPI1 is on I2C1/I2C2 pins of the SoC, update the pinmux accordingly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Rename imx8mp-dhcom-pdk2-u-boot.dtsi to imx8mp-dhcom-u-boot.dtsi, since
this file is shared by PDK2, PicoITX and DRC02. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
This PHY is not used on PDK2, the header was added due to copy-paste
error, drop it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Add information about which exact SoM variant is used on which PDK2 variant.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Enable both USB CDC ethernet and USB host ethernet on i.MX8M Plus DHCOM.
This is useful for bringing up systems without ethernet plug, but with
either USB host or gadget plug.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
The GW73xx-C revision and onward replaced the 5-port PCIe switch with a
4-port (dropping PCIe to one of the miniPCIe sockets) due to part
availability. This moved the PCI bus of the GbE eth1 device. Use a fixup
to adjust the dt accordingly so that local-mac-address assigned from dt
works on new revision boards.
While we are at it, rename 'blob' to 'fdt' for clarity.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
When the imx8mm.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree. This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot. Fix this by adding the spba node to the spl
device tree to restore normal booting.
Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
Signed-off-by: Adam Ford <aford173@gmail.com>
wrong end address passed to flush_dcache_range.
modified the flush_dache logic for scatter list elements.
Fixes: 1919f58a8f (crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish)
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Fix spurious ampersand in address print e.g.
Find img info 0x&480331a0, size 855
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>"
Add HABv4 documentation extension for SPL targets covering the
following topics:
- How to sign an securely boot an flash.bin container image.
- How to extend the root of trust for additional boot images.
- Add SPL and fitImage CSF examples.
- Add signature generation script example.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Ye Li <ye.li@nxp.com>
The i.MXRT11 series has different offsets for IOCR_MUX, it also can
address 64MiB of SDRAM so add a macro for that.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
The i.MXRT11 series has two new pll types but are variants of existing.
This patch adds the ability to read one of the pll types' frequency
as it can't be changed unlike the generic pll it also has the
division factors swapped.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
The NXP i.MXRT1170 Evaluation Kit (EVK) provides a platform for rapid
evaluation of the i.MXRT, which features NXP's implementation of the Arm
Cortex-M7 and Cortex-M4 core.
The EVK provides 64 MB SDRAM, Micro SD card socket,
USB 2.0 OTG.
This patch aims to support the preliminary booting up features
as follows:
GPIO
LPUART
SD/MMC
SDRAM
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
This commit adds board support for i.MXRT1170-EVK from NXP. This board
is an evaluation kit provided by NXP for i.MXRT117x processor family.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
While testing on some Kirkwood platforms it was noticed that the timer
did not function correctly all the time. The driver did not correctly
handle 32bit timer value wrap arounds. Using the timer_conv_64()
conversion function fixes this issue.
Fixes: e9e73d78a8fb ("timer: add orion-timer support")
Suggested-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier-oss@weidmueller.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
It seems that waiting only 10 ms after releasing LAN switch from reset
is not enough for the strapping pins to latch the requested values.
P6_MODE[0] is latched to 0 instead of 1.
Increasing the delay to 50 ms fixes this issue.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Remove some now unused macros and #ifdef's.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
Now that we've globally replaced all WATCHDOG_RESET occurances, let's
remove the ugly macro itself in the header.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
Only one occurance of WATCHDOG_RESET is left in one assembler file.
This patch changes this occurance to a direct call to watchdog_reset
and then removes all the ASSEMBLY ifdef'ery in watchdog.h, as it's not
needed any more to clean this mess a bit up.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
Globally replace all occurances of WATCHDOG_RESET() with schedule(),
which handles the HW_WATCHDOG functionality and the cyclic
infrastructure.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
This patch introduces a schedule() function, which shall be used instead
of the old WATCHDOG_RESET. Follow-up patches will make sure, that this
new function is used.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
This patch integrates the watchdog triggering into the recently added
cyclic infrastructure. Each watchdog device that shall be triggered
registers it's own cyclic function. This way, multiple watchdog devices
are still supported, each via a cyclic function with separate trigger
intervals.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
The block interface has two separate implementations, one using driver
model and one not. The latter is really only needed for SPL, where
size constraints allegedly don't allow use of driver model. Of course
we still need space for filesystems and other code, so it isn't clear
that driver model is anything more than the straw that breaks the
camel's back.
The driver model version uses a uclass ID for the interface time, but
converts back and forth between that and if_type, which is the legacy
type.
The HAVE_BLOCK_DEVICE define is mostly a hangover from the old days.
At present its main purpose is to enable the legacy block implementation
in SPL.
Finally the use of 'select' to enable BLK does not work very well. It
causes kconfig errors when another option depends on BLK and it is
not recommended by the kconfig style guide.
This series aims to clean things up:
- Enable BLK based on whether different media types are used, but still
allow boards to disable it
- Rename HAVE_BLOCK_DEVICE to indicates its real purpose
- Drop if_type and use the uclass instead
- Drop some obsolete if_type values
An issue not resolved by this series is that the sandbox host interface
does not actually have a device. At present it uses the root device, which
was convenience for the driver model conversion but not really correct. It
should be possible to clean this up, in a future series.
Another minor issue is the use of UCLASS_USB for a mass-storage device.
This has been the case for a while and is not addresed by this series,
other than to add a comment.
Note that this test relies on Tom Rini's series to drop various boards
including warp and cm_t335
Finally, a patch is included to make binman put fake files in a
subdirectory, since repeated runs of certain boards can cause unrelated
failues (e.g. chromebook_coral) when fake files are left around.
When fixed offset via CONFIG_SYS_MMC_U_BOOT_OFFS is not specified then
expects that U-Boot proper is placed immediately after SPL without any
additional padding.
This allows to generate smaller SPL+U-Boot final binary as it is not
required to specify fixed offset to U-Boot proper at SPL compile time.
In this case offset to U-Boot proper is calculated at SPL compile time in
linker script.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Marek Behún <kabel@kernel.org>
Change 8-byte alignment of SPL binary to just 4-byte alignment as objcopy
trims trailing zero bytes when converting ELF file to RAW binary.
This is same fix for SPL linker script as was done fix for U-Boot linker
script in commit e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE
support").
It is required for the patch "mmc: fsl_esdhc_spl: Add support for builds
without CONFIG_SYS_MMC_U_BOOT_OFFS" which triggered this issue in SPL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
This allows to concatenate SPL and proper U-Boot without extra alignment.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Marek Behún <kabel@kernel.org>
Commit d433c74eecdc ("Convert CONFIG_SDCARD et al to Kconfig") converted
SYS_EXTRA_OPTIONS=SDCARD or SPIFLASH to config options CONFIG_SDCARD and
CONFIG_SPIFLASH, but left one occurance unchanged.
Fix this.
Fixes: d433c74eecdc ("Convert CONFIG_SDCARD et al to Kconfig")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
Use 'CONFIG_MPC85XX_HAVE_RESET_VECTOR && CONFIG_OF_SEPARATE' pattern
instead of 'CONFIG_MPC85XX_HAVE_RESET_VECTOR && !CONFIG_OF_EMBED' also in
OBJCOPYFLAGS_u-boot-nodtb.bin as this pattern is used in rest of Makefile.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Building of final u-boot.bin binary for mpc85xx via binman is needed only
when inserting DTB binary in the middle of the u-boot ELF binary (before
.bootpg and .resetvec ELF sections).
These requirements are met when CONFIG_MPC85XX_HAVE_RESET_VECTOR is enabled
(= generating .bootpg/.resetvec sections) and CONFIG_OF_SEPARATE is enabled
(= inserting DTB binary).
So in all other cases use standard build procedure instead of custom
mpc85xx u-boot.bin Makefile target via binman.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Currently Makefile produces final mpc85xx image when SPL is not used in
custom file u-boot-with-dtb.bin. It is quite confusing name as build
process produce also intermediate file standard file u-boot-dtb.bin (which
is just intermediate and not bootable). Other platforms use u-boot.bin
(UBOOT_BIN) as standard name for final bootable raw image.
So change Makefile rules and binman to produce final bootable file for
mpc85xx also into file u-boot.bin. There is just need for mpc85xx to not
define default rule for u-boot.bin then instruct binman (via DTS file) to
store final image into u-boot.bin (instead of u-boot-with-dtb.bin) and
finally rename target u-boot-with-dtb.bin to u-boot.bin.
With this change are also removed custom Makefile hacks for mpc85xx that it
produced non-standard output file. And also updated documentation.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Behún <kabel@kernel.org>
Makefile uses binman to produce u-boot-with-dtb.bin target. As its input it
takes DTB file and u-boot binary without DTB, which is stored in file
u-boot-nodtb.bin. So fix target dependency.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
This is currently missing. Add it.
Fix the code style for the function while we are here.
Suggested-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
We currently have an if_type (interface type) and a uclass id. These are
closely related and we don't need to have both.
Drop the if_type values and use the uclass ones instead.
Maintain the existing, subtle, one-way conversion between UCLASS_USB and
UCLASS_MASS_STORAGE for now, and add a comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
efi_set_blk_dev_to_system_partition() assumes that 0 is an invalid
if_type. This is true now but is about to be false. Fix this bug to avoid
a test failure.
Signed-off-by: Simon Glass <sjg@chromium.org>
These are currently using a simple array lookup in one direction, and
relying on if_type being sequential.
With the move to uclass IDs this needs to change. Update the code to
prepare for the new way. This patch is intended to introduce no
functional change.
The returning of "(none)" from blk_get_if_type_name() is handling a case
that should not happen in either case.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we use a variable with the same name as the enum. Change this
since we plan to #define the enum to uclass_id.
Signed-off-by: Simon Glass <sjg@chromium.org>
This doesn't seem to be used for anything and it isn't clear what it is.
It dates from the first U-Boot commit.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
We don't want boards to be able to change these. They can be handled
as dependencies of options that need them, such as SPL_MMC. There is no
point in enabling the block interface without any storage devices to
create a block device.
Hide both options from the 'menuconfig' display and deny their use in
defconfig files.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is defined automatically when needed, so drop it from the few
defconfig files that define it manually.
Signed-off-by: Simon Glass <sjg@chromium.org>
Selecting this option can be handled in the Kconfig option itself, as it
is with BLK. Update this an drop the various 'select' clauses.
Signed-off-by: Simon Glass <sjg@chromium.org>
This option is fact really related to SPL. For U-Boot proper we always use
driver model for block devices, so CONFIG_BLK is enabled if block devices
are in use.
It is only for SPL that we have two cases:
- SPL_BLK is enabled, in which case we use driver model and blk-uclass.c
- SPL_BLK is not enabled, in which case (if we need block devices) we must
use blk_legacy.c
Rename the symbol to SPL_LEGACY_BLOCK to make this clear. This is
different enough from BLK and SPL_BLK that there should be no confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
This condition is not needed for these commands, since BLK is enabled for
all boards which use block devices and commands are not available in SPL,
so even if SPL_BLK is not enabled, it doesn't affect commands.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we use HAVE_BLOCK_DEVICE to indicate when block devices are
available.
This is a very strange option, since it partially duplicates the BLK
option used by driver model. It also covers both U-Boot proper and SPL,
even though one might have block devices and another not.
As a first step towards correcting this, create a new inline function
called blk_enabled() which indicates if block devices are available.
This cannot be used in Makefiles, or #if clauses, but can be used in C
code.
A function is useful because we cannot use CONFIG_IS_ENABLED(BLK) to
decide if block devices are needed, since we must consider the legacy
block interface, enabled by HAVE_BLOCK_DEVICE
Update a few places where it can be used and drop some unnecessary #if
checks around some functions in disk/part.c - rely on the compiler's
dead-code elimination instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these files have an #ifdef covering the whole file. Move the
condition to the Makefile instead.
Add BLK to the condition since future patches will adjust things so that
HAVE_BLOCK_DEVICE is only for SPL, but the partition drivers are needed
in U-Boot proper too.
Signed-off-by: Simon Glass <sjg@chromium.org>
The _SUPPORT suffix should be dropped. This happened because the rename
was applied around the same time as this new option, so did not include
renaming the new option.
The relevant commits are:
f7560376ae sata: Rename SATA_SUPPORT to SATA
73059529b2 ata: ahci-pci: Add new option CONFIG_SPL_AHCI_PCI
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable this option on all boards which support block devices. Drop the
related depencies on BLK since these are not needed anymore.
Disable BLOCK_CACHE on M5253DEMO as this causes a build error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Compile U-Boot with UBI/UBIFS support according to doc/board/nokia/rx51.rst
instructions and add test case for loading kernel image from UBI volume.
Signed-off-by: Pali Rohár <pali@kernel.org>
Disable UBI fastmap support which is not supported by original Maemo 5
kernel and explicitly set UBI BEB limit to 10%, which is the value used by
original Maemo 5 kernel. U-Boot default value is 20%.
Signed-off-by: Pali Rohár <pali@kernel.org>
When reading of image fails then do not call bootm. This prevents false
positive test result in case something bootable is present in memory.
Signed-off-by: Pali Rohár <pali@kernel.org>
Original Nokia UBIFS system image has 1870 LEBs, so set UBIFS volume size
in test script to the same value. Number of 1870 LEBs corresponds to 230MiB
(LEB size * num of LEBs = 126KiB * 1870 = 230MiB).
Signed-off-by: Pali Rohár <pali@kernel.org>
At address 0x80000100 are stored initial atags passed to U-Boot by NOLO.
So do not overwrite them when using $loadaddr variable which value is set
from CONFIG_SYS_LOAD_ADDR option.
Signed-off-by: Pali Rohár <pali@kernel.org>
If kernel image in uImage or zImage format is not detected by
lowlevel_init.S code then do not clear memory location where image was
expected. If image is not detected then this memory region is unknown.
So do not unconditionally clear it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Add j721s2 High Security EVM defconfig.
These configs are same as for the non-secure part, except for:
CONFIG_TI_SECURE_DEVICE option set to 'y'
CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y'
CONFIG_SPL_FIT_IMAGE_POST_PROCESS option set to 'y'
CONFIG_BOOTCOMMAND uses FIT images for booting
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Add J7200 High Security EVM defconfig.
These defconfigs are the same as for the non-secure part, except for:
CONFIG_TI_SECURE_DEVICE option set to 'y'
CONFIG_BOOTCOMMAND uses FIT images for booting
Signed-off-by: Andrew Davis <afd@ti.com>
[j-choudhary@ti.com: add few configs from GP variant which were missing]
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
* Drop legacy /boot/PPTImage.md5 check
* Update device tree naming
* Update t30args#0 root cmd line property to support latest kernel
versions (root=/dev/mmcblk0p2 for linux < 4 and
root=/dev/mmcblk1p2 for linux >= 4)
* Add custom bootloader version string
* Destroy invalid dtb at ${dtbaddr} and configuration script at
${cfgaddr} to ensure proper boot in warm restart case.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Commit 0ea4fc4dcf90 ("board/BuR: invalidate ${dtbaddr} before cfgscr")
destroys the boot targets b_t30lgcy#0 and b_t30lgcy#1. The reason behind
this is, that b_t30lgcy#0 and b_t30lgcy#1 both load the for booting
needed device trees from mmc and the cfgscr script patches those. Because
of this, cfgscr is not allowed to destroy the previously loaded device
tree otherwise cfgscr will fail.
This patch moves the device trees invalidation on warm restart to the
PREBOOT cmd to fix that issue.
Fixes: 0ea4fc4dcf90 ("board/BuR: invalidate ${dtbaddr} before cfgscr")
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
* Remove unnecessary device tree nodes which are not needed in
U-Boot directly.
* Move all U-Boot specific device tree properties to u-boot dtsi.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Commit 6337d53fdf45 ("arm: dts: sync am33xx with Linux 5.9-rc7") syncs
the am335x device tree with the latest linux kernel am335x device tree.
That causes problems with device tree in SPL stage.
To fix the issues CONFIG_SPL_OF_TRANSLATE must be set to handle the
synced bus addresses correctly.
A custom U-Boot device tree is also needed since the SPL build removes
bus properties from bus nodes which are not explicitly marked with the
u-boot,dm-spl or u-boot,dm-pre-reloc flag. Therefore all parent buses of
the in the SPL needed devices must be marked with u-boot,dm-pre-reloc.
Also since there is no driver for "ti,sysc" compatible property in SPL
the buses marked with this compatible string must also be marked with
compatible = "simple-bus" to make the underlying devices visible in
SPL. Otherwise the matching device drivers aren't found and the uclass
drivers are dropped.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
The SPI and NAND board variants never went into production.
Drop those board variants.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
- Activate SCMI regulator for STM32MP15 defconfig, fix the usb start command
for scmi device tree
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Merge tag 'u-boot-stm32-20220915' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Fixes on STM32 I2C drivers
- Activate SCMI regulator for STM32MP15 defconfig, fix the usb start command
for scmi device tree
- Add uncompressed kernel image support to falcon mode, TEE
improvements, make xyz-modem timeout configurable, gpio updates and
other assorted improvements.
Check the that the hash length is shorter than the message length. This
avoids:
./tools/../lib/rsa/rsa-verify.c:275:11: warning:
‘*db’ may be used uninitialized [-Wmaybe-uninitialized]
275 | db[0] &= 0xff >> leftmost_bits;
Fixes: 061daa0b61f0 ("rsa: add support of padding pss")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Normally, readline is not used int SPL. However, it may be useful to
enable the Freescale DDR interactive mode in SPL, while U-Boot is still
executing from SRAM. The default settings for readline result in a large
buffer being allocated. Reduce the size of the maximum input line, and
the number of lines of scrollback when building for SPL.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This allows to test if a pin's label if displayed using gpio_get_status()
when this pin is configured in alternate function.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Even pin with GPIOF_UNUSED function can have a label.
The criteria to add or not a space character is linked to label not to
the used/unused status.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The bar of the structure virtio_pci_cap is the index, and each base
address occupies 4 bytes, so it needs to be multiplied by 4.
This patch fixes a bug reported by Felix Yan
https://lists.denx.de/pipermail/u-boot/2022-August/492779.html
Signed-off-by: Xiang W <wxjstz@126.com>
Tested-by: Felix Yan <felixonmars@archlinux.org>
The nvme driver falsely assumed that the last entry on a page
of the prp-list always points to the next page of the prp-list.
This potentially can lead to the illegal creation of pages on
the prp-list with only a single entry. This change now ensures
that splitting the prp-list into multiple pages, behaves now as
required by the NVME-Spec.
Related to this, also the size of the memory allocation is adjusted
accordingly.
Signed-off-by: Alexander Sowarka <alexander.sowarka@aerq.com>
Now when loadx and loady commands could be aborted / cancelled by CTRL+C,
allow to configure timeout for initial x/y-modem packet via env variable
$loadxy_timeout and by default use value from new compile-time config
option CONFIG_CMD_LOADXY_TIMEOUT. Value is in seconds and zero value means
infinite timeout. Default value is 90s which is the value used before this
change for loadx command.
Other load commands loadb and loads already waits infinitely. Same behavior
for loadx and loady commands can be achieved by setting $loadxy_timeout or
CONFIG_CMD_LOADXY_TIMEOUT to 0.
Signed-off-by: Pali Rohár <pali@kernel.org>
This fixes numerous cases of format strings not matching their
arguments. Also keep the format strings on one line for easier grepping.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These two device tree properties were not being applied.
Fixes: 1fd9eb68d6 ("i2c: stm32f7: move driver data of each instance in a privdata")
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Alain Volmat <alain.volmat@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Current function stm32_i2c_message_xfer is sending a STOP
whatever the result of the transaction is. This can cause issues
such as making the bus busy since the controller itself is already
sending automatically a STOP when a NACK is generated.
Thanks to Jorge Ramirez-Ortiz for diagnosing and proposing a first
fix for this. [1]
[1] https://lore.kernel.org/u-boot/20220815145211.31342-2-jorge@foundries.io/
Reported-by: Jorge Ramirez-Ortiz, Foundries <jorge@foundries.io>
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Functions stm32_i2c_message_start and stm32_i2c_handle_reload
both get a stop boolean indicating if the transfer should end with
a STOP or not. However no specific handling is needed in those
functions hence remove the parameter.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Comment within stm32_i2c_message_start is misleading, indicating
that AUTOEND bit is setted while it is actually cleared.
Moreover, the bit is actually never setted so there is no need
to clear it hence get rid of this bit clear and the bit macro
as well.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Bits should be set to 0, not 1.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Activate the support of SCMI regulator to support the scmi_reg11,
scmi_reg18 and scmi_usb33 regulators present in the scmi device tree of
STMicroelectronics boards with stm32mp15-scmi.dtsi
Fixes: 6cccc8d396bf ("ARM: dts: stm32: add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Changes optee_rng driver to register itself has a OP-TEE service so
that a device is bound for the driver when OP-TEE enumerates the
PTA RNG service.
Cc: Sughosh Ganu <sughosh.ganu@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This change defines resources for OP-TEE service drivers to register
themselves for being bound to when OP-TEE firmware reports the related
service is supported. OP-TEE services are discovered during optee
driver probe sequence which mandates optee driver is always probe once
bound.
Discovery of optee services and binding to related U-Boot drivers is
embedded upon configuration switch CONFIG_OPTEE_SERVICE_DISCOVERY.
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Removes local variable child in optee_probe() that is not used.
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Allocate memory for buffers at a cache-line boundary to avoid
misaligned buffer address for subsequent reads. This avoids an
additional sector-based memory copy in the fat file system driver:
FAT: Misaligned buffer address (...)
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
The device tree binding [1] specify the vendor-id, product-id, device-id
and language-id as 16 bit values and the linux driver reads the boost-up
value as 8 bit value.
[1] https://www.kernel.org/doc/Documentation/devicetree/bindings/usb/usb251xb.txt
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add functions to read 8/16-bit integers like the existing functions for
32/64-bit to simplify read of 8/16-bit integers from device tree
properties.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is required for architectures which do not support compressed kernel images (i.e. ARM64). This is only used while not booting via FIT image.
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
UEFI:
Implement a command eficonfig to maintain Load Options and boot order via
menus.
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Merge tag 'efi-next-2022-09-14' of https://source.denx.de/u-boot/custodians/u-boot-efi into next
Pull request for efi next
UEFI:
Implement a command eficonfig to maintain Load Options and boot order via
menus.
To quote the author:
The previous attempt at this[1] broke a board and was reverted in [2].
This series adopts a slightly different approach, splitting the changes
into many commits.
[1] f33a2c1bd0f ("image: Remove #ifdefs from select_ramdisk()")
[2] 621158d106f ("Revert "image: Remove #ifdefs from select_ramdisk()"")
Remove all but a few that are difficult, relying on legacy CONFIG options
or optional global_data fields.
Drop the duplicate function name in the comment for boot_get_cmdline().
Signed-off-by: Simon Glass <sjg@chromium.org>
Finish off the refactoring by correcting the indent levels. Note that this
does not include any functional changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Drop the last one of these, by using a done_select variable to control
whether to fall back to using 'select' as a hex value.
Note that the indentation is not adjusted, to make this easier to review.
Signed-off-by: Simon Glass <sjg@chromium.org>
Drop the #ifdef from near the end of select_ramdisk(). Move some variables
to the top of the function to make this work.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current switch default is tricky since it relies on #ifdefs to work.
Use a bool instead.
Also fix the comment on @select, since it has a dual purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Convert this to an if(), fix the cast from an address to a pointer and
make sure that any error is returned correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
To quote the author:
This patchset adds the basic infrastructure to periodically execute
code, e.g. all 100ms. Examples for such functions might be LED blinking
etc. The functions that are hooked into this cyclic list should be
small timewise as otherwise the execution of the other code that relies
on a high frequent polling (e.g. UART rx char ready check) might be
delayed too much. This patch also adds the Kconfig option
CONFIG_CYCLIC_MAX_CPU_TIME_US, which configures the max allowed time
for such a cyclic function. If it's execution time exceeds this time,
this cyclic function will get removed from the cyclic list.
How is this cyclic functionality executed?
This patchset integrates the main function responsible for calling all
registered cyclic functions cyclic_run() into the common WATCHDOG_RESET
macro. This guarantees that cyclic_run() is executed very often, which
is necessary for the cyclic functions to get scheduled and executed at
their configured periods.
This cyclic infrastructure will be used by a board specific function on
the NIC23 MIPS Octeon board, which needs to check periodically, if a
PCIe FLR has occurred.
Ideas how to continue:
One idea is to rename WATCHDOG_RESET to something like SCHEDULE and
move the watchdog_reset call into this cyclic infrastructure as well.
Or to perhaps move the shell UART RX ready polling to a cyclic
function.
It's also possible to extend the "cyclic" command, to support the
creation of periodically executed shell commands (for testing etc).
Provide a unit test for the eficonfig command.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The bootmenu enumerates the UEFI boot options
for boot device selection.
This commit adds the description how the UEFI boot work
in bootmenu. This commit also adds "Synopsis", "Description"
and "Configuration" sections to follow the U-Boot command
documentation format.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This commit adds the menu entry to update UEFI BootOrder variable.
User moves the entry with UP/DOWN key, changes the order
with PLUS/MINUS key, press SPACE to activate or deactivate
the entry, then finalizes the order by ENTER key.
If the entry is activated, the boot index is added into the
BootOrder variable in the order of the list.
The U-Boot menu framework is well designed for static menu,
this commit implements the own menu display and key handling
for dynamically change the order of menu entry.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
UEFI specification requires booting from removal media using
a architecture-specific default image name such as BOOTAA64.EFI.
This commit adds the removable media entries into bootmenu,
so that user can select the removable media and boot with
default image.
The bootmenu automatically enumerates the possible bootable
media devices supporting EFI_SIMPLE_FILE_SYSTEM_PROTOCOL,
add it as new UEFI boot option(BOOT####) and update BootOrder
variable. This automatically generated UEFI boot option
has the dedicated guid in the optional_data to distinguish it from
the UEFI boot option user adds manually. This optional_data is
removed when the efi bootmgr loads the selected UEFI boot option.
This commit also provides the BOOT#### variable maintenance feature.
Depending on the system hardware setup, some devices
may not exist at a later system boot, so bootmenu checks the
available device in each bootmenu invocation and automatically
removes the BOOT#### variable corrensponding to the non-existent
media device.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
This commit adds the menu entry to delete the UEFI boot option.
User moves the entry with UP/DOWN key, changes, then presses
ENTER key to delete the selected boot option.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
This is preparation to support menu-driven UEFI BootOrder
variable updated by KEY_PLUS, KEY_MINUS and KEY_SPACE.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This commit adds the menu entry to edit the existing
BOOT#### variable contents.
User selects the item from the boot option list, then
user can edit the description, file path and optional_data.
Note that automatically generated boot option entry by bootmenu
to support the removable media device is filtered out and user
can not edit the automatically generated entry.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
This commit add the "eficonfig" command.
The "eficonfig" command implements the menu-driven UEFI boot option
maintenance feature. This commit implements the addition of
new boot option. User can select the block device volume having
efi_simple_file_system_protocol and select the file corresponding
to the Boot#### variable. User can also enter the description and
optional_data of the BOOT#### variable in utf8.
This commit adds "include/efi_config.h", it contains the common
definition to be used from other menus such as UEFI Secure Boot
key management.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Add documentation for the cyclic function infrastructure, including the
cyclic command.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds a fixup function related to a PCIe FLR (Function Level
Reset) problem on the NIC23 PCIe board. This function is imported from
the Marvell Octeon 2013 U-Boot version as a (nearly) verbatim copy. It
uses the newly introduced cyclic infrastructure, so that this function
gets called every 100us, which is needed to detect this FLR issue.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the cyclic command, which currently only supports the
'list' subcommand, to list all currently registered cyclic functions.
Here an example:
=> cyclic list
function: cyclic_demo, cpu-time: 7010 us, frequency: 99.80 times/s
function: cyclic_demo2, cpu-time: 1 us, frequency: 1.13 times/s
As you can see, the cpu-time is accounted, so that cyclic functions
that take too long might be discovered. Additionally the frequency is
logged.
The 'cyclic demo' commands registers the cyclic_demo() function to
be executed all 'cycletime_ms' milliseconds. The only thing this
function does is delaying by 'delay_us' microseconds.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds a call to cyclic_init() to board_f/r.c, enabling the
common cyclic infrastructure. After this it's possible to add cyclic
functions via cyclic_register().
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch integrates the main function responsible for calling all
registered cyclic functions cyclic_run() into the common WATCHDOG_RESET
macro. This guarantees that cyclic_run() is executed very often, which
is necessary for the cyclic functions to get scheduled and executed at
their configured periods.
If CONFIG_WATCHDOG is not enabled, only cyclic_run() without calling
watchdog_reset(). This guarantees that the cyclic functionality does not
rely on CONFIG_WATCHDOG being enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the basic infrastructure to periodically execute code, e.g. all
100ms. Examples for such functions might be LED blinking etc. The
functions that are hooked into this cyclic list should be small timewise
as otherwise the execution of the other code that relies on a high
frequent polling (e.g. UART rx char ready check) might be delayed too
much. This patch also adds the Kconfig option
CONFIG_CYCLIC_MAX_CPU_TIME_US, which configures the max allowed time
for such a cyclic function. If it's execution time exceeds this time,
this cyclic function will get removed from the cyclic list.
How is this cyclic functionality executed?
The following patch integrates the main function responsible for
calling all registered cyclic functions cyclic_run() into the
common WATCHDOG_RESET macro. This guarantees that cyclic_run() is
executed very often, which is necessary for the cyclic functions to
get scheduled and executed at their configured periods.
This cyclic infrastructure will be used by a board specific function on
the NIC23 MIPS Octeon board, which needs to check periodically, if a
PCIe FLR has occurred.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When using us times it makes sense to use 64bit variables for storage.
The currently implemented time_after() and friends functions only handle
32bit variables. This patch now includes the 64bit variants as well
from Linux. This will be used by the upcoming generic cyclic function
infrastructure.
These macros were copied from include/linux/jiffies.h of Linux 5.18.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
To quote the author:
This patch series aims to porting ASPEED FMC/SPI memory controller
driver with spi-mem interface. spi-mem dirmap framework is also
synchronized from Linux. These patches have been verified on
AST2600, AST2500 and AST2400 EVBs.
Add ID for Winbond W25Q512JVQ device which is supported
on AST2600 EVB by default.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Driver can configure the SPI clock frequnecy to the
target value of "spi-max-frequency" property in
the device tree. The frequency is divided from HCLK,
200MHz. Usually, the ASPEED SPI clock frequency range
is between 12.5MHz and 100MHz. On AST2600, the lowest
SPI clock frequency can be about 780kHz.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
If "decoded-ranges" is defined in the device tree, the
driver will apply the decoded address ranges from this
property to the controller during probe stage.
This patch refers to the following OpenBMC u-boot patch.
https://patchwork.ozlabs.org/project/openbmc/list/?series=306969
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
There are some known HW problems about decoded
range register configurations on existing AST2500 and
AST2600 platforms. Additional callback function,
adjust_decoded_sz, is added to solve these problems
on each platform. Besides, aspeed_spi_trim_decoded_size
function is added to modify overall decoded address
size for fitting the maximum AHB decoded size.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
From the HW point of view, the performance of
command read mode is greater than user mode slightly.
Thus, dirmap read framework is introduced to achieve
this goal. In dirmap_create, command read mode is
configured. Usually, the decoded address area with flash
size is assigned to each CS. CPU can thus access the
SPI flash as normal memory in dirmap_read function.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
This adds support for the dirmap API to the spi-nor subsystem, as
introduced in Linux commit df5c21002cf4 ("mtd: spi-nor: use
spi-mem dirmap API").
This patch is synchronize from the following patch
https://patchwork.ozlabs.org/project/uboot/patch/20210205043924.149504-4-seanga2@gmail.com/
The corresponding Linux kernel SHA1 is df5c21002cf4.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
This adds the dirmap API originally introduced in
Linux commit aa167f3fed0c
("spi: spi-mem: Add a new API to support direct mapping").
This also includes several follow-up patches and fixes.
Changes from Linux include:
* Added Kconfig option
* Changed struct device to struct udevice
* Changed struct spi_mem to struct spi_slave
This patch is obtained from the following patch
https://patchwork.ozlabs.org/project/uboot/patch/20210205043924.149504-3-seanga2@gmail.com/
The corresponding Linux kernel SHA1 is aa167f3fed0c.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Although AST2400 is EOL officially, in order to achieve
sustainability and completeness, AST2400 part is added.
For AST2400,
- Five CSs are supported by FMC controller.
- SPI1 controller only supports single CS and there is
no address segment address register. The CE control
register of SPI1 is located at the offset 0x04 and
the 4-byte address mode control bit is bit 13 of
this register.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Add ASPEED BMC FMC/SPI memory controller driver with
spi-mem interface for AST2500 and AST2600 platform.
There are three SPI memory controllers embedded in an ASPEED SoC.
- FMC: Named as Firmware Memory Controller. After AC on, MCU ROM
fetches initial device boot image from FMC chip select(CS) 0.
- SPI1: Play the role of a SPI Master controller. Or, there is a
dedicated path for HOST(X86) to access its BIOS flash mounted
under BMC. spi-aspeed-smc.c implements the control sequence when
SPI1 is a SPI master.
- SPI2: It is a pure SPI flash controller. For most scenarios, flashes
mounted under it are for pure storage purpose.
ASPEED SPI controller supports 1-1-1, 1-1-2 and 1-1-4 SPI flash mode.
Three types of command mode are supported, normal mode, command
read/write mode and user mode.
- Normal mode: Default mode. After power on, normal read command 03h or
13h is used to fetch boot image from SPI flash.
- AST2500: Only 03h command can be used after power on
or reset.
- AST2600: If FMC04[6:4] is set, 13h command is used,
otherwise, 03h command.
The address length is decided by FMC04[2:0].
- Command mode: SPI controller can send command and address
automatically when CPU read/write the related remapped
or decoded address area. The command used by this mode
can be configured by FMC10/14/18[23:16]. Also, the
address length is decided by FMC04[2:0]. This mode will
be implemented in the following patch series.
- User mode: It is a traditional and pure SPI operation, where
SPI transmission is controlled by CPU. It is the main
mode in this patch.
Each SPI controller in ASPEED SoC has its own decoded address mapping.
Within each SPI controller decoded address, driver can assign a specific
address region for each CS of a SPI controller. The decoded address
cannot overlap to each other. With normal mode and command mode, the
decoded address accessed by the CPU determines which CS is active.
When user mode is adopted, the CS decoded address is a FIFO, CPU can
send/receive any SPI transmission by accessing the related decoded
address for the target CS.
This patch only implements user mode initially. Command read/write
mode will be implemented in the following patches.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Add FWSPICS1 and SPI1CS1 in AST2500 pinctrl group.
On AST2500 EVB, FWSPICS1 can be supported by default.
An extra jumper, J45, should be configured before
enabling SPI1CS1.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
User can get correct HCLK frequency during driver probe stage
by adding the following configuration in the device tree.
"clocks = <&scu ASPEED_CLK_AHB>".
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
cmd:
- bdinfo - guard LMB code to run only when LMB is enabled
timer:
- convert arm twd timer to DM
power-domain:
- Skip loading config object for Versal
xilinx:
- Fix logic when dfu_alt_info is generated
- Define only mmc devnum not partition
- Add xlnx prefix to GEM compatible string
- Add missing tca6416 to zynqmp SC - vck190
- Add env redund offset
- Enable CMD_GREPENV/SETEXPR by default
- Move board_get_usable_ram_top() to common location
- Add support for SOC detection
net/gem:
- Check rate before setting it up
microblaze:
- drop CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE
- Show cache size in bdinfo
spi:
- cadence_qspi: driver updates
- zynqmp_gqspi: driver updates
- zynqmp_gqspi: Add tap delays for Versal
zynq:
- Enable mkeficapsule compilation
- Use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME for dfu_alt_info
- Align bss and end of u-boot image to 64bits
- Align qspi node name with Linux kernel
- DT: List OCM memory
zynqmp:
- Fix AES cache handling with a user provided key
- SOM: Add mtd partition for secure OS storage area
- Add ref_clk property for REFCLKPER calculation
- Fix mdio bus description for vck190-sc
xilinx-mini:
- Remove unneeded configs
- Disable LMB
versal:
- Enable i2c mux pca954x by default
- Define CONFIG_CQSPI_REF_CLK
- Enable power domain driver
- Enable zynqmp_gqspi driver
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Merge tag 'xilinx-for-v2023.01-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2023.01-rc1
cmd:
- bdinfo - guard LMB code to run only when LMB is enabled
timer:
- convert arm twd timer to DM
power-domain:
- Skip loading config object for Versal
xilinx:
- Fix logic when dfu_alt_info is generated
- Define only mmc devnum not partition
- Add xlnx prefix to GEM compatible string
- Add missing tca6416 to zynqmp SC - vck190
- Add env redund offset
- Enable CMD_GREPENV/SETEXPR by default
- Move board_get_usable_ram_top() to common location
- Add support for SOC detection
net/gem:
- Check rate before setting it up
microblaze:
- drop CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE
- Show cache size in bdinfo
spi:
- cadence_qspi: driver updates
- zynqmp_gqspi: driver updates
- zynqmp_gqspi: Add tap delays for Versal
zynq:
- Enable mkeficapsule compilation
- Use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME for dfu_alt_info
- Align bss and end of u-boot image to 64bits
- Align qspi node name with Linux kernel
- DT: List OCM memory
zynqmp:
- Fix AES cache handling with a user provided key
- SOM: Add mtd partition for secure OS storage area
- Add ref_clk property for REFCLKPER calculation
- Fix mdio bus description for vck190-sc
xilinx-mini:
- Remove unneeded configs
- Disable LMB
versal:
- Enable i2c mux pca954x by default
- Define CONFIG_CQSPI_REF_CLK
- Enable power domain driver
- Enable zynqmp_gqspi driver
To quote the author:
This series makes a further attempt to get closer to having all tests
run in parallel. It introduces a new 'make pcheck' option which runs
tests in parallel, skipping those that are not compatible.
A number of fixes are included for existing tests. The vboot test is
updated to only run a single scenario in 'quick' mode.
This makes use of pytest's parallel-testing features. The resulting
times (including incremental building with LTO) on a 16-core machine are
as follows:
make pcheck - 1 minute 6 seconds
make qcheck - 3 minutes
make check - 5 minutes 15 seconds
Note that this is not a fair comparison, since 'make pcheck' omits a
number of tests, even more than 'make qcheck'.
Code supports board detection based on information available in EEPROM in
legacy or FRU format. But this is not enough for emulation and simulation
systems which are lacking these identification EEPROMs. But SOC itself has
normally registers for SOC identification. Based on them it is possible to
compose detected name. That's why prepare infrastructure in common location
for SOC platform detection which is called before board platform detection.
SOC platform detection shouldn't detect real silicon and should fallback to
current existing mechanism to identify boards based on EEPROMs.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com
Few lines are extented to next line though they can fit in 80 character
limit, align them to single line. No functional change.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20220825125906.11581-6-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
As the flash sizes are increasing day by day, QSPI can have devices of
size > 512MB. In qspi driver we are trying to read all the data at once
using DMA.
The DMA descriptor destination size is only 29bits long.
QSPIDMA_DST_SIZE 0xFF0F0804
BITS: 1:0 Reserved to keep word alignment
BITS: 28:2 Number of 4-byte words the DMA will transfer
BITS: 31:29 Reserved: Returns 0 when read, writes ignored
So we can only transfer data of 0x1FFFFFF0(512MB minus 4bytes) bytes.
Anything above will overflow this register and will ignore higher bits
above 29 bits.
Change the DMA functionality if the requested size is greater than or
equal to 512MB to read 256MB chunks.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20220825125906.11581-5-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add support for io-mode transfers. This is necessary for UBIFS to work
properly with spi-nor devices. The driver will work in IO mode when
"has-io-mode" is passed from device tree instead of DMA.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20220825125906.11581-4-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
GQSPI driver is using it but this function is never called for Versal
because it is removed by linker. But function should be declared to avoid
this build warning:
drivers/spi/zynqmp_gqspi.c: In function 'zynqmp_qspi_set_tapdelay':
drivers/spi/zynqmp_gqspi.c:378:3: warning: implicit declaration of function
'zynqmp_mmio_write' [-Wimplicit-function-declaration]
378 | zynqmp_mmio_write(IOU_TAPDLY_BYPASS_OFST,
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20220825125906.11581-3-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
As per driver model we should enumerate plat structure only in
of_to_plat() and should be used only in probe(). Copy required
plat structure info into priv structure in probe() and use priv
structure across the driver. So replace plat with priv structure across
the driver.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220824113847.7482-4-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
In cadence_spi_read_id we are using STIG mode to read flash id's.
Call cadence_qspi_apb_command_read_setup() to setup cmd, addr and data
bus width properly before cadence_qspi_apb_command_read().
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220824113847.7482-3-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
In cadence_spi_probe, cadence_qspi_versal_flash_reset() is called to reset
the flash device. Looks like there is a mistake in previous series of
patches where it is defined as cadence_spi_versal_flash_reset() but
called as cadence_qspi_versal_flash_reset. Since there is a weak function
defined with the same name this issue was not caught.
Fix the issue by renaming cadence_spi_versal_flash_reset as
cadence_qspi_versal_flash_reset().
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220824113847.7482-2-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add bdinfo_print_size() helper to display size variables (such as cache
sizes) in bdinfo format. The size is printed as "xxx Bytes", "xxx KiB",
"xxx MiB", "xxx GiB", etc as needed;
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Jason Liu <jason.hui.liu@nxp.com>
Link: https://lore.kernel.org/r/20220829170205.1274484-3-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Check snprintf() return value for errors.
Make microblaze_cpu_get_desc() directly return snprintf() error code if
ret < 0. Otherwise, if the return value is greater than or equal to size,
the resulting string is truncated, so return -ENOSPC.
Fixes: 816226d27e ("cpu: add CPU driver for microblaze")
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220829170205.1274484-2-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
These macros are not used anymore in microblaze code since commit
f113d7d303467 ("Convert CONFIG_SPL_STACK to Kconfig"), so remove them.
Fixes: f113d7d303467 ("Convert CONFIG_SPL_STACK to Kconfig")
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220829170205.1274484-1-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory
location") adds functionality for ZynqMP to read reserved memory node and
do not place U-Boot to reserved location. This functionality is generic
across all Xilinx SOCs that's why move it to common location to be used by
all Xilinx SOCs.
On zynq platform this is also fixing issue where U-Boot was placed to
locating which was reserved already which ends up with error message
"ERROR: reserving fdt memory region failed (addr=30000000 size=10000000
flags=4)" which is shown when bdinfo is called.
Tested on vck190, zcu102, zc706 and kc705 to cover all platforms.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com
ENV_OFFSET_REDUND config is by default set to 0 for flashes. Saving the env
variables is overwriting data at 0 offset, which is wrong. So add default
redund env offset for Zynq, ZynqMP, Versal and microblaze platforms.
Configured ENV_OFFSET_REDUND offsets by ENV_OFFSET + (2 * ENV_SIZE).
In case of versal, we configured ENV_OFFSET_REDUND at 0x7F00000 instead
of 0x7F80000. As BOOT_SCRIPT_OFFSET is already configured at 0x7F80000.
Added ENV_OFFSET_REDUND in Kconfig for microblaze due to dependency of
ENV_IS_IN_SPI_FLASH config.
Below table specifies platform specific env and env redund offsets.
PLAT ENV_OFFSET ENV_OFFSET_REDUND
---- ---------- -----------------
ZYNQ 0xE0000 0xE40000
ZYNQMP 0x1E00000 0x1E80000
VERSAL 0x7F40000 0x7F00000
MICROBLAZE 0x1080000 0x10C0000
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/92656dc08f0f5a749d62b71ca6e77fe1be72e9e0.1661340204.git.michal.simek@amd.com
Added ref_clk 'ref' property for GUCTL_REFCLKPER and GFLADJ_REFCLK_FLADJ
calculation. This property configure correct value for SOF/ITP counter
and period of ref_clk.
This patch adds 'ref' property for both dwc3_0 and dwc3_1 cores.
Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/417545b948ea12a9301a5e80851f98523be2b443.1661259809.git.michal.simek@amd.com
Update MTD partitions of Kria device trees to allocate 128KB of QSPI
memory for secure OS. Increased "SHA256" partition size & changed
starting address of "User" partition to accommodate the new partition
"Secure OS Storage"
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9cc64b8c731d11439de73d0af54c65080068f00b.1661242681.git.michal.simek@amd.com
The commit 53b406369e9d ("DFU: Check the number of arguments and argument
string strictly") added strict control over string that 0:1 partition
definition is not valid anymore that's why use only device number without
partition ID. Device is specified by 2nd parameter and partition by 3rd.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/840eca944f4f2abeeb63b5d724f9ba5fe9a9213b.1660055571.git.michal.simek@amd.com
Zynq can use efi capsule infrastructure that's why enable it by default.
For capsule generation for zynq you can use:
pushd spl
../tools/mkeficapsule -g "1ba29a15-9969-40aa-b424-e86121618664" boot.bin \
--index 1 ../capsule1.bin
popd
./tools/mkeficapsule -g "1a5178f0-87d3-4f36-ac63-3b31a23be305" u-boot.img \
--index 2 capsule2.bin
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a8194ecfa7932f2d8ada5ee508b2a026c782f15e.1660055571.git.michal.simek@amd.com
With commit 55b3ba4c2ba4 ("spi: cadence_qspi: Migrate CONFIG_CQSPI_REF_CLK
to Kconfig") CONFIG_CQSPI_REF_CLK is moved to Kconfig.
The static value via Kconfig is a fallback option in case of clock
framework is not enabled or fails for some reason.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fe7c38a19e878c307d5b75311bbfd8cf6c1f601e.1659691195.git.michal.simek@amd.com
Commit 5bb2c550b11e ("arm: mvebu: Move internal registers in
arch_very_early_init() function") moved code from file cpu.c to lowlevel.c,
which moves Marvell internal registers from address INTREG_BASE_ADDR_REG to
SOC_REGS_PHY_BASE.
But the steps describing how to do it correctly were documented only in
older U-Boot versions and commit cefd764222ee ("arm: mvebu: Fix internal
register config on A38x") probably unintentionally removed important
details about MMU from code comments around.
Commit 5bb2c550b11e ("arm: mvebu: Move internal registers in
arch_very_early_init() function") implemented code movement according to
(now incomplete) comments which resulted in semi-broken code.
The result is that I-cache is currently disabled for all Armada 38x boards
and maybe there are some other (unreported / undetected) issues.
Reimplement it correctly. First flush all caches, then disable MMU and L2
cache and then move Marvell internal registers. There is no need to
explicitly disable I-cache.
After this change lzmadec command with lzma image of 0x7000000 bytes is
doing decompression just 5 seconds. Before this change it was 30 seconds.
To make lowlevel.S code more readable, extend asm/pl310.h header file to be
compatible with assembler and use macros from this file.
Fixes: 5bb2c550b11e ("arm: mvebu: Move internal registers in arch_very_early_init() function")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
For some unknown reason when L2 cache is disabled on Armada 385 then loadb,
loadx and loady commands do not work with higher baudrates than 115200
(they just abort transfer) and lzmadec command with lzma image of size
0x7000000 (maybe even smaller, we tested this one) is doing decompression
for more than 2 minutes. After enabling L2 cache decompression takes only
30s and loadb, loadx and loady are stable and working fine.
git bisect identified problematic commit 3308933d2fe9 ("arm: mvebu: Avoid
reading MVEBU_REG_PCIE_DEVID register too many times"). Before this commit
above issues were not present.
But investigation showed that above issue was possible to reproduce also by
reverting that commit and forcing compiler to do inline optimization of
mvebu_soc_family() function. Which seems that the root of this issue is in
caches and position of instruction of segments. So currently it is unknown
what is or was broken, but code movement, code inlining or other compiler
optimization triggered it.
Commit 3e5ce7ceeb94 ("arm: mvebu: Enable L2 cache on Armada XP") mentioned
that enabling L2 cache on Armada XP improved performance and that Armada
38x has L2 disabled (which is default state) and if needed it has to be
enabled in separate patch. As enabling L2 cache also improve performance
on Armada 38x, enable it.
Note that Aurora cache in no outer mode is available only on Armada XP,
hence it is not touched for Armada 38x code.
Fixes: 3308933d2fe9 ("arm: mvebu: Avoid reading MVEBU_REG_PCIE_DEVID register too many times")
Reported-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Replace magic constant 1 when disabling MMU by macro CR_M from include
header file asm/system.h.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit c86d53fd88df ("arm: mvebu: Don't disable cache at startup on Armada
XP at all") introduced branch for non-AXP code which was guarded by A38X
condition. Fix this issue by checking for AXP platform, not by A38X.
Fixes: c86d53fd88df ("arm: mvebu: Don't disable cache at startup on Armada XP at all")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit 3308933d2fe9 ("arm: mvebu: Avoid reading MVEBU_REG_PCIE_DEVID
register too many times") broke support for caches on all Armada SoCs.
Before that commit there was code:
if (mvebu_soc_family() != MVEBU_SOC_A375) {
dcache_enable();
}
And after that commit there is code:
if (IS_ENABLED(CONFIG_ARMADA_375)) {
dcache_enable();
}
Comment above this code says that d-cache should be disabled on Armada 375.
But new code inverted logic and broke Armada 375 and slowed down all other
Armada SoCs (including A38x).
Fix this issue by changing logic to:
if (!IS_ENABLED(CONFIG_ARMADA_375)) {
dcache_enable();
}
Which matches behavior prior that commit.
Fixes: 3308933d2fe9 ("arm: mvebu: Avoid reading MVEBU_REG_PCIE_DEVID register too many times")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Turris Omnia has two serial ports. Both are already specified in device
tree file. But U-Boot by default does not allow to use more than one serial
port unless CONFIG_SERIAL_PROBE_ALL is not enabled.
After enabling CONFIG_SERIAL_PROBE_ALL, U-Boot see also second serial port
(but is inactive by default):
=> coninfo
List of available devices:
serial@12000 00000007 IO stdin stdout stderr
serial@12100 00000007 IO
To allow simultaneously to use more input / output devices it is needed to
enable CONFIG_CONSOLE_MUX option.
With CONFIG_CONSOLE_MUX it is possible to call:
=> setenv stdout 'serial@12000,serial@12100'
And U-Boot output is then visible on both serial ports.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
TCGETS2 is defined in header file asm/ioctls.h provided by linux kernel.
On glib systems it is automatically included by some other glibc include
header file and therefore TCGETS2 is present in termios_linux.h when
linux kernel provides it.
On non-glibc systems (e.g. musl) asm/ioctls.h is not automatically included
which results in the strange error that BOTHER is supported, TCGETS2 not
defined and struct termios does not provide c_ispeed member.
tools/kwboot.c: In function 'kwboot_tty_change_baudrate':
tools/kwboot.c:662:6: error: 'struct termios' has no member named 'c_ospeed'
662 | tio.c_ospeed = tio.c_ispeed = baudrate;
| ^
Fix this issue by explicitly including asm/ioctls.h file which provides
TCGETS2 macro (if supported on selected architecture) to not depending on
glibc auto-include behavior and because termios_linux.h requires it.
With this change it is possible compile kwboot with musl libc.
Reported-by: Michal Vasilek <michal.vasilek@nic.cz>
Signed-off-by: Pali Rohár <pali@kernel.org>
$fdt_addr is mandatory for systems which provides DTB in HW (e.g. ROM) and
wishes to pass that DTB to Linux.
Turris Mox contains DTB binary in SPI NOR memory at "dtb" partition which
starts at offset 0x7f0000 and is 0x10000 bytes long.
Armada 3700 CPU does not allow mapping SPI NOR memory into physical address
space like on other architectures and therefore set $fdt_addr variable to
memory range in RAM and loads this DTB binary from SPI NOR in misc_init_r()
function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
When rescue mode was activated reset also bootdelay env variable to its
default value. This will ensure that reset button works and starts rescue
mode also in the case when user changed bootdelay env variable to -1 (which
has meaning to not start autoboot).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Store serial number from atsha cryptochip into the serial# env variable.
U-Boot automatically puts content of this variable into the root device
tree property serial-number when booting Linux kernel. Refactor turris
atsha code and from turris_atsha_otp_get_serial_number() function returns
directly string suitable for printing or storing into device tree. Because
during different boot stages is env storage read-only, it is not possible
to always store serial number into env storage. So introduce a new function
turris_atsha_otp_init_serial_number() which is called at later stage and
which ensures that serial number is correctly stored into env.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
For obvious reasons BootROMS rejects unsigned images when secure boot is
enabled in OTP secure bits. So check for OPT secure bits and do not allow
flashing unsigned images when secure boot is enabled. Access to OTP via
U-Boot fuse API is currently implemented only for A38x and A37xx SoCs.
Additionally Armada 3700 BootROM rejects signed trusted image when secure
boot is not enabled in OTP. So add also check for this case. On the other
hand Armada 38x BootROM acceps images with secure boot header when secure
boot is not enabled in OTP.
OTP secure bits may have burned also boot device source. Check it also and
reject flashing images to target storage which does not match OTP.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently for A38x image is checked only header checksum.
So check also for image data checksum to prevent flashing broken image.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Testing on the theadorable Armada XP platform has shown, thaz using the
current value of 1000ms as response timeout does not result in reliable
booting via kwboot. Using 10ms seems to be much better. So let's change
this value to this 10ms instead.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Pali Rohár <pali@kernel.org>
Add CONFIG_SUPPORT_PASSING_ATAGS and friends to support legacy
image method of booting. Debian and OpenWrt installer use uImage
with appended DTB for these Kirkwood boards.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Running tests in parallel is much faster, e.g. 15 seconds to run the tests
on sandbox (only), instead of 100 seconds (on a 16-core machine). Add a
'make pcheck' option to access this feature.
Note that the tools/ tests still run each tool's tests once after the
other, although within that, they do run in parallel. So for example,
the buildman tests run in parallel, then the binman tests run in
parallel. There would be a signiificant advantage to running them all
in parallel together, but that would require a large amount of
refactoring, e.g. with more use of pytest fixtures.
Update the documentation to represent the current state.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present when -n is used, all workers try to build U-Boot at once.
Add a lock to ensure that only one of them builds, with the others using
the build that is produced.
The lock file is removed on startup.
Signed-off-by: Simon Glass <sjg@chromium.org>
This assumes that the GPIO starts as 0 but it does not if
test_gpio_input() ran first and test_gpio_exit_statuses() was skipped.
This can happen when running tests in parallel.
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
When doing a quick check we don't need to run all the vboot tests. Just
run the first one, which is enough to catch most problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
This test seems to interfere with the other test in this file. Mark it
single-threaded to avoid any problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
This test relies on the silent_linux env variable being set. Add this
to the code so it can run without relying on other bootm tests having been
run first.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present test_pinmux_status() assumes that test_pinmux_dev() has run
beforehand. Drop this assumption so we can run the tests in parallel.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add board_rng_seed() as a temporary solution
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Merge tag 'dm-pull-12sep22' of https://source.denx.de/u-boot/custodians/u-boot-dm
Binman VPL support (patch was lost)
Add board_rng_seed() as a temporary solution
A recurring theme on LKML is the boot process deadlocking due to some
process blocking waiting for random numbers, while the kernel's
Cryptographic Random Number Generator (crng) is not initalized yet,
but that very blocking means no activity happens that would generate
the entropy necessary to finalize seeding the crng.
This is not a problem on boards that have a good hwrng (when the
kernel is configured to trust it), whether in the CPU or in a TPM or
elsewhere. However, that's far from all boards out there. Moreover,
there are consumers in the kernel that try to obtain random numbers
very early, before the kernel has had any chance to initialize any
hwrng or other peripherals.
Allow a board to provide a board_rng_seed() function, which is
responsible for providing a value to be put into the rng-seed property
under the /chosen node.
The board code is responsible for how to actually obtain those
bytes.
- One possibility is for the board to load a seed "file" from
somewhere (it need not be a file in a filesystem of course), and
then ensure that that the same seed file does not get used on
subsequent boots.
* One way to do that is to delete the file, or otherwise mark it as
invalid, then rely on userspace to create a new one, and living
with the possibility of not finding a seed file during some boots.
* Another is to use the scheme used by systemd-boot and create a new
seed file immediately, but in a way that the seed passed to the
kernel and the new (i.e. next) seed cannot be deduced from each
other, see the explanation at
https://lore.kernel.org/lkml/20190929090512.GB13049@gardel-login/
and the current code at
https://github.com/systemd/systemd/blob/main/src/boot/efi/random-seed.c
- The board may have an hwrng from which some bytes can be read; while
the kernel can also do that, doing it in U-Boot and providing a seed
ensures that even very early users in the kernel get good random
numbers.
- If the board has a sensor of some sort (temperature, humidity, GPS,
RTC, whatever), mixing in a reading of that doesn't hurt.
- etc. etc.
These can of course be combined.
The rng-seed property is mixed into the pool used by the linux
kernel's CRNG very early during boot. Whether it then actually
contributes towards the kernel considering the CRNG initialized
depends on whether the kernel has been configured with
CONFIG_RANDOM_TRUST_BOOTLOADER (nowadays overridable via the
random.trust_bootloader command line option). But that's for the BSP
developer to ultimately decide.
So, if the board needs to have all that logic, why not also just have
it do the actual population of /chosen/rng-seed in ft_board_setup(),
which is not that many extra lines of code?
I considered that, but decided handling this logically belongs in
fdt_chosen(). Also, apart from saving the board code from the few
lines of boilerplate, doing it in ft_board_setup() is too late for at
least some use cases. For example, I want to allow the board logic to
decide
ok, let's pass back this buffer and use that as seed, but also let's
set random.trust_bootloader=n so no entropy is credited.
This requires the rng-seed handling to happen before bootargs
handling. For example, during the very first boot, the board might not
have a proper seed file, but the board could still return (a hash of)
some CPU serial# or whatnot, so that at least no two boards ever get
the same seed - the kernel always mixes in the value passed in
rng-seed, but if it is not "trusted", the kernel would still go
through the same motions as it would if no rng-seed was passed before
considering its CRNG initialized. I.e., by returning that
unique-to-this-board value and setting random.trust_bootloader=n, the
board would be no worse off than if board_rng_seed() returned nothing
at all.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
The user provided key address was not flushed in struct aes because of
the flushing location in the function.
Signed-off-by: Janne Ylalehto <ylalehto@gmail.com>
Link: https://lore.kernel.org/r/20220816124525.19671-1-ylalehto@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The drivers informs the user that a post config was not run after FPGA
configuration. This message is unnecessary in SPL because the
ps7_post_config function is called via spl_board_prepare_for_boot
function before jump_to_image_no_args function from board_init_r
function.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220808145331.24723-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Move arm twd timer driver from zynq to generic location.
DM timer drivers are designed differently to original driver. Timer is
counting up and not down.
Information about clock rates are find out in timer_pre_probe() that's
why there is no need to get any additional information from DT in the
driver itself (only register offset).
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220805061629.1207-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Documentation:
* man-page for tftpput
UEFI:
* fix driver binding protocol for block IO devices
* don't delete invalid handles
* add a unit test for the EFI Conformance Profile Table
Other:
* correct short text for tftpboot
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Merge tag 'efi-2022-10-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-10-rc5
Documentation:
* man-page for tftpput
UEFI:
* fix driver binding protocol for block IO devices
* don't delete invalid handles
* add a unit test for the EFI Conformance Profile Table
Other:
* correct short text for tftpboot
UEFI block devices can either mirror U-Boot's internal devices or be
provided by an EFI application like iPXE.
When ConnectController() is invoked for the EFI_BLOCK_IO_PROTOCOL
interface for such an application provided device we create a virtual
U-Boot block device of type "efi_blk".
Currently we do not call ConnectController() when handles for U-Boot's
internal block devices are created. If an EFI application calls
ConnectController() for a handle relating to an internal block device,
we erroneously create an extra "efi_blk" block device.
E.g. the UEFI shell has a command 'connect -r' which calls
ConnectController() for all handles with device path protocol.
In the Supported() method of our EFI_DRIVER_BINDING_PROTOCOL return
EFI_UNSUPPORTED when dealing with an U-Boot internal device.
Reported-by: Etienne Carriere <etienne.carriere@linaro.org>
Fixes: commit 05ef48a2484b ("efi_driver: EFI block driver")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Change efi_delete_handle() to not free EFI handles twice.
This change tries to resolved an issue seen since U-Boot v2022.07
in which ExitBootService() attempts to release some EFI handles twice.
The issue was seen booting a EFI shell that invokes 'connect -r' and
then boots a Linux kernel. Execution of connect command makes EFI
subsystem to bind a block device for each root block devices EFI handles.
However these EFI device handles are already bound to a driver and we
can have 2 registered devices relating to the same EFI handler. On
ExitBootService(), the loop removing the devices makes these EFI handles
to be released twice which corrupts memory.
This patch prevents the memory release operation caused by the issue but
but does not resolve the underlying problem.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Add log message.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add a new unit test to test the integrity of the
EFI Conformance Profile Table.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
We can use efi_st_get_config_table() in multiple unit tests.
Export the function.
Export system-table and boot-services.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Provide a man-page for the tftpput command.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The command's name is a misnomer.
The command loads a file but does not run (boot) it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Calling tftpput with less than 2 arguments must lead to a failure.
If tftpput is called with two arguments, these are the address and
the size of the file to be transferred.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- remove test on CONFIG_DM_REGULATOR in stm32mp1 board
and enable CONFIG_DM_REGULATOR for stm32f769-disco
- handle ck_usbo_48m clock provided by USBPHYC to fix the command 'usb start'
after alignment with Linux kernel v5.19 DT (clocks = <&usbphyc>)
- Fix SYS_HZ_CLOCK value for stih410-b2260 board
- Switch STMM32MP15x DHSOM to FMC2 EBI driver
- Remove hwlocks from pinctrl in STM32MP15x to avoid issue with kernel
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Merge tag 'u-boot-stm32-20220907' of https://source.denx.de/u-boot/custodians/u-boot-stm
- simplify the STM32MP15x package parsing code
- remove test on CONFIG_DM_REGULATOR in stm32mp1 board
and enable CONFIG_DM_REGULATOR for stm32f769-disco
- handle ck_usbo_48m clock provided by USBPHYC to fix the command 'usb start'
after alignment with Linux kernel v5.19 DT (clocks = <&usbphyc>)
- Fix SYS_HZ_CLOCK value for stih410-b2260 board
- Switch STMM32MP15x DHSOM to FMC2 EBI driver
- Remove hwlocks from pinctrl in STM32MP15x to avoid issue with kernel
Fman microcode is executable code (AFAICT) loaded into a
coprocessor. As such, if verified boot is enabled, it must be verified
like other executable code. However, this is not currently done.
This commit adds verified boot functionality by encapsulating the
microcode in a FIT, which can then be signed/verified as normal. By
default we allow fallback to unencapsulated firmware, but if
CONFIG_FIT_SIGNATURE is enabled, then we make it mandatory. Because
existing Layerscape do not use this config (instead enabling
CONFIG_CHAIN_OF_TRUST), this should not break any existing boards.
An example (mildly-abbreviated) its is provided below:
/ {
#address-cells = <1>;
images {
firmware {
data = /incbin/(/path/to/firmware);
type = "firmware";
arch = "arm64";
compression = "none";
signature {
algo = "sha256,rsa2048";
key-name-hint = "your key name";
};
};
};
configurations {
default = "conf";
conf {
description = "Load FMAN microcode";
fman = "firmware";
};
};
};
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Several ethernet drivers load firmware from FIT images. Convert them to
use the fit_get_data helpers.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This converts the FIT loading process of the fpga command to use
fit_get_data_node.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This reduces sec_firmware_get_data to a single call to
fit_get_data_conf_prop. I think sec_firmware_check_copy_loadable could also
be converted, but it does not map as straightforwardly, so I have left it
for a future cleanup.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Several different firmware users have repetitive code to extract the
firmware data from a FIT. Add some helper functions to reduce the amount
of repetition. fit_conf_get_prop_node (eventually) calls
fdt_check_node_offset_, so we can avoid an explicit if. In general, this
version avoids printing on error because the callers are typically
library functions, and because the FIT code generally has (debug)
prints of its own. One difference in these helpers is that they use
fit_image_get_data_and_size instead of fit_image_get_data, as the former
handles external data correctly.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The config to use for FIT images can be better specified by enabling
CONFIG_MULTI_DTB_FIT and implementing board_fit_config_name_match.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Correctly calculate offsets between SPL and proper U-Boot when new config
option CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR for generating eSDHC boot sector
is enabled. Otherwise SPL would not be able to boot proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
CPLD in load_default mode ignores watchdog reset signal. It does not reset
board when watchdog triggers reset signal.
Detect load_default mode by GPIO7 - LOAD_DEFAULT_N and delete watchdog
max6370 node from device to prevent registering driver for non-working
watchdog.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
All *boot env commands overrides default boot source location via i2c.
After board reset without power off, BootROM then starts booting U-Boot
from this specified location instead of the default one.
Add new env command defboot which reverts boot location to the default
value, which in most cases is configurable by HW DIP switches.
And add new env commands norlowerboot, norupperboot, sd2boot to boot from
other locations. norlowerboot would instruct BootROM to boot from lower NOR
bank, norupperboot from upper NOR bank and sd2boot from SD card with
alternative configuration.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Removes hwlocks properties from stm32mp151 pinctrl node. These locks
could be used for other purpose, depending on board and software
configuration hence do not enforce their use to protect pinctrl
devices.
This patch is an alignment with Linux device tree with v6.0 as the
hwsem support wasn’t yet added in pincontrol in kernel. It avoids
issues when the Linux kernel is started with the U-Boot device tree.
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Perform long overdue conversion of ad-hoc FMC2 EBI bus initialization
to upstream FMC2 EBI driver. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
SYS_HZ_CLOCK was wrongly set to 1GHz whereas it's set to 750MHz
by default by bootrom.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Since commit 5bc6f8c2a97e("video: stm32: remove test on CONFIG_DM_REGULATOR")
backlight was broken with the following message at boot:
stm32-display-dsi dsi@40016c00: Warning: cannot get phy dsi supply
stm32_display display-controller@40016800: panel panel enable backlight error -38
DM_REGULATOR flag must be enabled to fix this issue
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Since commit ef4ce6df3289 "video: stm32: stm32_ltdc: fix data enable polarity"
The panel display output wasn't functional anymore.
Device tree display-timings de-active property value must be updated
to 1.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Handle the input clock of RCC USB_PHY_48, provided by USBPHYC
and named "ck_usbo_48m".
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
ck_usbo_48m is generated by usbphyc PLL and used by OTG controller
for Full-Speed use cases with dedicated Full-Speed transceiver.
ck_usbo_48m is available as soon as the PLL is enabled.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add the counter of the PLL user n_pll_cons managed by the 2 functions
stm32_usbphyc_pll_enable / stm32_usbphyc_pll_disable.
This counter allow to remove the function stm32_usbphyc_is_init
and it is a preliminary step for ck_usbo_48m introduction.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The tests on CONFIG_DM_REGULATOR, added to avoid compilation issues, can
now be removed, they are no more needed since the commit 16cc5ad0b439
("power: regulator: add dummy helper").
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Simplify the package parsing code for STM32MP15X as package can be
affected with get_cpu_package() result.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
P1/P2 RDB boards have external max6370 watchdog connected to CPLD and this
watchdog is not deactivated on board reset. So if it is active during board
reset, it can trigger another reset when CPU is booting U-Boot. To prevent
possible infinite reset loop caused by external watchdog, turn it off
before reset.
Do it via a new board_reset_prepare() callback which is called from
do_reset() function before any reset sequence.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
CPLD's system reset register is buggy and requires workaround in U-Boot.
So use this kind of board reset only when there is no other reset option.
Introduce a new board_reset_last() callback which is last-stage
board-specific reset and implement CPLD's system reset in this new
board_reset_last() callback instead of board_reset() callback.
Fixes: 20fb58fc5a1c ("board: freescale: p1_p2_rdb_pc: Implement board_reset()")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
If watchdog timer was already set to non-disabled value then it means that
watchdog timer was already activated, has already expired and caused CPU
reset. If this happened then due to CPLD firmware bug, writing to wd_cfg
register has no effect and therefore it is not possible to reactivate
watchdog timer again. Watchdog starts working again after CPU reset via
non-watchdog method.
Implement this workaround (reset CPU when it was reset by watchdog) to make
watchdog usable again. Watchdog timer logic on these P1/P2 RDB boards is
connected to CPLD, not to SoC itself.
Note that reset does not occur immediately after calling do_reset(), but
after few ms later as real reset is done by CPLD. So it is normal that
function do_reset() returns. Therefore hangs after calling do_reset() to
prevent CPU execution of the rest U-Boot code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
CPLD's system reset register on P1/P2 RDB boards is not autocleared after
flipping it. If this register is set to one in 100ms after reset starts
then CPLD triggers another CPU reset.
This means that trying to reset board via CPLD system reset register cause
reboot loop. To prevent this reboot loop, the only workaround is to try to
clear CPLD's system reset register as early as possible. U-Boot is already
doing it in its board_early_init_f() function, which seems to be enough as
register is cleared prior CPLD triggers another reset.
But board_early_init_f() is not called from SPL and therefore usage of SPL
can cause reboot loop.
To prevent reboot loop when using SPL, call board_early_init_f() function
in SPL too. For accessing CPLD memory space it is needed to have CPLD entry
in TLB.
With this change it is possible to trigger board reset via CPLD's system
reset register on P2020 RDB board.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
System reset via the SRST extension in the SBI should be the default.
The driver checks if the extension is available when probing.
So there is no risk in enabling it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Format the KVM implementation number in a human readable form.
With the patch output of the sbi command for Linux 5.19.1 looks like:
=> sbi
SBI 0.3
KVM 5.19.1
Machine:
Vendor ID 0
Architecture ID 7005c
Implementation ID 7005c
Extensions:
SBI Base Functionality
Timer Extension
IPI Extension
RFENCE Extension
Hart State Management Extension
System Reset Extension
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This commit sychronizes the header file for FU740 PRCI clocks with the
one from Linux 5.19.
The constant values are the same, but all constant names are changed
(most are just prefixed with FU740_).
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
If ethernet connected to SFP, like this:
&enetc_port0 {
phy-connection-type = "sgmii";
sfp = <&sfp0>;
managed = "in-band-status";
status = "okay";
};
Then enetc_config_phy returns -ENODEV and the memory containing the mdio interface is freed.
It's better to unregister and free mdio resources.
Signed-off-by: Siarhei Yasinski <siarhei.yasinski@sintecs.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
In both the Freescale DDR controller and the SPD spec, bank address bits
are stored as the number of bank address bits minus 2. For example, if a
chip had 8 banks (3 total bank address bits), the value of
bank_addr_bits would be 1. This is rather surprising for users
configuring their memory manually, since they can't set bank_addr_bits
to the actual number of bank address bits. Rectify this.
There is at least one example of this kind of mistake already, in
board/freescale/t102xrdb/ddr.c. The documented MT40A512M8HX has two bank
address bits, but bank_addr_bits was set to 2, implying 4 bank address
bits. Such a value is reserved in BA_BITS_CS, but I suspect the
controller simply ignores the top bit, making this kind of mistake
harmless, if misleading.
Fixes: e8a7f1c32b5 ("powerpc/t1023rdb: Add T1023 RDB board support")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The interactive mode uses large several tables of options which can be
configured. However, much of the contents of these tables are
repetetive. For example, no struct is larger than half a kilobyte, so
the offset only takes up 9 bits. Similarly, the size is only ever 4 or
8, and printhex is a boolean. Reduce the size of these fields. This
reduces the size of the options tables by around 10 KiB. However, the
largest contributor to the size of the options tables is the use of a
pointer for the strings. A better approach would be to use a separate
array of strings, and store an integer index in the options tables.
However, this would require a large re-architecting of this file.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The frequency of the system counter is static which is given by the
COUNTER_FREQUENCY option. Remove COUNTER_FREQUENCY_REAL.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Depending on the boot source, set different CLI prompts. This will help
the user to figure out in which mode the bootloader was started. There
are two special modes: failsafe and SDHC boot.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
During startup the SPL will print where the u-boot proper is read from.
Instead of using the default names, provide more user friendly names.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The board is able to boot from the following source:
- user-updateble SPI flash
- write-protected part of the same SPI flash
- eMMC
- SD card
Implement the needed function hooks to support all of these boot
sources.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
By default the OCRAM is marked as secure. While the SPL runs in EL3 and
thus can access it, DMA devices cannot. Mark the whole OCRAM as
non-secure.
This will fix MMC and SD card boot on LS1028A when using SPL instead of
TF-A.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This adds the onkey, RTC and watchdog children to the DA9063 PMIC node,
fixes the compatible for qspi0's flash node to match the official DT
schema (it being an is25wp256 is discoverable, hence jedec,spi-nor is
the only compatible that should be present) and exposes the card detect
GPIO.
Note that the device trees still diverge in some places (including
important things like the PCIe controller's clock name) and should be
cleaned up so that a common device tree is used in both projects rather
than having different bindings. This patch does not attempt to do that,
merely expose important functionality present in Linux's that is not in
U-Boot's so that it can be used without the OS providing its own bundled
copy.
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Adding some debug prints I can see:
MMC: mmc@fe320000: Got clock clock-controller@ff760000 76
mmc@fe310000: Got clock clock-controller@ff760000 77
Unknown clock 77
rockchip_dwmmc_get_mmc_clk: err=-2
mmc@fe310000: 3, mmc@fe320000: 1, mmc@fe330000: 0
According to kernel code the SDIO clock is identical to SDMMC clock
except for the con 16->15 change.
Add support for the clock to avoid the error.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This new image is similar to u-boot-rockchip.bin except that it's
destined to be flashed on SPI-NOR flashes.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This prepares for the creation of a u-boot-rockchip-spi.bin image
similar to u-boot-rockchip.bin to the exception it's destined for
SPI-NOR flashes instead of MMC storage medium.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
By factoring SPL check in the first condition, this makes the checks a
bit less convoluted and more readable.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This allows to build u-boot-rockchip.bin binary with binman for Rockchip
ARM64 boards instead of the legacy Makefile way.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
idbloader.img content - currently created by way of Makefile - can be
created by binman directly.
So let's do that for Rockchip ARM platforms.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Binman mkimage entry generates temporary files so let's remove them
when calling `make clean`.
Fixes: 9b312e26fc77 ("rockchip: Enable building a SPI ROM image on jerry")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reported-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
mkimage entry currently creates a file whose name is derived from the
section name containing said entry.
Let's allow the user to define a filename for the mkimage-generated
binary by using the 'filename' DT property.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some image types handled by mkimage require the datafiles to be passed
independently (-d data1:data2) for specific handling of each. A
concatenation of datafiles prior to passing them to mkimage wouldn't
work.
That is the case for rkspi for example which requires page alignment
and only writing 2KB every 4KB.
This adds the ability to tell binman to pass the datafiles without
prior concatenation to mkimage, by adding the multiple-data-files
boolean property to the mkimage node.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
While technically not a bug, let's have some consistency in paths
returned by u-boot,spl-boot-order look-up and the one saved in
u-boot,spl-boot-device by syncing spl_boot_devices_tbl and boot_devices
node paths.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On RK3399, mmc0 is eMMC and mmc1 is SD card, c.f. console:
MMC: mmc@fe320000: 1, mmc@fe330000: 0
In arch/arm/mach-rockchip/spl-boot-order.c:board_boot_order, the
boot_device (BOOT_DEVICE_*) value is gotten from spl_node_to_boot_device
function. Said function returns BOOT_DEVICE_MMC1 for mmc0 (eMMC) and
BOOT_DEVICE_MMC2 for mmc1 (SD card).
Since the SD card controller is at mmc@fe320000, it should be associated
with BOOT_DEVICE_MMC2 and not BOOT_DEVICE_MMC1. Same applies to eMMC.
Let's fix that by swapping the two BOOT_DEVICEs.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Rockchip SoCs need the boot_devices array defined in order to map the
bootloader's value to a U-Boot device. Implement this for rk3308.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Commit 6aa4fe3912 ("dm: core: Rename and fix uclass_get_by_name_len()")
changed uclass_get_device_by_name() to an exact match when previously it
behaved as a prefix match.
The roc-cc code relied on this prefix match by only specifying part of
the device name. Fix this by using the full name including the address.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When idbloader.img is flashed on the eMMC, the SPL still tries to load
from SPI-NOR first.
This is due to an incorrect look-up in the Device Tree. Since commit
822556a93459 ("arm: dts: sync the Rockhip 3399 SoCs from Linux"), the
node name (but not label) changed from sdhci@fe330000 to mmc@fe330000
meaning U-Boot SPL is not looking for the correct node name anymore and
fails to find the "same-as-spl" node when eMMC is the medium from which
the SPL booted.
Fixes: 822556a93459 ("arm: dts: sync the Rockhip 3399 SoCs from Linux")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Lapkin Artem <email2tema@gmail.com>
Tested-by: Lapkin Artem <email2tema@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Currently the default initialisation frequency is 50MHz. Although
this does appear to be suitable for some LPDDR4 RAM chips, training at
this low frequency has been seen to cause Column errors, leading to
Capacity check errors on others.
Here we force RAM initialisation to happen at 400MHz before ramping up
to the final value running value of 800MHz after everything has been
successfully configured.
Link: https://lore.kernel.org/u-boot/Yo4v3jUeHXTovjOH@google.com/
Suggested-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Michal Suchánek <msuchanek@suse.de>
Frequency changes to 400MHz are presently reported as:
lpddr4_set_rate_0: change freq to 400000000 mhz 0, 1
This is obviously wrong by 6 orders of magnitude.
Ensure frequency changes are reported accurately.
Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Functions pointed to by this op pointer can return non-zero values
indicating an error. Ensure any error value is propagated back up the
call-chain.
Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Only add the dram channel when we finally setup it successfully at the
last step.
Signed-off-by: Han Pengfei <pengphei@foxmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The boot_devices constants for rk3288 were changed to match the
binding, but the dtsi file was not synced.
Fix by renaming the rk3288 mmc node names.
Also correct the clock name for "ciu-drive".
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add an option to tell the TPM to commit non-volatile data immediately it
is changed, rather than waiting until later. This is needed in some
situations, since if the device reboots it may not write the data.
Add definitions for the rest of the Cr50 commands while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add a vendor-specific TPM2 command for this and implement it for Cr50.
Note: This is not part of the TPM spec, but is a Cr50 extension.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
It is useful to read information about the current TPM state, where
supported, e.g. for debugging purposes when verified boot fails.
Add support for this to the TPM interface as well as Cr50. Add a simple
sandbox test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
At present the emulator assumes that the TPM is inited in the same phase
where it is used. But in fact SPL may init the TPM, so we don't want to
complain when U-Boot proper later uses it. Remove this check.
It might be best to save this information into the device state for the
TPM, so that we can make sure the TPM was inited at some point. For now,
this seems good enough.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The message format is incorrect. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The offset here is incorrect. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This feature is used for measured boot, so we can add a log entry to the
TCPA with some information about where the digest comes from. It is not
currently supported in the TPM drivers, but add it to the API so that
code which expects it can signal its request.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
UEFI specification 2.9A requires to display the EUI-64 "in hexadecimal
format with byte 7 first (i.e., on the left) and byte 0 last".
This is in contrast to what the NVMe specification wants.
But it is what EDK II has been implementing.
Here is an example with the patch applied:
qemu-system-aarch64 -machine virt -cpu cortex-a72 -nographic \
-bios denx/u-boot.bin \
-device nvme,id=nvme1,serial=9ff81223 \
-device nvme-ns,bus=nvme1,drive=nvme1n0,eui64=0x123456789ABCDEF0 \
-drive file=arm64.img,if=none,format=raw,id=nvme1n0
=> nvme scan
=> efidebug devices
Device Path
====================
/VenHw(…)/NVMe(0x1,f0-de-bc-9a-78-56-34-12)
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Display the EBBRv2.0 conformance in the ECPT table.
The EBBRv2.0 conformance profile is set in the ECPT if
CONFIG_EFI_EBBR_2_0_CONFORMANCE=y.
Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Add dependencies for CONFIG_EFI_EBBR_2_0_CONFORMANCE.
Enable the setting by default.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The ECPT table will be included in the UEFI specification 2.9+.
The ECPT table was introduced in UEFI following the code-first path. The
acceptance ticket can be viewed at:
https://bugzilla.tianocore.org/show_bug.cgi?id=3591
The Conformance Profiles table is a UEFI configuration table that contains
GUID of the UEFI profiles that the UEFI implementation conforms with.
The ECPT table is created when CONFIG_EFI_ECPT=y.
The config is set by default.
Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The selftest checking the handling of exceptions in UEFI binaries is using
assembly to provide an undefined instruction. On the sandbox the correct
form of the instruction depends on the host architecture.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
In the extended text input protocol support input of control letters
0x1c - 0x1f.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
We cannot expect the buffers passed to the input protocols to be zero
filled. If only modifier keys are pressed, we have to return EFI_NOT_READY
but we still have to fill the key structure.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
We need to support multiple digits in the parts of the UEFI verision
number. E.g.
EFI_SPECIFICATION_VERSION = (123 << 16) | 456
must be printed as
123.45.6
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- DM RTC improvements that should help in CI, allow disabling LTO from
the make line, add extension (cape, etc) support to distro bootcmd,
add a pause command and re-enable ARM v4T support.
At present the sandbox timer uses localtime() which can jump around twice
a year when daylight-saving time changes.
It would be tricky to make use of gmtime() since we still need to present
the time in local time, as seems to be required by U-Boot's RTC interface.
The problem can only happen once, so use a loop to detect it and try
again. This should be sufficient to detect either a change in the 'second'
value, or a daylight-saving change. We can assume that the latter also
incorporates a 'second' change, so there is no need to loop more than
twice.
Signed-off-by: Simon Glass <sjg@chromium.org>
It seems that the time can change in between getting it and reading the
offset. Check for this and try again if this happens.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since resetting the RTC on sandbox causes it to read the base time from
the system, we cannot rely on this being unchanged since it was last read.
Allow for a one-second delay.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: https://source.denx.de/u-boot/u-boot/-/issues/4
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Reported-by: Tom Rini <trini@konsulko.com>
Suggested-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Simon Glass <sjg@chromium.org>
Some tests can have race conditions which are hard to detect on a single
one. Add a way to run tests more than once, to help with this.
Each individual test is run the requested number of times before moving
to the next test. If any runs failed, a message is shown.
This is most useful when running a single test, since running all tests
multiple times can take a while.
Signed-off-by: Simon Glass <sjg@chromium.org>
LTO (Link-Time Optimisation) is an very useful feature which can
significantly reduce the size of U-Boot binaries. So far it has been
made available for selected ARM boards and sandbox.
However, incremental builds are much slower when LTO is used. For example,
an incremental build of sandbox takes 2.1 seconds on my machine, but 6.7
seconds with LTO enabled.
Add a NO_LTO parameter to the build, similar to NO_SDL, so it can be
disabled during development if needed, for faster builds.
Add some documentation about LTO while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
There is currently a problem that U-Boot can not work on ARMv4
because assembly imlementations of memcpy() and some other functions
use "bx lr" instruction that is not available on ARMv4 ("mov pc, lr"
should be used instead).
A working preprocessor-based solution to this problem is found in
arch/arm/lib/relocate.S. Move it to the "ret" macro in
arch/arm/include/asm/assembler.h and change all "bx lr" code
to "ret lr" in functions that may run on ARMv4. Linux source code
deals with this problem in the same manner.
v1 -> v2:
Comment update. Pointed out by Andre Przywara.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
CC: Samuel Holland <samuel@sholland.org>
CC: Ye Li <ye.li@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Andre Przywara <andre.przywara@arm.com>
CC: Marek Vasut <marex@denx.de>
CC: Sean Anderson <sean.anderson@seco.com>
CC: Tom Rini <trini@konsulko.com>
This command is being introduced with the goal of allowing user-friendly
"generic use case" U-Boot builds to pause until user input under some
situations.
The main use case would be when a boot failure happens, to pause until
the user has had time to acknowledge the current state.
Tested using:
make && ./u-boot -v -T -c 'ut lib lib_test_hush_pause'
Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
Cc: Simon Glass <sjg@chromium.org>
Try to load required DTB overlays if the board supports extensions and
CONFIG_CMD_EXTENSION is enabled.
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
The host will report such error message if the fastboot device work in
full-speed mode: "Duplicate descriptor for config 1 interface 0
altsetting 0, skipping"
Fastboot device ack both full and high speed interface descriptors when
work in full-speed mode, that's will cause this issue.
Fix it.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: John Keeping <john@metanate.com>
The compatible values used for device nodes representing Renesas Reduced
Pin Count Interfaces were based on preliminary versions of the Device
Tree Bindings.
Correct them in both DTSi files and drivers, to match the final DT
Bindings.
Note that there are no DT bindings for RPC-IF on RZ/A1 yet, hence the
most logical SoC-specific value is used, without specifying a
family-specific value.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
As the Renesas Reduced Pin Count Interface may be locked by TF-A, it is
disabled by default[1]. When unlocked, TF-A passes a DT fragment to
enable it, which is applied to the U-Boot DT[2].
Unlike the memory layout, the RPC-IF enablement is not propagated to
subsequent software. Hence e.g. Linux cannot know if the RPC-IF is
locked or not, and will lock-up when trying to access the RPC-IF when
locked.
Fix this by checking if the RPC-IF is enabled in the TF-A DT fragment, and
setting the status of the RPC-IF device node in the target DT, if
present, to "okay". Do this only when a "flash" subnode is found, to
avoid errors in subsequent software when the RPC-IF is not intended to
be used.
Note that this requires the status of the RPC-IF node to be set to
"disabled" in the target DT, just like in the U-Boot DT.
[1] commit 3d5f45c95c9db73d ("ARM: dts: rmobile: Disable RPC HF by
default")
[2] commit 361377dbdbc9f0f5 ("ARM: rmobile: Merge prior-stage firmware
DT fragment into U-Boot DT on Gen3")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
According to the Generic Names Recommendation in the Devicetree
Specification Release v0.3, and the DT Bindings for the Renesas Reduced
Pin Count Interface, the node name for a Renesas RPC-IF device should be
"spi". Especially on R-Car Gen3 and RZ/G2, the node name matters, as
the node is enabled by passing a DT fragment from TF-A to U-Boot, and
from U-Boot to subsequent software.
Fix this by renaming the device nodes from "rpc" to "spi".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Enable d-cache early in SPL right after DRAM is started up.
This reduces U-Boot proper load time by 650ms when loaded
from SPI NOR.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Introduce the new Kconfig symbol CONFIG_SPL_SYS_L2_PL310 to allow the
SPL to build cache-pl310.c.
Before this commit, the SPL could enable the PL310 L2 cache [1], but the
cache maintenance functions from cache-pl310.c were only useable for
non-SPL builds.
After enabling the cache one must be able to flush it, too. Thus this
commit allows cache-pl310.c to be included in the SPL build.
[1] See for example arch/arm/mach-imx/cache.c: v7_outer_cache_enable()
Signed-off-by: Philip Oberfichtner <pro@denx.de>
This converts CONFIG_SYS_L2_PL310 to Kconfig.
For omap2 and mvebu the 'select SYS_L2_PL310' locations were
determined using ./tools/moveconfig -i CONFIG_SYS_L2_PL310.
For mx6 I manually chose ARCH_MX6 as 'select' location. The
correctness has been verified using
$ ./tools/moveconfig.py -f ARCH_MX6 ~SYS_L2_PL310 ~SYS_L2CACHE_OFF
0 matches
That means whenever an ARCH_MX6 board had SYS_L2_PL310 disabled, this
was correctly reflected in SYS_L2CACHE_OFF. Thus it's safe to insert
the 'select' statement under ARCH_MX6.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
This removes the following symbols:
CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS
CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS
CONFIG_SYS_I2C_LDI_ADDR
CONFIG_SYS_I2C_DVI_ADDR
CONFIG_SYS_I2C_DVI_BUS_NUM
They are unused by any code in tree at this time.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_I2C_EEPROM_CCID
CONFIG_SYS_I2C_EEPROM_NXID
CONFIG_SYS_EEPROM_BUS_NUM
Signed-off-by: Tom Rini <trini@konsulko.com>
Upstream bzip2 1.0.x actually is stuck when running bzip2 -V and
redirecting the output. This is fixed in Debian for about a decade
already in
https://git.launchpad.net/ubuntu/+source/bzip2/tree/debian/patches/20-legacy.patch?h=ubuntu/jammy
and in bzip2 1.1.x (no release yet, see
65179284ce
).
Fedora notably does not have such a patch.
Since bzip2 --help actually prints the version number too, let's use it
instead so that binman works fine on (hopefully) all distributions.
Fixes: 45aa2798008c ("binman: Add bzip2 bintool")
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bintool.version can now be passed the binary argument to return the
version text, so there's no need to override it in futility anymore.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bintool.version can now be passed the binary argument to return the
version text, so there's no need to override it in fiptool anymore.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The code to check the version is very similar between binaries, the most
likely only needed variables are the regex to find the version (already
supported) and the args to pass to the binary so that it prints this
version (e.g. --version, -V or similar).
Let's make it a parameter of Bintool so that code duplication can be
avoided for simple changes.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Bintool.version already contains everything required to get the version
out of mkimage binary so let's not override it with its own
implementation.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bintool.version already contains everything required to get the version
out of lz4 binary so let's not override it with its own implementation.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Version checking has nothing specific to compression/decompression tools
so let's move it to the Bintool class.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The binary is looked on the system by the suffix of the packer class.
This means binman was looking for btool_gzip on the system and not gzip.
Therefore, let's pass "gzip" as the name so that it can be found and
used.
Fixes: 0f369d79925a ("binman: Add gzip bintool")
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add bindings needed for accessing the FWU metadata regions.
These include the compatible string which point to the access
method, the actual device which stores the FWU metadata and
the offsets for both metadata regions.
The current patch adds basic bindings needed for accessing the
metadata structure on non-GPT mtd regions.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
The old "Patches" wiki page is not available anymore. Now that the
content has been integrated with the submitting_patches document,
reference that instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Use gender-neutral language to refer to the user, consistently.
- Reference the checkpatch document.
- Move the section on commit message tags to the process document and
reference this in sending_patches.rst.
- Reword the custodian workflow process section to refer to this new
section, integrate some of the wording from there in this new section.
- Update the comment about GPLv2 applying to August 2022, to be clear
this still is correct.
- Reword the section about MAKEALL to talk about local build testing and
link to the CI document.
- Reference the system_configuration document for the note about
modifying existing code.
- Reword the patchwork flow section.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Import as-is much of the old "Patches" wiki page to the current
sending_patches.rst file. This means we need to move patman to being
included in the higher level ToC and add a reference for "Custodians" in
the process document. A very minimal amount of content changing and
rewording is done here as part of the import, in order to make the
conversion easier.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add gpio status output fields description and one output example.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tweak the formatting.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Only probed block devices are available in the UEFI sub-system. Multiple
block devices may be involved in the boot process. So we have to make sure
that all block devices are probed. Another reason is that we store UEFI
variables on the ESP which may be on any block device.
On the sandbox before the patch:
=> efidebug devices
No EFI system partition
Device Device Path
================ ====================
000000001b027c70 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
000055d078bc1ae0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/Uart(0,0,D,D)
000000001b22e0b0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/MAC(020011223344,1)
After the patch:
=> efidebug devices
No EFI system partition
Device Device Path
================ ====================
000000001b027c70 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
000055bdac8ddae0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/Uart(0,0,D,D)
000000001b230920 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/SD(2)/SD(0)
000000001b233ac0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/SD(1)/SD(1)
000000001b233b80 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/SD(1)/SD(1)/HD(1,GPT,d0a914ee-a71c-fc1e-73f0-7e302b0e6c20,0x30,0x1)
000000001b234110 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/SD(1)/SD(1)/HD(2,GPT,9330a0ea-8aff-f67a-294c-fa05d60896c3,0x31,0x1)
000000001b22f0e0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/SD(0)/SD(2)
000000001b238df0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/MAC(020011223344,1)
Fixes: a9bf024b2933 ("efi_loader: disk: a helper function to create efi_disk objects from udevice")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Newer versions of GCC won't initialize parts of structures which don't
appear to be used. This results in uninitialized semihosting parameters
passed via R1. Fix this by marking the inline assembly as clobbering
memory.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
LibreSSL 3.5.0 and later (also shipped as part of OpenBSD 7.1 and
and later) have an opaque RSA object and do provide the
RSA_get0_* functions that OpenSSL provides.
Fixes: 2ecc354b8e46 ("tools: mkimage: fix build with LibreSSL")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
FTD blob can be put immediately after the OS image.
So use strict inequality for start address check.
Fixes: fbde7589ce30 ("common: bootm: add checks to verify if ramdisk / fdtimage overlaps OS image")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
fit_image_get_comp() should not set value -1 in case it can't read
the compression node. Instead, leave the value untouched in that case
as it can be absent and a default value previously defined by the
caller of fit_image_get_comp() should be used.
As a result the warning message
WARNING: 'compression' nodes for ramdisks are deprecated, please fix your .its file!
no longer shows if the compression node is actually absent.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change variable name 'imape_comp' to the supposedly intended name
'image_comp'.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This reinstates fix from commit 8f8c04bf1ebb ("i2c: fix stack buffer
overflow vulnerability in i2c md command") without the changes unrelated
to the actual fix. Avoid the underflow by setting only nbytes and
linebytes as unsigned integers.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nicolas Iooss <nicolas.iooss+uboot@ledger.fr>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tim Harvey <tharvey@gateworks.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
This reverts commit 8f8c04bf1ebbd2f72f1643e7ad9617dafa6e5409.
The commit is largely wrong and breaks most of i2c command functionality.
The problem described in the aforementioned commit commit message is valid,
however the commit itself does many more changes unrelated to fixing that
one problem it describes. Those extra changes, namely the handling of i2c
device address length as unsigned instead of signed integer, breaks the
expectation that address length may be negative value. The negative value
is used by DM to indicate that address length of device does not change.
The actual bug documented in commit 8f8c04bf1ebbd2f72f1643e7ad9617dafa6e5409
can be fixed by extra sanitization in separate patch.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nicolas Iooss <nicolas.iooss+uboot@ledger.fr>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When compiling executables from a single.c file, the linker is also
invoked. Pass the flags like the other linker commands.
cherry-pick kbuild change from Linux:
63185b46cdb3 (kbuild: use HOSTLDFLAGS for single .c executables)
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are three different kinds of EEPROM possibly present on boards.
1. 1byte address. For those we should avoid 2byte address in order
not to rewrite the data. Second byte of the address can potentially
be interpreted as the data to write.
2. 2byte address with defined behaviour. When we try to use 1byte
address they just return "FF FF FF FF ... FF"
3. 2byte address with undefined behaviour (for instance, 24LC32AI).
When we try to use 1byte address, then their internal read
pointer is changed to some value. Subsequential reads may be
broken.
To gracefully handle both case #1 and case #3 we read all required
data from EEPROM at once (about 80 bytes). So either all the data is
valid or we fallback to 2byte address.
Cc: Nishanth Menon <nm@ti.com>
Fixes: a58147c2dbbf ("board: ti: common: board_detect: Do 1byte address checks first.")
Reference: https://lore.kernel.org/all/CAJs94Ebdd4foOjhGFu9Bop0v=B1US9neDLxfhgcY23ukgLzFOQ@mail.gmail.com/
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Acked-by: Nishanth Menon <nm@ti.com>
I do not have any non-serial output devices, so a
print_pre_console_buffer(PRE_CONSOLE_FLUSHPOINT2_EVERYTHING_BUT_SERIAL)
does nothing for me.
However, I was manually inspected the pre-console buffer using md.b,
and I noticed that the early part of it was repeated. The reason is
that the first call of print_pre_console_buffer(), from
console_init_f(), ends up invoking puts() with the contents of the
buffer at that point, and puts() at that point ends up in the else
branch of
if (gd->flags & GD_FLG_DEVINIT) {
/* Send to the standard output */
fputs(stdout, s);
} else {
/* Send directly to the handler */
pre_console_puts(s);
serial_puts(s);
}
so indeed the contents is added again.
That can be somewhat confusing (both when reading the buffer manually,
but also if it did actually come out on some device). So disable all
use of the pre-console buffer while print_pre_console_buffer() is
emitting it.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
other minor fixes
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Merge tag 'dm-pull-26aug22' of https://source.denx.de/u-boot/custodians/u-boot-dm
binman/patman documentation improvements
other minor fixes
Some UBI partitions may use non-standard UBI header offset. For attaching
these UBI partitions it is required to pass second argument with offset to
"ubi part" command.
Therefore extend distroboot to allow specifying additional optional 6th
argument with UBI header offset. This offset is set in new distroboot
variable ${bootubioff} which may be used by distroboot script to e.g.
properly pass this value to linux kernel command line for proper mounting
of rootfs by kernel. This variable is set to empty string (cleared) when
UBI header offset is not specified into distroboot BOOT_TARGET_DEVICES
macro.
Usage of helper macro BOOTENV_DEV_UBIFS_BOOTUBIOFF in this change is there
as a type check. It ensures that in BOOT_TARGET_DEVICES macro was specified
UBIFS func with either 5 or 6 arguments. If not then cpp throws compile
error.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Avoid enabling this command by default. This saves about 1KB of code
space.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tests should be in order of the test-file numbers. Sort the tests
according to the test-file numbers and rework the test-file numbers to
eliminate duplicate numbers.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Don't assign a value to a variable if it is not used afterwards.
Move variables to the code fragment where they are used.
Addresses-Coverity: CID 356243 ("Code maintainability issues (UNUSED_VALUE)")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
uclass_find_first_device() may return NULL if no device for the uclass
exists. Handle this case gracefully.
Addresses-Coverity: CID 356244 ("Null pointer dereferences (FORWARD_NULL)")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the addition of the revision stats this now takes over a minute. Use
a parallel build to reduce it a bit (24 seconds for me).
Series-changes; 2
- Use '-j auto' instead
Signed-off-by: Simon Glass <sjg@chromium.org>
The spl doesn't support ubifs and thereby doesn't provide the
ubifs_is_mounted function. Remove the dependency to ubifs for the spl.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
The brute-force controller disable method can end up racing controller
initialization and causing a crash when we shut down Apple ANS2 NVMe
controllers. Do a proper controlled shutdown, which does block until
things are quiesced properly. This is nicer in general for all
controllers.
Signed-off-by: Hector Martin <marcan@marcan.st>
Tested-by: Mark Kettenis <kettenis@openbsd.org> (firefly-rk3399)
PCIe config space has address range 0-4095. So do not allow reading from
addresses outside of this range. Lot of U-Boot drivers do not expect that
passed value is not in this range. PCI DM read function is extended to
fill read value to all ones or zeros when it fails as U-Boot callers
ignores return value.
Calling U-Boot command 'pci display.b 0.0.0 0 0x2000' now stops printing
config space at the end (before 0x1000 address).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
We can check if the message was acknowledged in the common
ti_sci_do_xfer() which lets us remove it from after each call to this
function. This simplifies the code and reduces binary size.
Signed-off-by: Andrew Davis <afd@ti.com>
The inline hint is not needed here, the compiler will do the right thing
based on if we are compiling for speed or for code size. In this case the
inline causes this function to be placed inside each callsite which is
not the right thing to do for either speed nor size. There is no
performance benefit to this due to the larger function size reducing
cache locality, but there is a huge size penalty. Remove inline keyword.
Signed-off-by: Andrew Davis <afd@ti.com>
We don't need to print the same message in every location, just
print it in the function that fails and remove all the extra
message printouts.
Signed-off-by: Andrew Davis <afd@ti.com>
This ti_sci_do_xfer() function already prints out the reason for the
failure, and the caller of each of these functions should also notify
the user of the failed task. Remove this extra level of error message.
Signed-off-by: Andrew Davis <afd@ti.com>
Currently for all Qcom SoCs/boards there are separate compatibles for
GPIO and pinctrl. But this is inconsistent with official (upstream) Linux
bindings which requires only a single compatible "qcom,<SoC name>-pinctrl"
and there is no such compatible property as "qcom,tlmm-<SoC name>".
So fix this inconsistency for Qcom SoCs in order to comply with upstream
DT bindings. This is done via removing compatibles from "msm_gpio" driver
and via binding to "msm_gpio" driver from pinctrl driver in case
"gpio-controller" property is specified for pinctrl node.
Suggested-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
DT compatible is sufficient to make platform specific differentiation,
so remove redundant CONFIG_SDM845 check.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Enable USB config options along with its dependencies like PHY, RESET,
PMIC GPIO etc. config options.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
For USB3 host controller to detect devices on the bus it is required to
enable a PMIC GPIO: usb_vbus_boost_pin. So enable that during board
specific initialization.
And since this PMIC GPIO parsing is quite u-boot specific, so add a
DT override to qcs404-evb-uboot.dtsi to represent usb_vbus_boost_pin.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
GPIO LV (low voltage)/MV (medium voltage) subtypes have different
features and register mappings than 4CH/8CH subtypes. Add support
for LV and MV subtypes.
With GPIO LV/MV subtype available, add "qcom,pms405-gpio" compatible
which requires support for GPIO MV subtype.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Since both pm8916.c and pm8916_gpio.c are already supporting multiple
Qcom SoCs, it makes sense to rename these drivers to pmic_qcom.c and
qcom_pmic_gpio.c respectively. Also, these driver can be extended to
support additional functionality if required for other Qcom SoCs.
Along with this import latest DT binding: qcom,spmi-pmic.txt from Linux
kernel and thereby remove pm8916.txt.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
QCS404 SoC provides support for two USB controllers: one USB3 and the
other one being USB2. The USB3 controller supports further 2 PHY: one high
speed PHY and the other super speed PHY. The USB2 controller supports a
single high speed PHY. So add corresponding DT nodes.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Drivers like USB, ethernet etc. uses ".enable" hook to enable clocks.
So add corresponding support for Qcom clock drivers.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Since the base functionality remains the same for a reset driver on Qcom
SoCs, so leverage that to convert ipq4019 specific reset driver to a
generic Qcom reset driver. With that one just need to provide SoC specific
reset table.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
QCS404 SoC supports two types of PHY, one supports high speed mode or
USB2 PHY and the other supports super speed mode or USB3 PHY. So add
corresponding PHY drivers.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Remove the main_cpsw0_qsgmii_phyinit variable from the boot
command as there is no ethernet firmware in j721s2.
Fixes: 8886341aa670 ('configs: j721s2_evm_a72_defconfig: Add A72 specific defconfig')
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Re-sync again on some linux part, add some fixes for fsl_elbc from
Pali and switch
imx8mn bsh to use nand base ident
For nand subsystem tested on:
- imx8mn Macronix MX30LF4G18AC
- P2020 based board Turris 1.1 for fsl_elbc
- kirkwood: pogo_v4 & nsa310s: Add distro boot (Tony)
- kirkwood: add DM timer support and use it on lsxl boards (Michael)
- kirkwood: convert the Buffalo Linkstation LS-CHLv2 and XHL boards
to DM (Michael)
- mvebu: turris_mox/omnia: misc improments (Pali)
- mvebu: mbus: Fix mbus driver to work also after U-Boot relocation (Pali)
The board has only one network interface. The linux kernel will
gracefully skip a the ethernet interface if no connected PHY could be
probed. u-boot on the other hand will throw an error message. The kernel
device tree is about to be fixed. For now, just disable the ethernet
interface in our -u-boot.dtsi.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
DM_SERIAL needs early malloc. The on-chip RAM is pretty tight, it's only
2kiB, with DM_SERIAL enabled, this doesn't work anymore. Fortunately for
us, we don't need the on-chip RAM because the DRAM is already
initialized before u-boot starts. Just put the early malloc area there
and use the default early malloc size.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Just enabling the Kconfig option for DM_ETH and DM_MDIO is enough.
Additionally, we can remove the old hardcoded config.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Use the new mvebu GPIO driver and convert all the function calls to the
former kirkwood GPIO driver. This means that we are now using the LED
uclass and the regulator uclass. Unfortunately, the GPIO LED doesn't
offer a blinking method. Thus we are now stuck with solid on and off
states, which makes debugging a bit harder. Also, there is no GPIO fan
driver for now.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
If something is wrong with the environment, we cannot rely on a proper
u-boot operation anymore. In fact, it is possible, that we never reach
misc_init_r() with a broken environment.
Also don't enable the netconsole by environment settings. This way the
user don't have to reconfigure the environment. Instead the network
console is only enabled when the push button is pressed during boot.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
We still need to be able to boot legacy images. Esp. the debian
installer will have a kernel with an appended DTB.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Use the common kernel_addr_r, ramdisk_addr_r and fdt_addr_r variable
names.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
We can load the ramdisk as the last step. This way we don't have to set
the intermediate variable 'ramdisk_len' and can remove it.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Drop our own CONFIG_FDTFILE handling in favor of the generic
CONFIG_DEFAULT_FDT_FILE one.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
The board code needs this to be set. Otherwise, the recovery mechanism
doesn't work. Therefore, select this option automatically with the
board.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Cleanup the included header files in the board code. These are all
leftovers from earlier days.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
This is not needed. The user can force setting the variables with
"setenv -f".
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
The board only has a 4Mbit flash and two sectors are reserved for the
u-boot environment and the device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
The gpio-button driver depends on DM_GPIO, add it to Kconfig to avoid
build errors.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Add timer support for Kirkwood and MVEBU devices.
Cc: Pali Rohár <pali@kernel.org>
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
If we switch to CONFIG_TIMER, we don't need the legacy timer macros and
functions anymore. Add the proper guards to exclude them from compiling.
Cc: Pali Rohár <pali@kernel.org>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
CONFIG_SYS_TIMER_RATE might be a dynamic value, i.e. a function call
instead of a static value, thus it has to be evaluated at runtime. If it
is a static value, the compiler should be able to optimize the unused
branches out.
This will be needed for kirkwoods dynamic CONFIG_SYS_TCLK setting.
Cc: Pali Rohár <pali@kernel.org>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
- Add distro boot to board include file and deconfig file
- Miscellaneous changes:
- Remove Gerald from maintainer list (email bounced)
- Add CONFIG_SUPPORT_PASSING_ATAGS and friends to support legacy
kernel method of booting (e.g. OpenWrt) with appended DTB.
- Add CONFIG_UBIFS_SILENCE_MSG to reduce binary size.
Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220807192709.21717-1-pali@kernel.org/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
mbus driver is initialized from arch_cpu_init() callback which is called
before relocation. This driver stores lot of functions and structure
pointers into global variables, so it is data position dependent.
Therefore after relocations all pointers are invalid and driver does not
work anymore as all pointers referes to the old memory, which overlaps with
CONFIG_SYS_LOAD_ADDR and ${loadaddr}.
For example U-Boot fuse command crashes if loadaddr memory is cleared or
rewritten by some image loaded by U-Boot load command.
mw.w ${loadaddr} 0x0 10000
fuse read 0 1 2
Fix this issue by removing of all mbus global variables in which are stored
pointers to structures or functions which changes during relocation. And
replace it by direct function calls (not via pointers). With this change
fuse command finally works.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
When Mox SFP module is connected after Topaz or Peridot module then port DT
node already contains "sfp" label. But Mox SFP module can be connected also
without Topaz or Peridot module in which case it is connected directly into
he eth1 DT node, which is without any label. So add "sfp" label into eth1
DT node in this case.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
There are already more MCU firmware versions for Turris Omnia in
production, so display git commit (version) of the MCU firmware during
U-Boot startup. It will help to identify what version of MCU firmware is
Turris Omnia using.
MCU firmware for Turris Omnia is open source and available at website:
https://gitlab.nic.cz/turris/hw/omnia_hw_ctrl
It can be updated from running system via i2c bus with this tool:
https://gitlab.nic.cz/turris/omnia-mcutool
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
- Add distro boot to board include file and deconfig file
- Miscellaneous changes:
- Add CONFIG_SUPPORT_PASSING_ATAGS and friends to support legacy
kernel method of booting (e.g. OpenWrt) with appended DTB.
- Add CONFIG_LTO and CONFIG_UBIFS_SILENCE_MSG, and disable some
unused configs to reduce binary size.
Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220807192709.21717-1-pali@kernel.org/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
SPI0 CS0 Flash is mapped to address range 0xD4000000 - 0xD7FFFFFF by BootROM.
Proper U-Boot removes this direct mapping. So it is available only in SPL.
This applies for all 32-bit Armada BootROMs. SPL mvebu code is used only on
32-bit Armada SoCs. So move env_sf_get_env_addr() function from Turris
Omnia board to common SPL mvebu code and add proper checks for SPI0 CS0.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
binman clean-up of compression and addition of utilities
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Merge tag 'dm-pull-20aug22' of https://source.denx.de/u-boot/custodians/u-boot-dm
binman fixes for various things
binman clean-up of compression and addition of utilities
- We now have a new enough sbsigntools in the distro, stop building.
- Use the 20220801 tag for Jammy.
- Move to pygit2 1.9.2 (current version) as the old one doesn't build on
"Jammy".
- Add the working directory to the list of safe directories for git.
- Move to pytest 6.2.5 to address other issues.
- This move exposed a number of minor issues in the existing scripts we
used within CI to perform the jobs themselves. The most notable changes
here involve using 'set +e / set -e' to enforce when we should or should
not make non-zero buildman status be a fatal error.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
During compilation gcc throws warning:
drivers/mtd/nand/raw/fsl_elbc_nand.c: In function ‘fsl_elbc_nand_probe’:
drivers/mtd/nand/raw/fsl_elbc_nand.c:841:31: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev);
^
Fix it by using dev_read_addr_ptr() function which returns pointer instead
of dev_read_addr() which returns integer type.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Subpage write support for freescale eLBC NAND controller driver is
implemented in U-Boot and was fixes in the commit d3963721d93f ("nand: Sync
with Linux v4.1").
So remove NAND_NO_SUBPAGE_WRITE flag from the fsl_elbc_nand.c driver. This
partially revert commit cb04c7723429 ("nand/fsl: add NAND_NO_SUBPAGE_WRITE
to eLBC and IFC drivers"), only eLBC driver part.
With this change U-Boot with default settings can read from NAND UBIFS
image created on Linux with Linux default settings. Prior this change
U-Boot was unable to read from NAND UBIFS images created with Linux default
settings due to differnet UBI geometry.
Linux kernel fsl_elbc_nand.c driver also does not set NAND_NO_SUBPAGE_WRITE
flag and has implemented subpage write support.
Fixes: cb04c7723429 ("nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC drivers")
Fixes: d3963721d93f ("nand: Sync with Linux v4.1")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-By: Michael Trimarchi<michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
The board can mount different nand brand type. Try to use the full scan
detection and not the onfi one
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit 8fc82d456e40a0.
On some nand controllers with hw-ecc the controller code wants to know
the ecc strength and size and having these as 0, 0 is not accepted.
Specifying these in devicetree is possible but undesirable as the nand
may be different in different production runs of the same board, so it
is better to get this info from the nand id where possible.
This commit adds code to read the ecc strength and size from the nand
for Samsung extended-id nands. This code is based on the info for the 5th
id byte in the datasheets for the following Samsung nands: K9GAG08U0E,
K9GAG08U0F, K9GAG08X0D, K9GBG08U0A, K9GBG08U0B. These all use these bits
in the exact same way.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit 7bb427990ee364.
Rename the function to match this new behavior.
NOTE: fix nand_detect/nand_get_flash_type parameters in
mxs_nand_spl. This code seems never executed by any board
as alternative for nand detect
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit 4722c0e958e636.
The returned "type" is never used in nand_scan_ident() and spl code
Make nand_get_flash_type() simply return an integer value in order
to avoid unnecessary ERR_PTR/PTR_ERR dance.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit 8cfb9ab68f9070.
Drop the 's' at the end of nand_manufacturers since the struct is actually
describing a single manufacturer, not a manufacturer table.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
At this point given the number of PowerPC platforms we have, a single
job to build them all fits within the time limit we have in Azure.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The kmtegr1 board is out of maintenance and can be removed. As it is the
only board in the tree using MPC8309 the support for this CPU is dropped
completely.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
This board is missing migration to CONFIG_DM, which had a deadline of
v2020.01, which is now more than 2 years passed due. Remove it.
Cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@konsulko.com>
Enforce requiring DM_ETH to be enabled for ethernet drivers, as the
migration deadline has well passed. To facilitate this, we remove some
non-migrated platforms and disable networking on a few others. Finally
we remove some of the now-useless non-DM_ETH code in some platforms as a
prerequisite for DM_ETH being set.
The deadline for DM_ETH migration passed 2 years ago. Now that
platforms which cannot be migrated have been either removed or had
drivers disabled, and platforms that needed minor help to migrate have
been forcefully migrated, we can complete the migration.
This entails select'ing DM_ETH under NETDEVICES, and then removing now
extraneous depends on lines. In a few places, we can now either remove
options or just simplify later dependencies.
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
Now that we are about to enable DM_ETH by default, remove legacy code.
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Now that we are about to enable DM_ETH by default, remove legacy code.
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we are about to enable DM_ETH by default, remove legacy code.
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we are about to enable DM_ETH by default, remove legacy code.
Cc: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we are about to enable DM_ETH by default, disable SPL_NET as
SPL_DM is not enabled currently.
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This platform needs to be converted to use DM_ETH as the deadline is 2
years passed due. Disable networking support for now.
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
As this driver has been converted to DM_ETH and the migration deadline
is 2 years passed, remove the legacy code and callers.
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
There is some code here for the legacy non-DM_ETH case, add a guard
around it.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
These boards have been orphaned for some time and are behind on various
DM migrations. Remove them.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The *aqds* platforms have not been migrated to be able to enable
CONFIG_DM_ETH with CONFIG_FMAN_ENET. Disable CONFIG_FMAN_ENET on these
platforms.
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Pramod Kumar <pramod.kumar_1@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
When using DM_ETH, which should be the default now, we need to always
have DM_MDIO and FSL_LS_MDIO enabled, so select them.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Wasim Khan <wasim.khan@nxp.com>
Cc: Udit Agarwal <udit.agarwal@nxp.com>
Cc: Ashish Kumar <Ashish.Kumar@nxp.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Manish Tomar <Manish.Tomar@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This driver has not been converted to DM_ETH. The migration
deadline passed 2 years ago.
Cc: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Cc: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board is not converted to use CONFIG_DM, well passed the migration
deadline. Remove it.
Cc: Simon Guinot <simon.guinot@sequanux.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To ease maintenance, let's keep only the main mx28evk_defconfig
and remove the other variants that have not been migrated to DM.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add zstd bintool to binman to support on-the-fly compression.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add xz bintool to binman to support on-the-fly compression.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add lzop bintool to binman to support on-the-fly compression.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add gzip bintool to binman to support on-the-fly compression of Linux
kernel images and FPGA bitstreams. The SPL basic fitImage implementation
supports only gzip decompression.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rename the module and support this, since gzip.py is a system module:
Signed-off-by: Simon Glass <sjg@chromium.org>
Add bzip2 bintool to binman to support on-the-fly compression.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a bintools base class for packers which compression / decompression
entry contents.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dropped dead/untested code in version():
Signed-off-by: Simon Glass <sjg@chromium.org>
Add common test functions to test all supported compressions.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Handle missing compression tools by returning empty data and record
missing bintool.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move management of the bintool to compress and decompress data into the
entry class and add the bintool to the list of required bintools.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Select the lz4 and lzma_alone bintools in cbfs_util class to centralize
the supported compression algorithm evaluation inside the class and over
multiple classes.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move compression bintools (packer) creation into test setup to reuse
bintool objects between tests.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Put comp_util import back in, since it is still needed here:
Signed-off-by: Simon Glass <sjg@chromium.org>
Remove the obsolete compressed data header handling from the utilities
to compress and decompress data. The header is uncommon, not supported
by U-Boot and incompatible with external compressed artifacts.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Disable the compressed data header of the utilities to compress and
decompress data. The header is uncommon, not supported by U-Boot and
incompatible with external compressed artifacts.
The header was introduced as part of commit eb0f4a4cb402 ("binman:
Support replacing data in a cbfs") to allow device tree entries to be
larger than the compressed contents.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add an optional length header attribute to the device tree blob entry
class based on the compressed data header from the utilities to compress
and decompress data.
If needed the header could be enabled with the following
attribute beside the compress attribute:
prepend = "length";
The header was introduced as part of commit eb0f4a4cb402 ("binman:
Support replacing data in a cbfs") to allow device tree entries to be
larger than the compressed contents. Regarding the commit "this is
necessary to cope with a compressed device tree being updated in such a
way that it shrinks after the entry size is already set (an obscure
case)". This case need to be fixed without influence any compressed data
by itself.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a DecompressData function to entry class to allow override in child
classes and to centralize the compress and decompress in a single class.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Check only section data instead of the rest of the image in multi
section test.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Collect and thereby initialize bintools before any usage but after
generation of entries. This is needed to handle bintools for compress
and decompress like other bintools.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Forward AddBintools calls to base class to collect bintools of base
class.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Forward AddBintools calls to sub entries in cbfs_util to collect
bintools of sub entries.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Avoid duplicate entries in the list of bintools used by the image and
the list of missing bintools.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Skip tests which requires python elftools if the tool is not available.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present the collections etype only works with entries in the same
section. This can be limiting, since in some cases the data may be inside
a subsection, e.g. if there are alignment constraints.
Add a function to find the entries in an etype and have it search
recursively. Make use of this for mkimage also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Also control over what goes in the file passed with -n using a separate
imagename subnode. This can include a section or any other entry type.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some image types use the -n parameter to pass in the data file. Add
support for this, with a new property.
Signed-off-by: Simon Glass <sjg@chromium.org>
Expand this a little to make things clearer. Also drop the invalid
entry arg.
Series-changes 2
- Make it clear that -d data is concatenated/collected by binman
- Fix mulitple typoe
- Reword a sentence for grammar
Signed-off-by: Simon Glass <sjg@chromium.org>
The testReplaceSectionSimple() test is the only one which expects failure.
It looks odd in the output and takes time to glance at it to see that all
is in fact well. Also it does not check that the right exception is
generated.
Use the more common (in binman) approach of checking for an exception.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since this is implemented as a section, it should really be split into
several functions, one to read the node and one to read the entries. Do
this so that it matches how Entry_section works.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some new entries are likely to have required properties. Support this in a
standard way, with a list of required properties which can be set up by
base classes. Check for missing properties when the entry is read.
Signed-off-by: Simon Glass <sjg@chromium.org>
When a single test is run we don't need to buffer the test output. This
has the unfortunate side effect of suppressing test output, in particular
the binman output directory normally printed with the -X option. This is
a huge problem since it blocks debugging of tests.
We don't actually know how many tests will be run when we set up the
suite, so as a work-around, assume that test_name being specified
indicates that there is likely only one.
Signed-off-by: Simon Glass <sjg@chromium.org>
bootstage_mark() and bootstate_error() are not recording any name and in
report it is showing as id=<value>. That's not useful and it is better to
show function name which calls it.
That's why use macros with passing __func__ as recorded name for bootstage.
Origin report looks like this:
ZynqMP> bootstage report
Timer summary in microseconds (10 records):
Mark Elapsed Stage
0 0 reset
2,482,383 2,482,383 board_init_f
4,278,821 1,796,438 board_init_r
4,825,331 546,510 id=64
4,858,409 33,078 id=65
4,862,382 3,973 main_loop
4,921,713 59,331 usb_start
9,345,345 4,423,632 id=175
When this patch is applied.
ZynqMP> bootstage report
Timer summary in microseconds (31 records):
Mark Elapsed Stage
0 0 reset
2,465,624 2,465,624 board_init_f
4,278,628 1,813,004 board_init_r
4,825,139 546,511 eth_common_init
4,858,228 33,089 eth_initialize
4,862,201 3,973 main_loop
4,921,530 59,329 usb_start
8,885,334 3,963,804 cli_loop
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These functions are not needed anymore since we now have logic which can
output to the console if logging is disabled. Drop the declarations.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present fake files from a previous build appear to be real files for
a subsequent build, since they sit in the output directory.
This can cause problems, since binman may need to parse the file, e.g.
with the Intel description.bin files.
Fix this by putting them in a 'binman-fake' subdirectory. Keep a track
of the fake filename so we only create it once. Subsequent builds will
still see that the file is missing and mark it as fake.
Update a few tests to check the behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
Makes it easier to add readable GPIO definitions in DTS files
for Aspeed SOC based boards.
Ported with small edits to add IBM copyright statement and fix
for checkpatch warning.
Signed-off-by: Dhananjay Phadke <dphadke@linux.microsoft.com>
Reviewed-by: Billy Tsai <billy_tsai@aspeedtech.com>
Acked-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
During early boot phase GD_FLG_ENV_READY is not set but env_get() may work
when env is ready in restricted mode. Do not fail with error message
"WARNING: Calling __hwconfig without a buffer and before environment is ready"
when env is already working by checking for ENV_VALID flag.
Signed-off-by: Pali Rohár <pali@kernel.org>
The k3_gen_x509_cert.sh script produced this warning on gitlab and also
on my machine, e.g. with j7200_evm_r5:
awk: cmd. line:1: warning: regexp escape sequence `\ ' is not a known
regexp operator
There is no need to escape spaces, so drop the backslashes. Also split
the line so it is a more reasonable length.
This script should really be deleted and binman used instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
The Yocto project builds their aarch64 cross-compiler with the
configure knob --enable-standard-branch-protection, which means that
their gcc behaves as if -mbranch-protection=standard is passed; the
default (lacking that configure knob) is -mbranch-protection=none.
This means that when building U-Boot using the Yocto toolchain, most
functions end up containing paciasp/autiasp/bti instructions. However,
since U-Boot is not an ordinary userspace application, there's no OS
kernel which has set up the required authentication keys, so these
instructions do nothing at all (even on arm64 hardware that does have
the pointer authentication capability). They do however make the image
larger.
It is theoretically possible for U-Boot to make use of the pointer
authentication protection - cf. the linux kernel's
CONFIG_ARM64_PTR_AUTH_KERNEL - but it is far from trivial, and it's
hard to see just what threat model it would protect against in a
bootloader context. Regardless, we certainly have none of the required
infrastructure now, so explicitly pass -mbranch-protection=none to
ensure those useless instructions do not get emitted.
For a toolchain not configured with
--enable-standard-branch-protection, this changes nothing. For the
Yocto toolchain, this reduces the size of both SPL and U-Boot proper
by about 3% for my imx8mp target.
If you don't have a Yocto toolchain, the effect can easily be
reproduced by applying this patch and changing =none to =standard.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
pcm051_rev3_defconfig config (Phytec Wega board) has been dropped in
64efd11d ("arm: Remove pcm051 board")
due to expired migration deadlines. Here, pcm051_rev3_defconfig support is
reintroduced.
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some of config options are board specific and should be set in into their
default values automatically. So move them from defconfig file to Kconfig
definitions to ensure that possible user custom defconfig files would have
these required options also enabled.
Signed-off-by: Pali Rohár <pali@kernel.org>
Now when board starup code does not copy image to CONFIG_SYS_TEXT_BASE
address there is no need to calculate all addresses from base address at
runtime. The only address which needs to be calculated is attached kernel
image address which can be simplified at compile time without need to know
CONFIG_SYS_TEXT_BASE address or relocation address at the runtime.
Signed-off-by: Pali Rohár <pali@kernel.org>
Expression (r + (r0 - r1)) produce same result as (r - (r1 - r0)). So it
does not matter which one is called. Always call the first option and
remove second one.
Signed-off-by: Pali Rohár <pali@kernel.org>
Switch from custom board specific fixup/copy code to U-Boot generic
position independent code provided by config option POSITION_INDEPENDENT.
This also slightly decrease size of u-boot.bin binary (by 52 bytes). Note
that option POSITION_INDEPENDENT increase size but not more than custom
board fixup/copy code which is being deleted (as it is not needed anymore).
Signed-off-by: Pali Rohár <pali@kernel.org>
Prior starting copy of kernel image to target location, invalidate also
zImage magic header. This ensures that on target location would be image
with valid header only in the case valid header was also in the source
location and copy from source to target finished successfully. Copy is
always skipped when kernel image in source location is invalid.
Add also comment to the code which explain what is the code doing.
Fixes: cc434fccba4c ("Nokia RX-51: Add support for booting kernel in zImage format")
Signed-off-by: Pali Rohár <pali@kernel.org>
My professional e-mail will change and the BayLibre one will
bounce after mid-september of 2022.
This updates the MAINTAINERS files and adds an entry in the
.mailmap file.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Call pkg-config for each library individually.
This improves fallback handling.
Suggested-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: 31a7688cbe0e ("tools: mkeficapsule: use pkg-config to get -luuid and -lgnutls")
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The field, ifname, in efi_disk_obj is set but never used anywhere.
Just remove it.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Explain when devices should get activated.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The ELF U-Boot image produced by qemu-riscv64_smode_defconfig can be
used to boot with QEMU and KVM.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The LS1043ARDB rev v7.0 board replaces the AQR105 PHY on MAC9 with an
AQR113C PHY. The address of the PHY on the MDIO bus changes from 0x1 to
0x8. Enable CONFIG_OF_BOARD_FIXUP and update both u-boot and Linux device
trees to reflect this change.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
caam driver model enabled in spl for secure boot.
fsl_rsa_mod_exp driver enabled in spl for validating uboot image.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Currently message is not intended that prompt end up at the end of debug
line. For example like this:
DFU alt info setting: done
DFU entities configuration failed!
(partition table does not match dfu_alt_info?)
Firmware update failed: <NULL>
Cannot handle a capsule at 10000000Zynq>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This is a preparation patch to provide the unified method
to access udevice pointer associated with the EFI handle
by adding udevice pointer into struct efi_object.
The patch also introduces a helper function efi_link_dev()
to link the udevice and EFI handle.
The EFI handles of both EFI block io driver implemented in
lib/efi_loader/efi_disk.c and EFI block io driver implemented
as EFI payload can access the udevice pointer in the struct efi_object.
We can use this udevice pointer to get the U-Boot friendly
block device name(e.g. mmc 0:1, nvme 0:1) through EFI handle.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Ensure that the string we convert to UTF-16 is NUL terminated even
if the device path only contains end nodes.
Fixes: bd3d75bb0c58 ("efi_loader: multi part device paths to text")
Addresses-Coverity: 350434 ("Uninitialized scalar variable")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This is an attempt to answer the comments provided by Xavier [1].
[1] https://lore.kernel.org/all/Yulcol7HpTHtjXTX@begut/
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add references in the documentation for each entry type, so we can refer
to them from other documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Link to patman's documentation from the doc/ directory so that it appears
in the 'make htmldocs' output.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This was widely used by U-Boot for a long time, but is not used anymore,
with Gitlab and Azure taking over.
Drop the text.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We talk about importing code from other projects in two places. The
first place is in the coding style section, where we explain when to or
not to deviate in terms of white space, etc. In the process
documentation we now add a note about saying where the code was imported
from and to ensure that you do not copy Signed-off-by or other tags.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* describe crashs in UEFI binaries
* provide architechture specific information for the sandbox and RISC-V
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
These typos were found while reading the docs.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
fs_set_blk_dev() probes all file-systems until it finds one that matches
the volume. We do not expect any console output for non-matching
file-systems.
Convert error messages in erofs_read_superblock() to debug output.
Fixes: 830613f8f5bb ("fs/erofs: add erofs filesystem support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Huang Jianan <jnhuang95@gmail.com>
Remove alias 'efi' with invalid data.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Clean up some code with the DH electronics boards, remove a few boards
that have had their removal ack'd, update Azure CI hosts for macOS and
Ubuntu, and migrate a few more symbols to Kconfig.
This driver has not been converted to DM_ETH. The migration deadline
passed 2 years ago.
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: David Feng <fenghua@phytium.com.cn>
Cc: Liviu Dudau <liviu.dudau@foss.arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Heiko Schocher <hs@denx.de>
This converts the following to Kconfig:
CONFIG_FSL_NGPIXIS
CONFIG_SYS_FSL_QMAN_V3
CONFIG_SYS_FSL_RAID_ENGINE
CONFIG_SYS_FSL_RMU
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
CONFIG_SYS_FSL_SRIO_LIODN
CONFIG_SYS_FSL_TBCLK_DIV
CONFIG_SYS_FSL_USB1_PHY_ENABLE
CONFIG_SYS_FSL_USB2_PHY_ENABLE
CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FSL_PCIE_COMPAT
To do this, introduce a choice and option for each of the strings used
and set CONFIG_SYS_FSL_PCIE_COMPAT based on that.
Signed-off-by: Tom Rini <trini@konsulko.com>
We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
And we remove the entries from the README for a number of already
converted items.
Signed-off-by: Tom Rini <trini@konsulko.com>
To reduce code duplication, let the stm32 based DH boards use the common
code for setting up their MAC addresses.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
To reduce code duplication, let the imx8 based DH boards use the common
code for setting up their MAC addresses.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
To reduce code duplication, let the imx6 based DH boards use the common
code for setting up their MAC addresses.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
This is a starting point for unifying duplicate code in the DH board
files. The functions for setting up MAC addresses are very similar for
the i.MX6, i.MX8 and stm32mp1 based boards.
All pre-existing implementations follow the same logic:
(1) Check if ethaddr is already set in the environment
(2) If not, try to get it from a board specific location (e.g. fuse)
(3) If not, try to get it from eeprom
After this commit, (1) and (3) are implemented as common functions,
ready to be used by board specific files.
Furthermore there is an implementation of (2) for imx based boards.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
As per https://github.com/actions/runner-images/issues/6002 the Ubuntu
18.04 image is deprecated and will be removed by December 1, 2022.
Move to the Ubuntu 22.04 image as our base for launching our containers
from.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To quote Simon:
This adds the concept of a VBE method to U-Boot, along with an
implementation of the 'VBE simple' method, basically a simple way of
updating firmware in MMC from userspace and monitoring it from U-Boot.
VBE simple is implemented in fwupd. U-Boot's role is to set up the
device tree with the required firmware-update properties and provide the
developer with information about the current VBE state. To that end this
series includes a new 'vbe' command that allows VBE methods to be listed
and examined.
As part of this work, support for doing FDT fixups via the event interface
is provided, along with the ability to write to the device tree via the
ofnode interface.
Another (significant) change is that bootmeths now have a 'global' flag,
to allow the implementation of EFI bootmgr (and VBE) to be cleaned up.
The 'system' bootdev is no-longer needed and these bootmeths are scanned
first.
Further work is needed to pull everything together, but this is a step
along the way.
Use the sandbox_flattree build to check that everything works correctly
with BOOTMETH_GLOBAL disabled.
Update the tests as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update sandbox to include the VBE bootmeth. Update a few existing tests to
take account of this change, specifically that the new bootmeth now
appears when scanning.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for VBE simple, which permits firmware update of a single
image stored in MMC or another block device.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there is a confusing array of functions that handle the
device tree fix-ups needed for booting an OS. We should be able to switch
to using events to clean this up.
As a first step, create a new event type and call it from the standard
place.
Note that this event uses the ofnode interface only, since this can
support live tree which is more efficient when making lots of updates.
Signed-off-by: Simon Glass <sjg@chromium.org>
This creates static records at present, but it causes a problem with clang
and LTO: the linker list records are sometimes dropped from the image.
Fix this by making the records global.
Update to use __used while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
This was a work-around for the fact that global bootmeths such as EFI
bootmgr and VBE don't use a particular bootdev, or at least select it
themselves so that we don't need to scan all bootdevs when using that
bootmeth.
Drop the system bootdev entirely.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we can separate this out from the normal bootmeths, update the
code to create it always.
We cannot rely on the device tree to create this, since the EFI project
is quite opposed to having anything in the device tree that helps U-Boot
with its processing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Typically we want to find and use global bootmeths first, since they have
the best idea of how the system should boot. We then use normal bootmeths
as a fallback.
Add the logic for this, putting global bootmeths at the end of the
ordering. We can then easily scan the global bootmeths first, then drop
them from the list for subsequent bootdev-centric scans.
This changes the ordering of global bootmeths, so update the
bootflow_system() accordingly.
Drop the comment from bootmeth_setup_iter_order() since this is an
exported function and it should be in the header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function is not called, so tests miss out on any devices
created by it. Add it in so that tests can rely on these extra devices.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for handling this concept in bootflows. Update the 'bootflow'
command to allow only the normal bootmeths to be used. This alllows
skipping EFI bootmgr and VBE, for example.
Signed-off-by: Simon Glass <sjg@chromium.org>
With global bootmeths we want to scan without a bootdev. Update the logic
to allow this.
Change the bootflow command to show the bootdev only when valid.
Signed-off-by: Simon Glass <sjg@chromium.org>
For most testing we don't want this bootmeth to actually do anything. For
the one test where we do, add a test hook to obtain the correct behaviour.
This will allow us to bind the device always, rather than just doing it
for this test.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current way of handling things like EFI bootmgr is a bit odd, since
that bootmeth handles selection of the bootdev itself. VBE needs to work
the same way, so we should support it properly.
Add a flag that indicates that the bootmeth is global, rather than being
invoked on each bootdev. Provide a helper to read a bootflow from the
bootmeth.
Signed-off-by: Simon Glass <sjg@chromium.org>
Avoid using 'count' to mean either a count or an error, since this is
confusing. In fact, the called function never return 0, since that is an
error.
Use 'ret' instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some bootmeths can provide information about what is available to boot.
For example, VBE simple provides access to the firmware state.
Add a new method for this, along with a sandbox test.
Signed-off-by: Simon Glass <sjg@chromium.org>
If the ordering produces no entries, this is an error. Report it, so that
the caller doesn't try to continue with a NULL bootmeth.
This fixes a crash in the bootflow_iter test when running with the sandbox
'default' device tree, instead of the required 'test' one.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some tests go as far as booting a distribution. In this case a menu is
presented to the user, with a two-second timeout. This adds a total of
12 seconds to the test runs at present.
Avoid this by inserting a response using the console-recording feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
In generally it is not permitted to implement an ofnode function only for
flat tree or live tree. Both must be supported. Also the code for
live tree access should be in of_access.c rather than ofnode.c which is
really just for holding the API-conversion code.
Update ofnode_write_prop() accordingly and fix the test so it can work
with flat tree too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add some documentation and a new flag so that we can safely enabled using
the ofnode interface to write to the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this test to use the livetree flag so that special check can be
avoided. Also drop a few blank lines.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present ofnode only works with a single device tree, for the most part.
This is the control FDT used by U-Boot.
When booting an OS we may obtain a different device tree and want to
modify it. Add some initial support for this into the ofnode API.
Note that we don't permit aliases in this other device tree, since the
of_access implementation maintains a list of aliases collected at
start-up. Also, we don't need aliases to do fixups in the other FDT. So
make sure that flat tree and live tree processing are consistent in this
area.
Signed-off-by: Simon Glass <sjg@chromium.org>
The unflattening algorithm results in a single block of memory being
allocated for the whole tree. When writing new properties, these are
allocated new memory outside that block. When the block is freed, the
allocated properties remain.
Document how this works and the potential memory leak, as well as
mentioning that updating the livetree is actually supported now.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is used by a lot of files, but ofnode.h needs to include a lot of
header files. This can create dependency cycles, particularly with
global_data.h which must include various declarations.
Split the core delcarations into a separate file to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rename these to VESA, itself an abbreviation, to avoid a conflict with
Verified Boot for Embedded.
Rename this to avoid referencing VBE.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to use VBE to mean Verfiied Boot for Embedded in U-Boot. Rename
the existing VBE (Vesa BIOS extensions) to allow this.
Verified Boot for Embedded is documented doc/develop/vbe.rst
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a few links to documents about Verified Boot for Embedded (VBE).
These will be expanded as development proceeds.
Signed-off-by: Simon Glass <sjg@chromium.org>
The booting flow is SPL -> OpenSBI -> U-Boot.
The boot hart may change after OpenSBI and may not always be hart0,
so wrap the related branch instruction with M-MODE.
Current DTB setup for XIP is not valid.
There is no chance for CONFIG_SYS_FDT_BASE, the DTB address used
in XIP mode, to be returned. Fix this.
Fixes: 2e8d2f88439d ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Restore global pointer before board_init_f_init_reserve call,
as "a0" can be set in harts_early_init call and we end up with
invalid global pointer.
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Remove the dependency on CMD_PXE from BOOTMETH_DISTRO by introducing a
new hidden kconfig symbol to control whether pxe_utils is compiled,
allowing bootstd's distro method to be compiled without needing
networking support enabled.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Correct build errors when CMD_BOOTM is not enabled:
Signed-off-by: Simon Glass <sjg@chromium.org>
In file included from include/linux/bitops.h:22,
from include/log.h:15,
from include/linux/printk.h:4,
from include/common.h:20,
from lib/lz4_wrapper.c:6:
lib/lz4_wrapper.c: In function ‘ulz4fn’:
include/linux/kernel.h:184:17: warning: comparison of distinct pointer types lacks a cast
(void) (&_min1 == &_min2); \
^~
lib/lz4_wrapper.c:104:18: note: in expansion of macro ‘min’
size_t size = min((ptrdiff_t)block_size, end - out);
^~~
Signed-off-by: Pali Rohár <pali@kernel.org>
When compiling with -Og gcc reports false positive -Wmaybe-uninitialized as
reported in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78394.
Silence these warnings when building with CONFIG_CC_OPTIMIZE_FOR_DEBUG.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The declarations in the header and in the implementation must match.
Reported-by: Sergei Antonov <saproj@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The macros in this file are a little confusing and we currently have no
tests to check that they work as expected.
Add some tests which check the macros in C code. Add a few tests which
check that the build errors are generated correctly too, using buildman's
-a option.
Signed-off-by: Simon Glass <sjg@chromium.org>
This patch is fixing a broken boot observed on stm32mp157c-dk2 board.
IS_ENABLED macro should be used to check if a compilation flag is set
to "y" or "m".
LMB_MEMORY_REGIONS is set to a numerical value, IS_ENABLED macro is not
suitable in this case.
Fixes: 7c1860fce4e3 ("lmb: Fix lmb property's defination under struct lmb")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This makes use of makefile variables that don't exist anymore. Fix it and
also remove the object files in that directory.
Also add FORCE as a dependency as required by the if_changed macro.
Fixes 354d2324635 ("Makefile: Remove old of-platdata files before regenerating")
Reported-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Commit 44645f87de5 ("mmc: Fix mmc_switch excessive timeout") introduced
a side effect where CMD13 SEND_STATUS is issued in case mmc_wait_dat0()
does not return -ENOSYS and $send_status is not set. This happens on all
hardware which does implement .mmc_wait_dat0 callback, e.g. i.MX8M .
This leads to lengthy timeout before booting OS in case of eMMC in one
of the HS200/HS400 modes, since the card cannot respond to CMD13 while
downgrading from HS200/HS400 to regular HS mode.
Fix this by adding the missing conditional.
Fixes: 44645f87de5 ("mmc: Fix mmc_switch excessive timeout")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Kirill Kapranov <kirill.kapranov@compulab.co.il>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Fix a bug that the --processes option was ignored, thus resulting in no
test coverage information being generated.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 42ae363ddd9 ("dtoc: Update fdt tests to use test_util")
Pass the options args in rather than using the global variables. Use snake
case, fix up comments and use a ternary operator to make pylint happy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Pass the options args in rather than using the global various. Use snake
case and fix up comments to make pylint happy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Release PERST# signal via GPIO when "reset-gpios" is defined in device tree.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
In more cases group name consist of function name followed by function
number. So if function name is just prefix of group name, show group name.
So in 'pinmux status -a' command output would be visible also extended
function number, which is useful for debugging.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
All 3 MPP pins (20, 21 and 22) can be configured individually and also can
be configured to GPIO functions. Fix definitions for these MPP pins in
existing pin groups. After this change GPIO function can be enabled just
for one of these 3 pins.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The last user of this driver was removed in commit dee08b1999e2 ("arm:
Remove gplugd board"). Remove the unused driver.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Pali Rohár <pali@kernel.org>
DM_GPIO was already enabled so the MVEBU_GPIO was already available.
Disable KIRKWOOD_GPIO as it was unnecessary.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
When booting a fresh board having a random Ethernet address enables
using the network device to program the board.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
DM_GPIO was already enabled so the MVEBU_GPIO was already available.
Having updated the board code to use the DM_GPIO APIs the KIRKWOOD_GPIO
driver became unnecessary. Disable it for SBx81LIFKW.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
For debugging it is convenient to query/access GPIOs from the command
line.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Update mv88e61xx_hw_reset() to use the DM_GPIO API to toggle the reset
line for the linkstreet switch.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Replace code that accessed the GPIO registers directly with code that
makes use of the LED_GPIO driver.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Move U-Boot specific device tree property u-boot,dm-pre-reloc into U-Boot
specific device tree include file armada-38x-controlcenterdc-u-boot.dtsi.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Move U-Boot specific device tree property u-boot,dm-pre-reloc into U-Boot
specific device tree include file armada-xp-theadorable-u-boot.dtsi.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Replace it by including of mvebu-u-boot.dtsi file. When board does not use
-u-boot.dtsi then mvebu-u-boot.dtsi is included automatically by makefile
scripts/Makefile.lib.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Set u-boot,dm-pre-reloc for /soc/, /soc/internal-regs/ and &uart0 nodes as
it is required on every 32-bit Armada SoCs. And set also u-boot,dm-pre-reloc
for &spi0 when going to boot from SPI because otherwise SPL SPI drivers do
not load.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
64-bit Armada DTS files are not build correctly during compilation of
32-bit Armada boards and vice versa. So fix makefile build system to
compile only those dts files which are compatible for the current build
(64-bit Armada DTS files only for 64-bit builds and 32-bit Armada DTS files
only for 32-bit builds).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Some new Omnia boards will come with Winbond SPI flash. Add to
defconfig.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
BootROM boot method should always work so always add it as fallback method
to spl_boot_list. In case U-Boot SPI driver fails it is better to try using
BootROM than hanging as by default only one boot method is specified.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Linux kernel DTS files renamed spi-nor@0 node to flash@0 which effectively
broke U-Boot to boot new Linux kernel versions correctly.
So remove hardcoded spi-nor device tree path from Turris Omnia board code
and replace it by searching for mtd node by compatible string.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
CMD_GENERAL_CONTROL takes two 8-bit arguments but CMD_EXT_CONTROL takes
two 16-bit arguments. Fix this issue and change CMD_EXT_CONTROL arguments
to 16-bit.
Fixes: 5e4d24ccc115 ("gpio: Add Turris Omnia MCU driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Sometimes fixup_mtd_partitions() prints during booting kernel error
"Failed fixing SPI NOR partitions!" because it does not have enough space
for creating all paritions nodes. So increase fdt size.
Fixes: 92f36c8e74c1 ("arm: mvebu: turris_omnia: fixup MTD partitions in Linux' DTB")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <kabel@kernel.org>
All partitions are created by fixup_mtd_partitions() function, so they do
not have to exist just for their removal need.
Fixes: 92f36c8e74c1 ("arm: mvebu: turris_omnia: fixup MTD partitions in Linux' DTB")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <kabel@kernel.org>
New Turris Omnia HW board revision requires that software controls
peripheral reset signals, namely PERST# signals on mPCIe slots, ethernet
phy reset and lan switch reset. Those pins are connected to MCU controlled
by MCU i2c API as GPIOs. On new HW board revision those pins stay in reset
after board reset and software has to release these peripherals from reset
manually. MCU announce this requirement by FEAT_PERIPH_MCU bit in
CMD_GET_FEATURES command.
On older HW board revisions when FEAT_PERIPH_MCU is not announced, all
those reset signals are automatically released after board finish reset.
Detect FEAT_PERIPH_MCU bit in board_fix_fdt() and ft_board_setup()
functions and insert into device tree blob pcie "reset-gpios" and eth phy
"phy-reset-gpios" properties with corresponding MCU gpio definitions.
PCIe and eth PHY drivers then automatically release resets during device
initialization. Both U-Boot and Linux kernel drivers support those device
tree reset properties.
Initialization of lan switch on new HW board revision is more complicated.
Switch strapping pins are shared with switch RGMII pins. And strapping pins
must be in specific configuration after releasing switch reset. Due to pin
sharing, it is first required to switch A385 side of switch pins into GPIO
mode, set strapping configuration, release switch from reset and after that
switch A385 pins back to RGMII mode.
Because this complicated setup is not supported by switch DSA drivers and
cannot be expressed easily in device tree, implement it manually in SPL
function spl_board_init(). So in proper U-Boot and OS/kernel would be lan
switch initialized and be in same configuration like it was on old HW board
revisions (where reset sequence did those steps at hardware level).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <kabel@kernel.org>
Different Turris Omnia HW board revisions contains different MCU.
Show type in show_board_info() to easily identify which MCU is populated.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <kabel@kernel.org>
After checking with Ramon, take a number of reviewed network patches.
This includes:
- A number of dwc_eth_qos updates, mpc8xx_fec DM migration, NPCM7xx EMAC
driver.
- Other assorted minor updates
UniPhier LD20, PXs2 and PXs3 boards have ethernet phy that has RX/TX delays
of RGMII interface using pull-ups on the RXDLY and TXDLY pins.
So should set the phy-mode to "rgmii-id" to show that RX/TX delays are
enabled.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This allows you to specify the type of rgmii-id that will enable phy
internal delay in ethernet phy-mode.
This adds all RGMII cases to all of get_pinmode() except LD11, because LD11
SoC doesn't support RGMII due to the constraint of the hardware. When RGMII
phy mode is specified in the devicetree for LD11, the driver will abort
with an error.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
We check if phydev is NULL. Only but if it is non-NULL we set one
component of phydev. But even if it is NULL we set another. We should not
dereference NULL in either case.
Fixes: e24b58f5ed4f ("net: phy: don't require PHY interface mode during PHY creation")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reorder include files in the U-Boot expected order.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The convinience functions are not that small and they caused
bloated text segments because of their usage.
There was no need to inline them in the first place, as
they're not part of a fastpath.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Previously we'd been using a device name retrieved via
ftgmac100_data->phydev, but the mdio read/write functions may be
called before that member is initialized in ftgmac100_phy_init(),
leading to a NULL pointer dereference while printing the error message
issued if the mdio access fails. We can instead use bus->name, which
is already available at that point.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Fixes: 538e75d3fc54 ("net: ftgmac100: add MDIO bus and phylib support")
Reviewed-by: Cédric Le Goater <clg@kaod.org>
NPCM750 provides identical ethernet MAC controllers for WAN/LAN applications.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Only two boards in the tree set the macro DWC_NET_PHYADDR. Both have
CONFIG_DM_ETH_PHY=y, so should set the phy address in DT if necessary.
The imx8mp_evk does set the correct address in device tree.
The other board seems to be a copy-paste-adapt from an old
version of the imx8mp_evk config header, given the "#ifdef
CONFIG_DWC_ETH_QOS" block that has been removed from imx8mp_evk header
in commit 127fb454955. Its device tree doesn't even enable (i.e., set
'status = "okay"') the &eqos node. But the other ethernet device,
&fec, does get enabled, and does have a phy sitting at address 4 (and
it also has a corresponding legacy #define CONFIG_FEC_MXC_PHYADDR
4). So I believe it should be completely safe to remove it from there
as well.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
[trini: Re-apply to top of tree, update imx93_evk.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
I have an iMX8MP with a ti,dp83867 phy in front of the eqos
interface. The phy is Gbit capable - however, the C and D differential
pairs are not physically routed to the RJ45 connector. So I need to
prevent the phy from advertising 1000Mbps.
The necessary code is almost already there in the form of a
phy_set_supported() call in eqos_start(), but the max-speed DT
property is currently only parsed in
eqos_probe_resources_stm32(). Lift that parsing to eqos_probe().
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Not only does eqos_remove() fail to free the buffers that have been
allocated by eqos_probe_resources_core(), it repeats those allocations
and thus drops twice as much memory on the floor.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Assign packet pointer only in case the MAC reports anything in the FIFO.
In case the MAC indicates empty FIFO, return 0 to pass that information
to the network stack.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This patch adds basic support for the Marvell 88E1240 PHY.
This will be used by the upcoming ethernet support addition for the
Marvell MIPS Octeon EBB7304 platform.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch adds support for the "marvell,reg-init" DT property, which
is used to describe board specific Marvell PHY register configurations
in the board dts file. This DT property is supported in the Linux Kernel
since a longer time. Adding it to U-Boot now, enables the boards which
describe the register settings in their DT files here as well.
I've included calling this marvell_of_reg_init() to all foo_config()
functions in this patch as well. If CONFIG_DM_ETH is not set, there is
no ofnode, or no "marvell,reg-init" property, the PHY initialization is
unchanged.
The function marvell_of_reg_init() is a port of the Linux version.
Please note that I explicitly did not add error checking and handling
to the U-Boot version, as this is basically not done for phy_read/write
in this Marvell PHY code.
This will be used by the upcoming ethernet support on the MIPS
Octeon EBB 7304 board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
to adjust the root path length.
Eg to 256 from Linux Kernel
Signed-off-by: Andre Kalb <andre.kalb@sma.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
[trini: Guard extern so that !CONFIG_NET platforms will build]
Signed-off-by: Tom Rini <trini@konsulko.com>
All `sm efuseread/efusewrite` commands exit with an error, even if the fuse
have actually been dealt with correctly.
This is because the smc call return the size it actually processed but this
result is checked against 0.
Return failure in do_efuse_read/write if the return value of
meson_sm_read/write_efuse() is not the requested size.
Fixes: 52195ba5f579 ("ARM: amlogic: add sm efuse write support and cmd for read/write efuse")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220804144138.33809-1-jbrunet@baylibre.com
To quote Simon:
This series drops the need for the genboardscfg.py script, so that the
boards.cfg file is produced (and consumed) entirely within buildman. The
file is not entirely removed since it does have some uses and we need some
sort of cache for the information. The genboardscfg.py script is
effectively incorporated in buildman.
It also improves operation from an IDE with a new -I option and fixes up
some of the pylint warnings in buildman.
Finally, this series also fixes a bug which allows use to drop support for
CONFIG_SYS_EXTRA_OPTIONS which is long-standing desire. It also fixes a
minor bug that causes 'Invalid line' spam when checking for function bloat
with the -B option.
Buildman now uses worktrees when available, instead of doing a full clone.
This was done in this commit:
76de29fc4f buildman: Use git worktrees instead of git clones when possible
Drop the TODO.
Signed-off-by: Simon Glass <sjg@chromium.org>
The 'nm' tool can produce lines without a symbol, for example:
00000004 t
Silently skip these and anything else without three fields. Drop the
warning since there is nothing the user can do about it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
Now that buildman can generate this with the -R option, drop the script.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Use the equivalent buildman functionality to check maintainer info.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This is not needed now that CONFIG_SYS_TARGET_NAME is correctly determined
when scanning Kconfig.
This reverts commit 25b8acee2ea11a9edc100c42a61f5d6187eb6167.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This appears in boards.cfg but we want to remove it. Drop support for
generating it and reading it. Detect an old boards.cfg file that has
this field and regenerate it, to avoid problems.
Instead, add the config name in that place. This fixes a subtle bug in
the generation code, since it uses 'target' for the config name and then
overwrites the value in scan() by setting params['target'] to the name
of the defconfig. The defconfig name is not the same as the
SYS_CONFIG_NAME variable.
With this change, we still have the config name and it can be searched
by buildman, e.g. with:
buildman -nv sun5i
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
Bring this tool into buildman, so we don't have to run it separately. The
board.cfg file is still produced as part of the build, to save time when
doing another build in the same working directory. If it is out of date
with respect to the Kconfig, it is updated.
Time to regenerate on a recent single-thread machine is 4.6s (1.3s on a
32-thread machine), so we do need some sort of cache if we want buildman
to be useful on incremental builds. We could use Python's pickle format
but:
- it seems useful to allow boards.cfg to be regenerated, at least for a
while, in case other tools use it
- it is possible to grep the file easily, e.g. to find boards which use
a particular SoC (similar to 'buildman -nv <soc>'
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Use a separate file for the Boards class so that its name matches the
module name.
Fix up the function names to match the pylint style and fix some other
warnings.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to create a module called 'boards' so avoid use of this variable
name in this module. Change the global to be capitalised, as required by
Python style.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to create a module called 'boards' so avoid use of this variable
name in this module. Change the global to be capitalised, as required by
Python style.
Signed-off-by: Simon Glass <sjg@chromium.org>
We have a module called 'board'. Sometimes buildman uses 'brd' as an
instance variable but sometimes it uses 'board', which is confusing and
can mess with the module handling. Update the code to use 'brd'
consistently, making it easier for tools to determine when the module
is being referenced.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a flag to allow buildman to behave properly for use from an IDE. This
shows error/warning output on stderr and drops all summary and progress
information.
This should normally only be used when building a single board.
Fix up a confusing comment for GetResultSummary() while we are here, since
we want to use the Outcome object to access the unprocessed error lines
from the build.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_SYS_FSL_CORES_PER_CLUSTER
As part of this, correct the dependencies on SYS_FSL_THREADS_PER_CORE.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FSL_CCSR_GUR_BE
CONFIG_SYS_FSL_CCSR_SCFG_BE
CONFIG_SYS_FSL_ESDHC_BE
CONFIG_SYS_FSL_IFC_BE
CONFIG_SYS_FSL_PEX_LUT_BE
CONFIG_SYS_FSL_CCSR_GUR_LE
CONFIG_SYS_FSL_CCSR_SCFG_LE
CONFIG_SYS_FSL_ESDHC_LE
CONFIG_SYS_FSL_IFC_LE
CONFIG_SYS_FSL_PEX_LUT_LE
Signed-off-by: Tom Rini <trini@konsulko.com>
There are a large number of options under CONFIG_SYS (but some of these
are elsewhere, spotted while cleaning CONFIG_SYS) that are never
referenced, or only used slightly later in the config file. Remove or
restructure these.
Signed-off-by: Tom Rini <trini@konsulko.com>
A large number of files include <flash.h> as it used to be how various
SPI flash related functions were found, or for other reasons entirely.
In order to migrate some further CONFIG symbols to Kconfig we need to
not include flash.h in cases where we don't have a NOR flash of some
sort enabled. Furthermore, in cases where we are in common code and it
doesn't make sense to try and further refactor the code itself in to new
files we need to guard this inclusion.
Signed-off-by: Tom Rini <trini@konsulko.com>
As the only pic32 platform does not enable flash, this is dead code.
Remove it.
Cc: Purna Chandra Mandal <purna.mandal@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FLASH_ERASE_TOUT
CONFIG_SYS_FLASH_LOCK_TOUT
CONFIG_SYS_FLASH_UNLOCK_TOUT
CONFIG_SYS_FLASH_WRITE_TOUT
In practice, for two m68k platforms we move to hard-coding with a
comment the timeout values, rather than try and make convoluted Kconfig
logic. We add options for the write and erase options to the pic32
flash driver, as this driver does make use of them. Everywhere else
these are unreferenced values.
Signed-off-by: Tom Rini <trini@konsulko.com>
All platforms today define CONFIG_SYS_DDR_RAW_TIMING, so drop the code
for this option being unset.
Cc: Qiang Zhao <qiang.zhao@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This is the only platform defining and using CONFIG_SYS_MEM_SIZE, switch
to using CONFIG_SYS_SDRAM_SIZE for consistency.
Cc: Paul Burton <paul.burton@mips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
We have a number of CONFIG_SYS_xxx_SIZE options to describe the amount
main memory available. Rework CONFIG_SYS_DDR_SIZE, which described a
size in number of MiB to use CONFIG_SYS_SDRAM_SIZE which is most often
used as a number of bytes. Use shifts of this option when required.
Signed-off-by: Tom Rini <trini@konsulko.com>
No platforms enable the functionality to tftp directly to NOR flash, and
this is discouraged by the documentation. Remove this code. Further,
this highlights an oddity of the code. Un-indent the start of this
function.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Instead of hardcoding -ltinfo as the flags needed to build
kwboot, use pkg-config when available.
We gracefully fallback on the previous behavior of hardcoding -ltinfo
if pkg-config is not available or fails with an error.
Reviewed-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Instead of hardcoding -luuid -lgnutls as the flags needed to build
mkeficapsule, use pkg-config when available.
We gracefully fallback on the previous behavior of hardcoding -luuid
-lgnutls if pkg-config is not available or fails with an error.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
If the device is a GP and we detect a signing certificate then remove it.
It would fail to authenticate otherwise as the device is GP and has no
secure authentication services in SYSFW.
This shouldn't happen often as trying to boot signed images on GP devices
doesn't make much sense, but if we run into a signed image we should at
least try to ignore the certificate and boot the image anyway. This could
help with users of GP devices who only have HS images available.
If this does happen, print a nice big warning.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
We can skip the image authentication check at runtime if the device is GP.
This reduces the delta between GP and HS U-Boot builds. End goal is
to re-unify the two build types into one build that can run on all
device types.
Signed-off-by: Andrew Davis <afd@ti.com>
On HS-FS devices signing boot images is optional. To ease use
we check if we are HS-FS and if no certificate is attached
to the image we skip the authentication step with a warning
that this will fail when the device is set to security enforcing.
Signed-off-by: Andrew Davis <afd@ti.com>
K3 SoCs are available in a number of device types such as
GP, HS-FS, EMU, etc. Like OMAP SoCs we can detect this at runtime
and should print this out as part of the SoC information line.
We add this as part of the common.c file as it will be used
to also modify our security state early in the device boot.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Since commit 2a7360666871 ("serial: Rename SERIAL_SUPPORT to SERIAL")
SPL_SERIAL_SUPPORT is named SPL_SERIAL. So let's update the comment to
point to the correct Kconfig option in the comment of VPL_SERIAL.
Fixes: 747093dd408 ("vpl: Add Kconfig options for VPL")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since commit 103c5f180694 ("mmc: Rename MMC_SUPPORT to MMC"),
SPL_MMC_SUPPORT is named SPL_MMC, so let's fix the ifdef.
Fixes: fbc6b1414342 ("imx: imx8mp_rsb3720a1: convert to DM_SERIAL")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
SPL_GPIO_SUPPORT is named SPL_GPIO since commit 83061dbd1c89 ("Rename
GPIO_SUPPORT to GPIO"), SPL_MMC_SUPPORT is named SPL_MMC since commit
103c5f180694 ("mmc: Rename MMC_SUPPORT to MMC"), SPL_SERIAL_SUPPORT is
named SPL_SERIAL since commit 2a7360666871 ("serial: Rename
SERIAL_SUPPORT to SERIAL") so let's select the correct Kconfig options.
Fixes: 8b71576f3842 ("mx7ulp_com: add support for SPL")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Since commit 83061dbd1c89 ("Rename GPIO_SUPPORT to GPIO"),
SPL_GPIO_SUPPORT has been renamed to SPL_GPIO, meaning that SPL_GPIO_HOG
can never be enabled.
Let's fix this by using the proper name for the Kconfig option.
Fixes: 1d99e673c752 ("gpio: Enable hogging support in SPL")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If 'extension apply all' is executed and no extension is found, the return
value of do_extension_apply() is undefined. Return CMD_RET_FAILURE in this
case.
Fixes: 2f84e9cf06d3 ("cmd: add support for a new "extension" command")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Kory Maincent <kory.maincent@bootlin.com>
When attempting to load images from multiple MMC devices in sequence,
spl_mmc_load() chooses the wrong device from the second attempt onwards.
The reason is that MMC initialization is only done on its first call and
spl_mmc_load() will then continue using this same device for all future
calls.
Fix this by checking the devnum of the "cached" device struct against
the one which is requested. If they match, use the cached one but if
they do not match, initialize the new device.
This fixes specifying multiple MMC devices in the SPL's boot order to
fall back when U-Boot Proper is corrupted or missing on the first
attempted MMC device.
Fixes: e1eb6ada4e38 ("spl: Make image loader infrastructure more universal")
Signed-off-by: Harald Seiler <hws@denx.de>
Some setups do not use Xen hypervisor console for logging, e.g. they
use emulated PL011 hardware or shared peripherals (real UART). In such
cases Xen HVC will be disabled on a build time and will cause issues in
current driver implementation.
This commit fixes build issues in Xen event channel driver, caused
by absense of console event channel, that is not available when console
config is disabled. Now console related code will be removed when
Xen HVC is turned off.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Reviewed-by: Anastasiia Lukianenko <vicooodin@gmail.com>
Reviewed-by: Anastasiia Lukianenko <vicooodin@gmail.com<mailto:vicooodin@gmail.com>>
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com<mailto:dmytro_firsov@epam.com>>
The source code contains an error:
- argv[2] contains <channel> arg, variable for env_set is in argv[3]
- number of args is 4
Revert 54d24d72601321f4470c4edf31c6b29adae424a7
cmd: simplify do_adc_single()
Fixes 9de612ae4ded53f742f5f99929c06d0839471ced
cmd: adc: Add support for storing ADC result in env variable
Reviewed-by: Simon Glass <sjg@chromium.org>
To work correctly, this driver depends on SYSCON to get the base address
from the parent dts node.
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
The 'rng' command dumps a number of random bytes on the console. Add a
set of tests for the 'rng' command. The test function performs basic
sanity testing of the command.
Since a unit test is being added for the command, enable it by default
in the sandbox platforms.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Use a statically allocated buffer on stack instead of using malloc for
reading the random bytes. Using a local array is faster than
allocating heap memory on every initiation of the command.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The 'rng' u-boot command is used for printing a select number of
random bytes on the console. Currently, the RNG device from which the
random bytes are read is fixed. However, a platform can have multiple
RNG devices, one example being qemu, which has a virtio RNG device and
the RNG pseudo device through the TPM chip.
Extend the 'rng' command so that the user can provide the RNG device
number from which the random bytes are to be read. This will be the
device index under the RNG uclass.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The TPM device comes with the random number generator(RNG)
functionality which is built into the TPM device. Add logic to add the
RNG child device in the TPM uclass post probe callback.
The RNG device can then be used to pass a set of random bytes to the
linux kernel, need for address space randomisation through the
EFI_RNG_PROTOCOL interface.
No compatible string is provided because this is not available in
the binding defined by Linux. If multiple rand devices are in the
system, then some method of selecting them (other than device tree)
will need to be used, or a binding will need to be added.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The TPM device has a builtin random number generator(RNG)
functionality. Expose the RNG functions of the TPM device to the
driver model so that they can be used by the EFI_RNG_PROTOCOL if the
protocol is installed.
Also change the function arguments and return type of the random
number functions to comply with the driver model api.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Due to U-Boot's lazy binding the RNG presented by the TCG is not available
until the EFI_TCG2 protocol has been initialized. Since the TPM has a
built-in RNG device we can use for the OS randomization, move the RNG
protocol installation after the TCG.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
These functions should really be available outside the TPM code, so that
other callers can find out which version the TPM is. Rename them to have
a tpm_ prefix() and add them to the header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
After a discussion with Tom Rini, we've agreed that I am going to take
over custodianship of the MPC85XX platform, since it seems other people
do not have necessary interest or time and getting things done over
there takes too long.
Since I am only working on one MPC85XX board, Turris 1.x, and do not
have time to do thorough reviews of patches for this entire platform
(other than those concerning Turris 1.x board), for other boards I will
only run patches through CI and checkpatch, and then send them via PR
upwards to Tom.
Signed-off-by: Marek Behún <kabel@kernel.org>
Acked-by: Tom Rini <trini@konsulko.com>
Documentation:
* Detail how configuration signatures are calculated
* Further expand on Image locations and provide example
* Describe system configuration
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Merge tag 'doc-2022-10-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for doc-2022-10-rc2
Documentation:
* Detail how configuration signatures are calculated
* Further expand on Image locations and provide example
* Describe system configuration
Start by describing in general the best practices for how to implement
configuration of some aspect of U-Boot. This generally means finding
the right choices for when something should be static or dynamically
configured and enabled. Then further document when to use CONFIG or CFG
namespaces for static configuration.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Describe exactly which bytes are hashed and in what order
when signing a configuration.
Signed-off-by: Martin Bonner <martingreybeard@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Start by elaborating on what some of our constraints tend to be with
image location values, and document where these external constraints
can come from. Provide a new subsection, an example based on the TI
ARMv7 OMAP2PLUS families of chips, that gives sample values and explains
why we use these particular values. This is based on what is in
include/configs/ti_armv7_common.h as of fb3ad9bd923d ("TI: Add, use a
DEFAULT_LINUX_BOOT_ENV environment string") as this contains just the
values referenced in this document now and not some of the further
additions that are less generic.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin,
which is routed to CN11 pin header, is documented as SPI CS1, but
MPP[26] pin does not support this function. Instead it controls chip
select 2 if in "spi0" mode.
Fix the name of the pin node in pinctrl node and fix the comment in SPI
node.
Signed-off-by: Marek Behún <kabel@kernel.org>
* Add SPDX-License-Identifier
* Add SFP and LED nodes
* Fix PHY nad NOR nodes
* Remove duplicates from u-boot.dtsi file
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Linux kernel uses compatible string "marvell,armada370-nand-controller" for
nand controllers on Armada 370/XP/38x. U-Boot currently uses mix of
"marvell,armada370-nand" and "marvell,mvebu-pxa3xx-nand".
So unify it and use just Linux kernel compatible string.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Now when CONFIG_SYS_TEXT_BASE has sane value, use it for calculation of
other SPL offset values: CONFIG_SPL_MAX_SIZE, CONFIG_SYS_MMC_U_BOOT_* and
CONFIG_SYS_SPI_FLASH_U_BOOT_* macros.
No functional change.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
On some boards upper 4 bits of i2c boot input data (register 0) are
inverted. Information which bits are inverted is stored in register 2.
So invert read input data back according to register 2 prior processing
them. This fixes printing "rom_loc: value" line during booting.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
U-Boot for initial L2 SRAM uses L2 memory-mapping mode and not L2 with
locked lines. P2020 reference manual about L2 memory-mapping mode says:
Accesses to memory-mapped SRAM are cacheable only in the corresponding
e500 L1 caches.
So there is no need to set Caching-Inhibit I-bit for second part of initial
L2 SRAM mapping in TLB entry. Remove it. First part of initial L2 SRAM
mapping already does not have I-bit set.
For more details see also:
https://lore.kernel.org/u-boot/20220508150844.qqxg452rs4wtf5bs@pali/
Signed-off-by: Pali Rohár <pali@kernel.org>
QorIQ U-Boot binary for SD card booting compiled during build process
(either u-boot.bin or u-boot-with-spl.bin) cannot be directly loaded by
QorIQ pre-PBL BootROM. Compiled U-Boot binary first needs to be processed
by Freescale boot_format tool as described in doc/README.mpc85xx-sd-spi-boot
BootROM requires that image on SD card must contain special boot sector.
Implement support for generating this special boot sector directly in
U-Boot start code. Boot sector needs to be at the beginning of the image,
so when compiling only proper U-Boot without SPL then it needs to be in
proper U-Boot. When compiling SPL with proper U-Boot then it needs to be
only in SPL.
Support can be enabled by a new config option FSL_PREPBL_ESDHC_BOOT_SECTOR.
Via other two additional options FSL_PREPBL_ESDHC_BOOT_SECTOR_START and
FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA it is possible to tune how final U-Boot
image could be stored on the SD card.
Signed-off-by: Pali Rohár <pali@kernel.org>
Negative return value from cmd main function cause U-Boot to print criplic
error message: exit not allowed from main input shell.
Set return value on error to 1.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Armada 3700 BootROM supports also images with sha512 checksums and
mox-imager tool [1] generates such bootable images. Without sha512 support
U-Boot bubt command just prints error message:
Error: Unsupported hash_algorithm_id = 64
Error: Image header verification failed
This patch adds support for sha512 checksum validation for Armada 3700
images. With it bubt prints:
Image checksum...OK!
[1] - https://gitlab.nic.cz/turris/mox-boot-builder.git
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
net_loop() returns signed int type and negative value represents error.
tftp_read_file() returns unsigned size_t type and zero value represents
error. Casting signed negative value to unsigned size_t type cause losing
information about error and bubt thinks that no error happened, and
continue erasing SPI-NOR which cause malfunction device.
Fix this issue by correctly propagating failure during tftp transport.
With this change when there is no eth link, bubt does not erase SPI-NOR
anymore.
=> bubt
Burning U-Boot image "flash-image.bin" from "tftp" to "spi"
ethernet@30000 Waiting for PHY auto negotiation to complete......... TIMEOUT !
ethernet@30000: No link.
Error: Failed to read file flash-image.bin from tftp
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Current image type verification code is specific to 32-bit Armada SoCs but
used only for Armada 38x. Implement image type verification for Armada 3700
and enable Armada 38x image verification for all 32-bit Armada SoCs.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This driver registers GPIO controller and allows U-Boot to control GPIO
pins on MCU which is connected to Turris Omnia via i2c.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Current pin control driver applies SDHCI PHY MUX selection
when board DT calls for eMMC function on MPP wires.
However, for CP side eMMC, only the "armada-8k-cpm-pinctrl"
compatibility string is taken into account, which causes
CP-SDHCI on Armada-7K boards to fail.
This patch adds "armada-7k-pinctrl" compatibility string
handling for the CP-SDHCI PHY configuration case.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
These functions are required for 'pinmux status -a' command to print
current configuration of each MPP pin.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
To automatically enable GPIO functionality of some MPP pin, it is required
to implement .gpio_request_enable and .gpio_disable_free callbacks in
pinctrl driver and set .request and .rfree callbacks in GPIO driver to
pinctrl_gpio_request / pinctrl_gpio_free functions.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently bank name is just one alphabetical letter.
Change it to mvebu and number.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Device tree property "ngpios" contains number of gpios.
Use it when available.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
To use particular pin GPIO, it needs to be first switched to GPIO by
pinctrl. Use pinctrl_gpio_request() and pinctrl_gpio_free() for this
purpose.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This change allows to use pinctrl_gpio_request() function as a direct
pointer for dm_gpio_ops's .request callback.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This allows U-Boot mvebu-gpio.c driver to switch particular MPP pin into
GPIO mode and enable GPIO support.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This new Armada 38x driver is based on Linux kernel driver. It can set any
pin to any valid function specified in DT like Linux kernel, it provides
support for 'pinmux status -a' command and also for pinctrl_gpio_request().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This new function pinctrl_generic_set_state_prefix() behaves like
pinctrl_generic_set_state() but it takes third string argument which is
used as the prefix for each device tree string property.
This is needed for Marvell pinctrl drivers, becase Linux device tree files
have pinmux properties prefixed by "marvell," string.
This change allows to use generic U-Boot pinctrl functions for Armada 38x
pinctrl driver without need to copy+paste of the majority U-Boot pinctrl
code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
start of test for fdt command
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Merge tag 'dm-pull-26jul22' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm.git
minor dm- and fdt-related fixes
start of test for fdt command
sandbox_defconfig builds the PCI MMC driver. It should be possible to
build the sandbox without ACPI support.
ACPI support in the PCI MMC driver is only needed when creating an ACPI
table. Fix building with ACPIGEN=n.
Fixes: dba7ee419d9d ("acpi: mmc: Generate ACPI info for the PCI SD Card")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
add arguments for mmc wp to assign which boot partition to protect.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Add features to write protect single boot area rather than all boot
areas.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Only newer eSDHC controllers set PRSSTAT_SDSTB flag. So do not wait until
flag PRSSTAT_SDSTB is set on old pre-2.2 controllers. Instead sleep for
fixed amount of time like it was before commit 6f883e501b65 ("mmc:
fsl_esdhc: Add emmc hs200 support").
This change fixes error 'Internal clock never stabilised.' which is printed
on P2020 board at every access to SD card.
Fixes: 6f883e501b65 ("mmc: fsl_esdhc: Add emmc hs200 support")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
In order to have the possibility to configure the regulators at system
startup through DM support, all LDOs and bucks must be able to be
changeable. Currently there is a limitation to change the values when
the output is enabled. Since the driver is based on the ROHM BD71837 and a
comment that describes a limitation about switching while the output is
enabled can also be found there, the limitation probably comes from this type.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
The generic ARM relocate_code function was using its own function entry
point as a relocation base, and it was obtaining that address by using
the "adr" instruction on that entry point label.
However that label is not just an ordinary label, instead we explicitly
mark it as a function start address. Normally that doesn't change much
(other than for debugging), but when assembled in Thumb mode, newer
versions of the GNU assembler prepare everything for this address being
used as the argument to a "bx" call, so make sure bit 0 is set in there
to mark this function as Thumb code. Of course this doesn't end up very
well when we use this address for the ensuing memcpy operation.
To avoid this problem, and to solve it in a robust way, add an extra
label, which is not marked as a function entry, and use that for the adr
instruction. This lets all assemblers generate the right immediate offset
in the "adr" instruction.
This fixes in particular ARMv7-M ports when using GNU binutils v2.37 or
newer (commit d3e52e120b68 seems to trigger the change in behaviour).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Jesse Taube <mr.bossman075@gmail.com>
fpga:
- Convert SYS_FPGA_CHECK_CTRLC and SYS_FPGA_PROG_FEEDBACK to Kconfig
- Add support for secure bitstream loading
spi:
- xilinx_spi: Add support for memopers and supports_op
- zynq_qspi: Add support for supports_op/child_pre_probe
- zynq_qspi: Fix dummy cycle and qspi speed calculations
xilinx:
- Get rid of #stream-id-cells
- Use fixed partitions for SOM
- Add support for UUID reading from FRU
- Use strlcpy instead of strncpy
- Add reset driver support for ZynqMP and Versal
- Enable power domain driver in ZynqMP and Versal
zynqmp:
- Do no place BSS at 0 which have issue with NULL pointer
- Enable SLG gpio driver
- Disable LMB for mini configurations
- Remove duplicate PMIO_NODE_ID_BASE macro
versal:
- Add xlnx-versal-resets.h header
mmc:
- zynq_sdhci: Fix macro for MMC HS
relocate-rela:
- Fix support for BE hosts
- Define all macros for e_machine and reloc types
misc:
- Get rid of guard macros from ARM and RISC-V
lmb:
- Add support for disabling LMB
serial:
- zynq: Fix baudrate calculation
tests:
- Mark bind tests to run only on sandbox
- List also dm uclass and devres
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Merge tag 'xilinx-for-v2022.10-rc2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.10-rc2
fpga:
- Convert SYS_FPGA_CHECK_CTRLC and SYS_FPGA_PROG_FEEDBACK to Kconfig
- Add support for secure bitstream loading
spi:
- xilinx_spi: Add support for memopers and supports_op
- zynq_qspi: Add support for supports_op/child_pre_probe
- zynq_qspi: Fix dummy cycle and qspi speed calculations
xilinx:
- Get rid of #stream-id-cells
- Use fixed partitions for SOM
- Add support for UUID reading from FRU
- Use strlcpy instead of strncpy
- Add reset driver support for ZynqMP and Versal
- Enable power domain driver in ZynqMP and Versal
zynqmp:
- Do no place BSS at 0 which have issue with NULL pointer
- Enable SLG gpio driver
- Disable LMB for mini configurations
- Remove duplicate PMIO_NODE_ID_BASE macro
versal:
- Add xlnx-versal-resets.h header
mmc:
- zynq_sdhci: Fix macro for MMC HS
relocate-rela:
- Fix support for BE hosts
- Define all macros for e_machine and reloc types
misc:
- Get rid of guard macros from ARM and RISC-V
lmb:
- Add support for disabling LMB
serial:
- zynq: Fix baudrate calculation
tests:
- Mark bind tests to run only on sandbox
- List also dm uclass and devres
After we switch to use BINMAN_SYMBOLS, there is no need to pad
the file size to 0x8000 and 0x4000. After we use BINMAN_SYMBOLS,
the u-boot-spl-ddr.bin shrink about 36KB with i.MX8MP-EVK.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
By reading binman symbols, we no need hard coded IMEM_LEN/DMEM_LEN after
we update the binman dtsi to drop 0x8000/0x4000 length for the firmware.
And that could save binary size for many KBs.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
[Alper: Check BINMAN_SYMS_OK instead]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
We are migrating to use binman symbols, the current names are
inconsistent across different boards, so unify them.
Also add `type = "blob-ext";`, since the new names are not valid binman
types.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
[Alper: Edit commit message]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Since new atheros PHY driver needs to access its PHY node through
phy device, we have to assign the phy node in ethernet controller
driver. Otherwise the PHY driver will fail to get some nodes
and properties.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Move i.MX code to a standalone file to make it easy for adding new
platform support
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Move macros and structures to header file and make some functions
public, so that could used by other files, this is to
prepare split platform specific config to one file.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When CONFIG_CLK is not enabled, there will be buil break:
"error: ‘eqos’ undeclared (first use in this function)"
Take eqos definition out the CONFIG_CLK ifdef.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Set ARM clock to OD frequency 1.7Ghz, since we have set PMIC VDD_SOC
to Overdrive voltage 0.9V
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add the DTSi file and DT header files for i.MX93 SoC
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add Kconfig for enabling reference events counter in DDRC performance
monitor by default
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since i.MX9 uses same DDR PHY with i.MX8M, split the DDRPHY to a common
directory under imx, then use dedicated ddr controller driver for each
iMX9 and iMX8M.
The DDRPHY registers are space compressed, so it needs conversion to
access the DDRPHY address. Introduce a common PHY address remap function
for both iMX8M and iMX9 for all PHY registers accessing.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Implement the DDR driver clock interfaces for set DDR rate and
bypass DDR PLL
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add bootaux command to support on-demand booting M33 from u-boot.
It kicks M33 via ATF by "bootaux 0x201e0000 0"
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To support on-demand booting M33 image from A core. SPL needs
to follow M33 kick up sequence to release M33 firstly,
then set M33 CPUWAIT signal. ATF will clear CPUWAIT to kick
M33 to run.
The prepare function also works around the M33 TCM ECC issue by
clean the TCM. Also enable sentinel handshake and WDOG1 clock
for M33 stop and reset.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add power init of MEDIAMIX, MLMIX and DDRMIX. And clear isolation
of MIPI DSI/CSI, USBPHY after the power up.
SPL should call the power init in its boot sequence before accessing
above three MIX and USB.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add GPIO registers structure for iMX93, so that we can enable lpgpio
driver
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sentinel have read access of OTP shadow register 0-511, and fsb have
read access of shadow 0-51/312-511.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX93 fuse can be accessed through FSB and s400-api. Add mapping tables
for i.MX93. The offset address of FSB accessing OTP shadow registers is
different between i.MX8ULP and i.MX93, so use macro to define the offset
address instead of hardcode.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The i.MX93 platform wants to reuse drivers/misc/imx8ulp/fuse.c. Moving
fuse.c from the folder imx8ulp to sentinel makes it can be used by other
platforms.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Update the get chip revision methond to use S400 API, also record
other information like lifecycle and UID to global data.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add TRDC driver to iMX9. The TRDC init splits to two phases:
1. Early init phase will release TRDC from Sentinel and open write
permission to the memory where SPL image runs. Sentinel will set
the memory to RX only after ROM authentication for the OEM
closed part.
2. Init phase will configure TRDC to allow non-secure master to
access DDR. So the peripherals can work in u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Introduce Sentinel API ahab_release_m33_trout to make sure sentinel
release M33 trout and make sure M33 could boot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To support more RDC instances on i.MX93, update API to latest
definition.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since iMX9 uses S401 which shares the API with iMX8ULP. So move S400
MU driver and API to a common place and selected by CONFIG_IMX_SENTINEL
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX9 shares same ROM API with i.MX8ULP, so make the i.MX8ULP the function
prototype common and usable by i.MX9.
Also include mmc env functions that use ROM API.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add timer_init to update ARM arch timer with correct frequency
from system counter and enable system counter.
Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add clock API to support CCM root clock and LPCG setting
Set the CCM AUTHEN register to allow non-secure world to set
root clock and lpcg.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MN/P/ULP supports ROM API, they have almost same get_boot_device
implementation, so move to a common file. And when support i.MX9,
no need to include the other function copy.
Since sys_proto.h is included in imx_romapi.c, there will be build
warning for i.MX8M because wdog_regs not defined, so include imx-regs.h
in i.MX8M sys_proro.h
Signed-off-by: Peng Fan <peng.fan@nxp.com>
For SoCs support ROM API, CONFIG_SPL_BOOTROM_SUPPORT is needed,
so use this macro to guard the code to avoid extend the list.
And drop the guard with structure definition, there is no need.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Move the default mapping of spl_boot_device to weak function of
spl_board_boot_device. So that every board of iMX7/8/8M can overwrite
this function to implement specific mapping.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The SPL SDP is configured as BOOT_DEVICE_BOARD, so when booting from
USB, change its type to BOOT_DEVICE_BOARD, so we can use SDP.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
All the SoCs use mach-imx has CONFIG_MACH_IMX selected, so
the macro could be the gate to build arch/arm/mach-imx to simplify
the rules.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The CONFIG_SPL_MAX_SIZE could be 0x27000 for i.MX8MM when SPL_TEXT_BASE
set to 0x7E1000.
The DDR firmware max uses 96KB, there is a 4KB padding header before
SPL_TEXT_BASE, so the SPL MAX SIZE is `256KB - 96KB - 4KB`.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
The MAINTAINERS file currently lists files in
arch/arm/include/asm/arch-imx/ being part of the IMX maintainers
purview, however the arch/arm/include/asm/ directory also contains the
directories arch-imx8, arch-imx8m, arch-imx8ulp and arch-imxrt which
would also appear to be relevant to the team. Tweak the entry to cover
these directories so that tools like get_maintainers.pl will suggest
relevant maintainers when making changes just in these directories.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
With supporting timer_get_boot_us, we can profile boot up time with below
configs and function bootstage_mark_name().
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
When you pass "--no-tree" to checkpatch it disables some extra checks
that are important for Linux. Specifically I want checks like:
warning: DT compatible string "boogie,woogie" appears un-documented
check ./Documentation/devicetree/bindings/
Let's make the default for Linux to _not_ pass --no-tree. We'll have a
config option and command line flag to override.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace logically correct word in the description.
Fixes: 91a91ff804d ("dm: Add Kconfig options for driver model SPL support")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a basic test of the 'fdt addr' command, to kick things off.
This includes a new convenience function to run a command from a printf()
string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this feature so that it works on sandbox, using a basic identity
mapping. This allows us to run the 'ut addrmap' test.
Also fix up the test to use the correct macros to access the linker
list, so that the 'ut addrmap' command actually works.
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently the fitImage data area is resized in 1 kiB steps. This works
when bundling smaller images below some 1 MiB, but when bundling large
images into the fitImage, this make binman spend extreme amount of time
and CPU just spinning in pylibfdt FdtSw.check_space() until the size
grows enough for the large image to fit into the data area. Increase
the default step to 64 kiB, which is a reasonable compromise -- the
U-Boot blobs are somewhere in the 64kiB...1MiB range, DT blob are just
short of 64 kiB, and so are the other blobs. This reduces binman runtime
with 32 MiB blob from 2.3 minutes to 5 seconds.
The following can be used to trigger the problem if rand.bin is some 32 MiB.
"
/ {
itb {
fit {
images {
test {
compression = "none";
description = "none";
type = "flat_dt";
blob {
filename = "rand.bin";
type = "blob-ext";
};
};
};
};
};
configurations {
binman_configuration: config {
loadables = "test";
};
};
};
"
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
When CONFIG_LOG is activated, if LOG_DEBUG is defined in a file and
DEBUG is not defined the trace with debug() macro are not displayed,
because the parameter cond : _DEBUG = 0 is checked in debug_cond().
With this patch the define DEBUG, used to force the trace generated by
debug() macro, is linked with the define LOG_DEBUG, used to force the
trace generated by other macros (log_debug, dev_dbg, pr_debug).
We only need to define LOG_DEBUG in a file to activate all the
traces generated by any U-Boot debug macro, as it is described in
/doc/develop/logging.rst
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
If parameter drv of lists_bind_fdt() is specified, we shall bind only to
this very driver and to no other.
If the driver drv has an of_match property, we shall only bind to the
driver if it matches the compatible string of the device.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Without setting CONFIG_LOG_MAX_LEVEL to a value above 6 we will not detect
NULL dereferences and other errors in log_debug() calls.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If parameter drv of lists_bind_fdt() is specified, we want to bind to this
specific driver even if its field of_match is NULL.
If entry->of_match is NULL, we should not dereference it in a debug
statement.
Fixes: d3e773613b6d ("dm: core: Use U-Boot logging instead of pr_debug()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Consider CONFIG_LOG_MAX_LEVEL and gd->default_log_level in
* do_log_test_helpers()
* log_test_dropped()
* log_test_level_deny()
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When programming qspi flash speed we need to check the requested flash
speed not to exceed the spi max frequency. In the current implementation
we are checking qspi ref clk instead. This commit fixes the issue by
checking the requested speed and programs the specified max frequency.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-5-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add support_ops function zynq_qspi_mem_exec_op to check controller
supported operations by spi-mem framework. Current default support ops
function does not allow dummy buswidth no more than 1, unless we are
using buswidth is 4 for TX.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-4-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Fix dummy bytes calculation incase of valid dummy bytes when dummy
buswidth is > 1. Current dummy bytes calculation does not provide
correct dummy values for dummy buswidth > 1.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-3-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add child pre probe function in the driver. Update max_hz of priv from
spi_slave structure.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add support_ops function to check controller supported operations by
spi-mem framework. Current default support ops function does not allow
dummy buswidth no more than 1, unless we are using buswidth is 4 for TX.
In order to support dummy buswidth > 1 by spi-nor framework we are adding
explicit support_ops to check controller supported operations.
Fix dummy bytes calculation incase of valid dummy bytes when dummy
buswidth is > 1. Current dummy bytes calculation does not provide
correct dummy values for dummy buswidth > 1.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657954727-31972-3-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add support for spi memory operations for xilinx AXI qspi driver.
This provides an high-level interface to execute SPI memory
operations by the controller.
Remove existing spi transfer based implementation and use
spi memory based exec_op() implementation for qspi IO operations.
Simplified existing startup_block implementation.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657954727-31972-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to
handle loading encrypted bitfiles.
This feature requires encrypted FSBL, as according to UG1085:
"The CSU automatically locks out the AES key, stored in either BBRAM
or eFUSEs, as a key source to the AES engine if the FSBL is not
encrypted. This prevents using the BBRAM or eFUSE as the key source
to the AES engine during run-time applications."
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-14-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reduce the function code by calling xilinx_pm_request() once only.
Use the same variable bsize_req to store either bstream size in bytes
or an address of bstream size according to a type required by the
firmware version. Remove obsolete debug().
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-11-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-10-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Convert taken FPGA image "compatible" string to a binary compatible
flag and pass it to an FPGA driver.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-9-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add a "compatible" string to binary flag converter, which uses
a callback str2flag() of given FPGA driver if available.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-8-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-7-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
This flag is used to check whether a Xilinx FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-6-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add a call to convert FPGA "compatible" string to a binary flag.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-5-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Function definition arguments should also have identifier names.
Add missed ones to struct xilinx_fpga_op callbacks, unifying code.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-3-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
For imx8mm-cl-iot-gate we can use extension command to scan
extension boards attached on the mainboard. We enable the
extension command by default for users to detect the extension
boards.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus
does not need to be defined in the various board config includes.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
It allows using this feature without enabling the "fpga loads"
command.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Co-developed-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-2-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
After commit 8cca60a2cbf2 ("Kconfig: Remove some symbols from the
whitelist") downstream builds failed for boards setting this in
include/configs/…
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20220721133122.32428-2-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Enable power domain driver to configure pmufw config object and request
node for all the IP's that are enabled in DT.
This driver depends on mailbox and IPI driver, hence enable them as well.
Add ARCH_VERSAL in the depends on of mailbox Kconfig to compile for
Versal platforms.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-6-ashok.reddy.soma@xilinx.com
Mailbox driver might be need for Versal and other future platforms.
To remove the dependency, move struct zynqmp_ipi_msg to
zynqmp_firmware.h so that mailbox driver compiles for other platforms
easily.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-5-ashok.reddy.soma@xilinx.com
Enable power domain driver to configure pmufw config object and request
node for all the IP's that are enabled in DT.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-4-ashok.reddy.soma@xilinx.com
Try loading pmufw config overlay for core0, if it doesn't return any
error it means pmufw is accepting nodes for other IP's. Otherwise dont
try to load config object for any other IP, just return from
zynqmp_pmufw_node function.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-3-ashok.reddy.soma@xilinx.com
zynqmp_pmufw_load_config_object() has some error cases and it is better
to return those errors. Change prototype of this function to return
errors.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-2-ashok.reddy.soma@xilinx.com
Enable reset driver for ZynqMP platforms. This will enable us to reset
the IP's using generic reset_assert and reset_deassert calls.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-4-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add CONFIG_DM_RESET and CONFIG_RESET_ZYNQMP configs in versal default
configuration to enable support for reset driver for versal
platform.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-3-ashok.reddy.soma@xilinx.com
Add support for versal platform by adding "xlnx,versal-reset"
compatible string in zynqmp-reset driver. Reset numbering schema
for versal is not same as zynqmp, so nr_reset and reset_id are
set to zero. In case of assert/dessert, required device reset id
is sent from respective driver through struct reset_ctl.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-2-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
UUID is already recorded when FRU is parsed but it is not copied to local
structures and exported to variable that's why simply add it.
Data is saved in binary format but there must be conversion to string for
exporting it to variable and string should be in uuid format too.
One way how to use it directly is to setup pxeuuid based on it. For
example via preboot with "setenv pxeuuid ${board_uuid}"
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com
Since the calulation of "bgen" is rounded down, using a higher
baudrate will result in a larger difference from the actual
baudrate. Should use DIV_ROUND_CLOSEST() like the Linux driver.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1657676339-6055-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
There is no need to have LMB enabled that's why save some space by
disabling it.
aarch64: (for 8/8 boards) all -1168.5 rodata -105.5 text -1063.0
xilinx_zynqmp_mini: all -2013 rodata -185 text -1828
xilinx_zynqmp_mini_qspi: all -2013 rodata -185 text -1828
xilinx_zynqmp_mini_emmc0: all -2661 rodata -237 text -2424
xilinx_zynqmp_mini_emmc1: all -2661 rodata -237 text -2424
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f735d7691f4e7a7958d985b22c40aeb26e37a404.1657183534.git.michal.simek@amd.com
With commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory
location"), the function board_get_usable_ram_top() is allocating
MMU_SECTION_SIZE of about 2MB using lmb_alloc(). But we dont have this
much memory in case of mini U-Boot.
Keep these functions which use lmb under CONFIG_LMB so that they are
compiled and used only when LMB is enabled.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/75e52def75f573e554a6b177a78504c128cb0c4a.1657183534.git.michal.simek@amd.com
CONFIG_OF_LIBFDT is used twice for guarding the same code. It is enough to
do it once that's why remove additional ifdefs from arm and risc-v code.
Fixes: 0c303f9a6628 ("image: Drop IMAGE_ENABLE_OF_LIBFDT")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://lore.kernel.org/r/f8e3ff9124195cbd957874de9a65ef79760ef5e7.1657183634.git.michal.simek@amd.com
Do not use 0 as address for memory because of the special meaning for
pointers (null pointer). Change the spl bss start address to the second
page.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220714134733.7487-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The new ELF decoding logic assumed that the target binary has the same
endianness as the host, which broke building ARM64 firmware binaries on
big-endian machines.
This commit fixes the ELF64 decoding to be host-endianness-neutral, and
applies the same changes to the ELF32 decoding. It does not fix the
microblaze-specific dynamic symbol decoding.
It also corrects the functions used for byte swapping in rela_elf64()
and rela_elf32(). The result is the same, but semantically the code is
converting bytes read from a foreign-endianness file to host byte order.
Fixes: 4c9e2d643460 ("tools: relocate-rela: Read rela start/end directly from ELF")
Fixes: a1405d9cfedb ("tools: relocate-rela: Check that relocation works only for EM_AARCH64")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220715064026.54551-1-samuel@sholland.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
Timing macro's are wrong for MMC_HS_52 and MMC_DDR_52. Fix it with
correct values of MMC_TIMING_MMC_HS and MMC_TIMING_MMC_DDR52 respectively.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1656319965-12124-1-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit fixes issue with usage of Xen hypervisor shared info page.
Previously U-boot did not unmap it at the end of OS boot process. Xen
did not prevent guest from this. So, it worked, but caused wierd
issues - one memory page, that was returned by memalign in U-boot
for Enlighten mapping was not unmaped by Xen (shared_info values was
not removed from there) and returned to allocator. During the Linux
boot, it uses shared_info page as regular RAM page, which leads to
hypervisor shared info corruption.
So, to fix this issue, as discussed on the xen-devel mailing list, the
code should:
1) Unmap the page
2) Populate the area with memory using XENMEM_populate_physmap
This patch adds page unmapping via XENMEM_remove_from_physmap, fills
hole in address space where page was mapped via XENMEM_populate_physmap
and return this address to memory allocator for freeing.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Reviewed-by: Anastasiia Lukianenko <vicooodin@gmail.com>
There are no references to CONFIG_SOC_DM355 / CONFIG_SOC_DM365 /
CONFIG_SOC_DM644X / CONFIG_SOC_DM646X and the files these Makefile lines
reference have already been dropped.
Signed-off-by: Tom Rini <trini@konsulko.com>
The ISW_ENTRY_ADDR symbol was used for OMAP devices in place of
SPL_TEXT_BASE. Keystone2 HS devices were not using it right either.
Remove ISW_ENTRY_ADDR and use SPL_TEXT_BASE directly.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Read the swrv.txt file from the TI Security Development Tools when
TI_SECURE_DEVICE is enabled. This allows us to set our software
revision in one place and have it used by all the tools that create
TI x509 boot certificates.
Signed-off-by: Andrew Davis <afd@ti.com>
The x509 certificate SWRV is currently hard-coded to 0. This need to be
updated to 1 for j721e 1.1, j7200 and am64x. It is don't care for other
k3 devices.
Added new config K3_X509_SWRV to k3. Default is set to 1.
Signed-off-by: Yogesh Siraswar <yogeshs@ti.com>
Reviewed-by: Dave Gerlach <d-gerlach@ti.com>
This isn't strictly needed as these firewalls should all be disabled on
GP, but it also doesn't hurt, so do this unconditionally to remove this
use of CONFIG_TI_SECURE_DEVICE.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The first AM6x device was the AM654x, but being the first we named it
just AM6, since more devices have come out with this same prefix we
should switch it to the normal convention of using the full name of the
first compatibility device the series. This makes what device we are
talking about more clear and matches all the K3 devices added since.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The content of these files are only used in SPL builds. The contents are
already ifdef for the same, remove that and only include the whole file
in the build when building for SPL.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The Qualcomm device trees in U-Boot are currently not consistent with
the upstream DTs used in the Linux kernel. While some bindings are
similar to the official specification in the Linux kernel, several
nodes have subtle differences, e.g. the "compatible"s or the exact
specification of memory registers.
This means that some of the Qualcomm-related U-Boot drivers are not
compatible with the Linux DT (and vice versa).
The SPMI node is one such example: the "core" region starts at
0x0200f000 in the upstream Linux MSM8916 DT, but in U-Boot it starts at
0x0200f800. The end result is normally the same, since the Linux SPMI
driver simply adds the 0x800 internally.
However, commit f5a2d6b4b03a ("spmi: msm: add arbiter version 5
support") imported this behavior into the U-Boot driver, without
adjusting the DB410c/DB820c device trees. This means that the 0x800
offset is now added twice, breaking all SPMI read/write operations:
Failed to find PMIC pon node. Check device tree
Failed to find pm8916_gpios@c000 node.
USB init failed: -6
starting USB...
Bus ehci@78d9000: Failed to find pm8916_gpios@c000 node.
probe failed, error -6
No working controllers found
While the mistake is strictly speaking in the spmi-msm driver, fix the
issue by making the SPMI nodes in the DB410c/DB820c consistent with the
upstream Linux DT instead.
Ideally we should even go a step further by fixing the remaining uses
of custom bindings in the U-Boot drivers and moving to using the Linux
DTs as-is. This would likely avoid such mistakes in the future and
would also make the porting process much easier.
Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Fixes: f5a2d6b4b03a ("spmi: msm: add arbiter version 5 support")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
This is no longer needed as the SA2UL can now be shared with Linux.
Leave the SA2UL DT node enabled.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Using CONFIG_IS_ENABLED breaks accessing memory map structure when
doing a A53 SPL build for AM625 and AM642 platforms. This is due to
'abc if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y''
in which there is no CONFIG_SPL_SOC_K3_AM625/CONFIG_SPL_SOC_K3_AM642
defined in the configuration.
For the A53 SPL builds on these platform to access the memory mapping
which it will need for enabling the mmu/cache it must use #if defined(X)
checks and not CONFIG_IS_ENABLED.
Cc: Suman Anna <s-anna@ti.com>
Cc: Neha Francis <n-francis@ti.com>
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Currently u-boot running on mt7622 will print an warning log at beginning:
> serial_mtk serial@11002000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
It turns out that the pinctrl uclass can't work properly in board_f stage.
Since the uart0 is the default UART device used by bootrom, and will be
initialized in both bootrom and tf-a bl2. It's ok not to setup pinctrl for
uart0 in u-boot.
This patch removes the default pinctrl of uart0 to suppress the unwanted
warning.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The entry for DDRSS_PI_321_DATA was accidentally repeated leading to the
last few PI registers being incorrectly programmed.
Fix this.
Reported-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add support for Qualcomm QCS404 SoC based evaluation board.
Features:
- Qualcomm Snapdragon QCS404 SoC
- 1GiB RAM
- 8GiB eMMC, uSD slot
U-boot is chain loaded by ABL in 64-bit mode as part of boot.img.
For detailed build and boot instructions, refer to
doc/board/qualcomm/qcs404.rst.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Currently this clock driver initializes clocks for UART and eMMC. Along
with this import "qcom,gcc-qcs404.h" header from Linux mainline to
support DT bindings.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Currently this pinctrl driver only supports BLSP UART2 specific pin
configuration.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
For SDCC version 5.0.0, MCI registers are removed from SDCC interface
and some registers are moved to HC. So add support to use the new
compatible string "qcom,sdhci-msm-v5". Based on this new msm variant,
pick the relevant variant data and use it to detect MCI presence thereby
configuring register read/write to msm specific registers.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add support for 96Boards Dragonboard 845C aka Robotics RB3 development
platform. This board complies with 96Boards Open Platform Specifications.
Features:
- Qualcomm Snapdragon SDA845 SoC
- 4GiB RAM
- 64GiB UFS drive
U-boot is chain loaded by ABL in 64-bit mode as part of boot.img.
For detailed build and boot instructions, refer to
doc/board/qualcomm/sdm845.rst, board: dragonboard845c.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Configure debug UART pins as function: "qup9" rather than being regular
gpios. It fixes a hang seen during pinmux setting.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Rather than using magic numbers as clock ids for peripherals import
qcom,gcc-sdm845.h from Linux to be used standard macros for clock ids.
So start using corresponding clk-id macro for debug UART.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
According to u-boot DT recomendation, u-boot specific DT properties belong
to *-uboot.dtsi. Also for starqltechn board (which is the only current
consumer of sdm845.dtsi), the properties are already included in
starqltechn-uboot.dtsi, so remove corresponding redundant properties.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Currently there is a mismatch among DT node overrides in starqltechn
board DTS file and the actual DT nodes in the sdm845.dtsi. So fix that
to align with DT nodes in sdm845.dtsi.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
CONFIG_PREBOOT just cause putting "preboot=CONFIG_PREBOOT" into env list.
Value CONFIG_PREBOOT="run preboot" in defconfig is just nonsense and does
not do anything useful (it is infinite recursion). Config file for this
board already contains default preboot= env variable with correct value,
which has higher priority than CONFIG_PREBOOT and this is reason why
nonsense CONFIG_PREBOOT is ignored.
Remove nonsense and unused CONFIG_PREBOOT from nokia_rx51_defconfig file.
Signed-off-by: Pali Rohár <pali@kernel.org>
We have different dtbs for the Lite and Extended WiFi variants of the
SanCloud BBE.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The SanCloud BBE Lite has a Micron Authenta flash device connected to
the spi0 bus.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Synchronise device tree with linux v5.19-rc5.
Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Verdin Development (carrier) board (e.g.
imx8mp-verdin-wifi-dev.dtb rather than the previous imx8mp-verdin.dtb).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Fix the following build-time pwms property warnings:
w+arch/arm/dts/imx8mp-rsb3720-a1.dtb: Warning (pwms_property):
/lvds_backlight@0:pwms: property size (12) too small for cell size 3
w+arch/arm/dts/imx8mp-rsb3720-a1.dtb: Warning (pwms_property):
/lvds_backlight@1:pwms: property size (12) too small for cell size 3
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Synchronise device tree with linux v5.19-rc5.
Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Verdin Development (carrier) board (e.g.
imx8mm-verdin-wifi-dev.dtb rather than the previous imx8mm-verdin.dtb).
Please further note that the PMIC node name got changed from a pmic
label to pmic@25 which required adjustment in resp. board SPL file
board/toradex/verdin-imx8mm/spl.c.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Fix the following build-time pwms property warnings:
w+arch/arm/dts/imx8mm-kontron-n801x-s-lvds.dtb: Warning (pwms_property):
/backlight:pwms: property size (12) too small for cell size 3
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
As a preparatory step remove the pinctrl_pmic reference which does not
exist in the Linux upistream device tree.
This avoids the following error once synchronised:
+Error: arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi:26.1-14 Label or
path pinctrl_pmic not found
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Synchronise device tree with linux v5.19-rc5.
Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Colibri Evaluation (carrier) board V3 (e.g.
vf610-colibri-eval-v3.dtb rather than the previous vf610-colibri.dtb).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
As a preparatory step rename the included SoC dtsi from vf.dtsi to
vf610.dtsi as this is how it is named in Linux upstream.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Synchronise device tree with linux-next next-20220708.
Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device trees we are now using the
regular ones for the Colibri Evaluation (carrier) board V3 (e.g.
imx7d-colibri-eval-v3.dtb rather than the previous
imx7-colibri-rawnand.dtb and imx7d-colibri-emmc-eval-v3.dtb rather than
the previous imx7-colibri-emmc.dtb).
Please further note that the PMIC node name got changed from rn5t567@33
to pmic@33 which required adjustment in resp. board file
board/toradex/colibri_imx7/colibri_imx7.c.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
As a preparatory step remove the epdc reference which does not exist in
the Linux upstream device tree and rename the qspi1 reference to qspi as
this is how it is named in the Linux upstream device tree.
This avoids the following error once synchronised:
+Error: arch/arm/dts/.imx7d-sdb-qspi.dtb.pre.tmp:10.1-6 Label or path
epdc not found
+Error: arch/arm/dts/.imx7d-sdb-qspi.dtb.pre.tmp:29.1-7 Label or path
qspi1 not found
+Error: arch/arm/dts/imx7d-sdb-qspi-u-boot.dtsi:6.1-7 Label or path
qspi1 not found
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
As a preparatory step rename the qspi1 reference to qspi as this is how
it is named in the Linux upstream device tree.
This avoids the following error once synchronised:
+Error: arch/arm/dts/.imx7-cm.dtb.pre.tmp:96.1-7 Label or path qspi1 not
found
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Synchronise device tree with linux v5.19-rc5.
Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device trees we are now using the
regular ones for the Colibri Evaluation (carrier) board V3 (e.g.
imx6ull-colibri-eval-v3.dtb rather than the previous imx6ull-colibri.dtb
and imx6ull-colibri-emmc-eval-v3.dtb rather than the previous
imx6ull-colibri-emmc.dtb).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
As a preparatory step remove the qspi node with its flash0 label as this
is already in the Linux upstream device tree.
This avoids the following error once synchronised:
+arch/arm/dts/imx6ul-14x14-evk.dtb: ERROR (duplicate_label):
/soc/bus@2100000/spi@21e0000/n25q256a@0: Duplicate label 'flash0' on
/soc/bus@2100000/spi@21e0000/n25q256a@0 and
/soc/bus@2100000/spi@21e0000/flash@0
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Synchronise device tree with linux-next next-20220708.
Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Colibri Evaluation (carrier) board V3 (e.g.
imx6dl-colibri-eval-v3.dtb rather than the previous imx6-colibri.dtb).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Synchronise device tree with linux-next 20220706.
Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Apalis Evaluation (carrier) board (e.g.
imx6q-apalis-eval.dtb rather than the previous imx6-apalis.dtb).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
As a preparatory step make sure to refer to absolute node paths where
labels were removed in Linux upstream.
This avoids the following error once synchronised:
+Error: arch/arm/dts/imx6q-tbs2910-u-boot.dtsi:3.1-7 Label or path aips1
not found
+Error: arch/arm/dts/imx6q-tbs2910-u-boot.dtsi:11.1-5 Label or path soc
not found
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Fix the following build-time pwms property warning:
w+arch/arm/dts/imx6dl-brppt2.dtb: Warning (pwms_property):
/backlight:pwms: property size (12) too small for cell size 3
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add product id print in show_board_info(), with an increasing number of
Toradex SKUs available with small differences it makes sense to print it.
Move serial number print to a dedicated line, this prevents the previous
line with the product name to overflow the 80 columns with any
reasonable product name length.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Up to now in the code we named Toradex SKUs in a slightly different way
compared to the official product name, start using the official names
from now on to avoid misunderstanding.
This has also the nice benefit of the string being shorter, allowing
to fit nicely in 80 columns even adding the product ID when printing
the hardware information.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fix checkpatch warn, use `IS_ENABLED(CONFIG_TDX_CFG_BLOCK_2ND_ETHADDR)`
instead of `#ifdef CONFIG_TDX_CFG_BLOCK_2ND_ETHADDR`.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Remove stale show_boot_logo() declaration, not used anywhere.
Fixes: e6fd30dd9eef ("toradex: drop legacy show_boot_logo function and use splashscreen")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Simplify interactive config block creation code, instead of having a
a long list of questions and a complex tree of preprocessor directive to
guess the exact SKU, just ask the user to select it from a list.
The modules list is filtered out to include only SKUs that are supported
by the specific u-boot binary in execution.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Use generally available ARRAY_SIZE macro, instead of hand-coding it
every time is needed.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Remove comment "not currently on sale" on specific SKUs, this
information does not belong to the code and will never be accurate.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Add new i.MX 8M Mini SKU to ConfigBlock handling.
0068: Verdin iMX8M Mini Quad 2GB WB IT No CAN
This SKU is identical to 0055 but without CAN. Mention this in the name
so those modules can be distinguished.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Add instructions to build and boot from QSPI Flash
Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
On AM62x devices, main ESM error event outputs can be routed to
MCU ESM as inputs. So, two ESM device nodes are expected in the
device tree : one for main ESM and another one for MCU ESM.
MCU ESM error output can trigger the reset logic to reset
the device when CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is
set to '0'.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Apple's M2 SoC very similar to the M1 and can use the same memory map.
The keyboard/trackpad on the MacBook Pro (13-inch, M2, 2022) uses
"dockchannel" as transport instead of SPI and needs a new driver.
USB, NVMe, uart, framebuffer and watchdog are working with the existing
drivers.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
"apple,t8112-dart" uses an incompatible register interface but still
offers the same functionality. This DART is found on the M2 and M1
Pro/Max/Ultra SoCs.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Add entry for imx8mm_evk_fspi_defconfig in
board/freescale/imx8mm_evk/MAINTAINERS
Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
The macro `CONFIG_SYS_UBOOT_BASE` is used by SPL loaders `"NOR"` and
`"XIP"` to determine the base address of u-boot.
For `"NOR"` on i.MX8MM it is the base address of QSPI0 plus the offset
of the flattened image tree blob.
Although `QSPI0_AMBA_BASE` is used to define CONFIG_SYS_UBOOT_BASE in
multiple board header files for i.MX8MM, it is not specified.
Specify offset of flattened image tree blob (needs to be set to same
value as specified in 'binman' node), base address of QSPI0 and size of
FlexSPI configuration block.
Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Add QSPI Boot option in u-boot-spl for i.MX8m EVK.
Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Add imx8mm_evk_fspi_defconfig to build QSPI boot image.
This config is based on imx8mm_evk_defconfig with addtional config options to
define FSPI Header parameters required to generate QSPI Header.
Update SPL offset to include header size and overwrite IMX_CONFIG to use
lpddr.cfg for FSPI.
Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Add definition for FSPI configuration block and subsequently new offsets for
u-boot-spl and u-boot-itb for CONFIG_FSPI_HEADER option.
Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Add struct with Flex SPI Configuration Block and enable generating
fspi header using mkimage.
Refer i.MX 8M Mini Application Processor Reference Manual for
detailed information about parameters for FlexSPI Configuration block.
Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Since fe8acf556c3 ("imx: HAB: Validate IVT before authenticating image")
the U-Boot HAB implementation is checking whether reserved1 field in IVT
is zero or not. In case the field is not zero, IVT validation fails. Stop
setting IVT reserved1 field to non-zero in mkimage imx8m plugin, otherwise
the validation cannot ever work.
Note that this only affects legacy boards which do not use binman.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Simplify the use of the ROM API by using the wrappers that take care
of saving/restoring gd and computing the xor value. This makes the
generated code smaller and the C code easier to read.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
The ROM API is thoroughly undocumented, but apparently passing the xor
of the real arguments as an extra argument is required [1]. Also, we
need to do the "save gd/restore gd" dance. These are both error-prone,
and lead to a lot of code duplication.
Since both imx8m[np] and imx8ulp SOCs have this, add a separate
translation unit which is included precisely when the new
CONFIG_IMX8_ROMAPI symbol is set, which provide convenience wrappers
that take care of computing the xor value as well as doing the gd
dance, and that thus have a more intuitive API. Subsequent patches
will make use of these to reduce boilerplate.
[1] One wonders, for example, if the check is only applied to the
lower 32 bits, or if we're implicitly relying on all 64-bit pointer
values we're passing effectively have 0 in the upper 32 bits.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
This exposes the struct rom_api, the g_rom_api variable declaration
and the associated #defines to slightly fewer boards: namely, those
IMX8M which are not IMX8MN or IMX8MP. But the latter two are the only
IMX8M* ones where the g_rom_api variable is defined (in imx8m/soc.c),
so that should be fine.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
In order not to repeat the IMX8MN || IMX8MP || IMX8ULP logic in
multiple places where we need to know if the SOC exposes the ROM API,
add a "def_bool y" Kconfig symbol.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
ft_board_setup relies on the board_type() function to optimize which phy
nodes need to be enabled for Linux.
Add calls to setup and release the board-detect GPIOs.
Also fix the switch-case statement to only enable phy address 4 for
Cubox and unknown devices.
Fixes: 741ce308 ("mx6cuboxi: fixup dtb ethernet phy nodes before booting an OS")
Signed-off-by: Josua Mayer <josua@solid-run.com>
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy
due to part availability. Add support for it:
- increase post-reset time to 300ms per datasheet
- leave tx-delay/rx-delay undefined in dt defaulting to 2.0ns
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The imx6q arm2 board support has been removed from U-Boot
as it did not get converted to DM.
Remove the MX6Q_ARM2 related ifdefery in the driver.
Signed-off-by: Fabio Estevam <festevam@denx.de>
In preparation of re-sync of mtd stack, we opt to move the current stack
slowly in order to have a more easy sync and test. We would like to
prepare uboot to support no-jedec and no-onfi compliant nand so we need
to clean up a bit the code we have now and upstream some of the support.
In this series we expect no functional change
Tested on:
- imx6ull Micron MT29F2G08ABAGAH4
- imx8mn Macronix MX30LF4G18AC
Upstream linux commit f7025a43a9da26.
The MTD subsystem has its own small museum of ancient NANDs in a form of
the CONFIG_MTD_NAND_MUSEUM_IDS configuration option. The museum contains
stone age NANDs with 256 bytes pages, as well as iron age NANDs with 512
bytes per page and up to 8MiB page size.
It is with great sorrow that I inform you that the museum is being
decommissioned. The MTD subsystem is out of budget for Kconfig options and
already has too many of them, and there is a general kernel trend to
simplify the configuration menu.
We remove the stone age exhibits along with closing the museum
REMARK Don't apply this part from upstream:
Some of the iron age ones are transferred to the regular NAND depot.
Namely, only those which have unique device IDs are transferred, and the
ones which have conflicting device IDs are removed.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit fb3bff5b407e58.
This patch enables support to read the ECC strength and size from the
NAND flash using Toshiba Memory SLC NAND extended-ID. This patch is
based on the information of the 6th ID byte of the Toshiba Memory SLC
NAND.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit 3b5206f4be9b65.
Move Macronix specific initialization logic into nand_macronix.c. This
is part of the "separate vendor specific code from core" cleanup
process.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit 229204da53b31d.
Move AMD/Spansion specific initialization/detection logic into
nand_amd.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit 10d4e75c36f6c1.
Move Micron specific initialization logic into nand_micron.c. This is
part of the "separate vendor specific code from core" cleanup process.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit 9b2d61f80b060c.
Move Toshiba specific initialization and detection logic into
nand_toshiba.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit 01389b6bd2f4f7.
Move Hynix specific initialization and detection logic into
nand_hynix.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit c51d0ac59f2420.
Move Samsung specific initialization and detection logic into
nand_samsung.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
In preparation of moving specific nand support that are not jedec
or onfi
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
nand_get_flash_type was reworked in commit 1ca6f9483e9ab5. This change
break the Mediatek MT721. Fix it adjust the function call parameters
+include/linux/mtd/rawnand.h:32:62: note: expected 'struct nand_chip *' but argument is of type 'struct mtd_info *'
+ 32 | struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip,
+ | ~~~~~~~~~~~~~~~~~~^~~~
+drivers/mtd/nand/raw/mt7621_nand.c:1189:48: error: passing argument 2 of 'nand_get_flash_type' from incompatible pointer type [-Werror=incompatible-pointer-types]
+ | ^~~~
+ | |
+ | struct nand_chip *
+include/linux/mtd/rawnand.h:33:49: note: expected 'int *' but argument is of type 'struct nand_chip *'
+ 33 | int *maf_id, int *dev_id,
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
chip points to mtd. Passing chip is enough to have a reference
to mtd when is necessary
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit abbe26d144ec22.
A lot of NANDs are implementing generic features in a non-generic way,
or are providing advanced auto-detection logic where the NAND ID bytes
meaning changes with the NAND generation.
Providing this vendor specific initialization step will allow us to get
rid of full-id entries in the nand_ids table or all the vendor specific
cases added over the time in the generic NAND ID decoding logic.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit 7f501f0a72036d.
Store the NAND ID in struct nand_chip to avoid passing id_data and id_len
as function parameters.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Upstream linux commit 29a198a1592d83.
Auto-detection functions are passed a busw parameter to retrieve the actual
NAND bus width and eventually set the correct value in chip->options.
Rework the nand_get_flash_type() function to get rid of this extra
parameter and let detection code directly set the NAND_BUSWIDTH_16 flag in
chip->options if needed.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
CONFIG_ETHPRIME can be set to DT node name or alias which refers to DT
node. Define ethernet aliases and set ETHPRIME to eth2 which refers to WAN
ethernet port. This removes hardcoded DT node name from U-Boot
configuration file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Change detection of platform/cpu from runtime to compile time via config
define. This completely eliminates compiling code which is not going to run
on selected platform. Code which parses and prints device / revision id
still reads device id from MVEBU_REG_PCIE_DEVID register, but only once.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
uDPU like eDPU does not expose SCSI based peripherals like SATA nor PCI
and for sure it does not have the Intel E1000 PCI card.
So, like for eDPU remove those from the defconfig.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
eDPU does not use SCSI nor it has SATA exposed, and commit
arm: mvebu: a3720: Set BOOT_TARGET_DEVICES list to enabled peripherals
now allows compiling U-boot wihout all of the BOOT_TARGET_DEVICES since
not all boards have all of the listed peripherals exposed.
So, disable SCSI support in defconfig for eDPU.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Fix diacritics in some instances of my name and change my e-mail address
to kabel@kernel.org.
Add corresponding .mailmap entries.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Fix MAINTAINERS files for Turris devices, add missing files and add Pali
as maintainer.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
SPL on mvebu loads proper U-Boot from custom Marvell kwbimage format and
therefore support for other binary formats is not required to be present in
SPL. Boot source of proper U-Boot is defined by compile time options and
therefore it is not required to enable all possible and unused peripherals
in SPL by default.
This change decrease size of SPL binaries.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This allows to compile U-Boot without some boot option for some A3720 board
which does not have that peripheral.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
I am currently maintaing the Methode uDPU and eDPU boards so add myself
as the maintainer for them.
Remove the old entry from board/Marvell/mvebu_armada-37xx/MAINTAINERS.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not
work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
A common external watchdog circuit is kept alive by triggering a short
pulse on the reset pin. This patch adds support for this use case, while
making the algorithm configurable in the devicetree.
The "linux,wdt-gpio" driver being modified is based off the equivalent
driver in the Linux kernel, which provides support for this algorithm.
This patch brings parity to this driver, and is kept aligned with
the functionality and devicetree configuration in the kernel.
It should be noted that this adds a required property named 'hw_algo'
to the devicetree binding, following suit with the kernel. I'm happy to
make this backward-compatible if preferred.
Signed-off-by: Paul Doelle <paaull.git@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add support for hardware watchdog timer for Amlogic SoCs.
This driver has been heavily inspired by his Linux equivalent
(meson_gxbb_wdt.c).
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Philippe Boos <pboos@baylibre.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch enables the recently added watchdog support on the MIPS
Octeon EBB7304 eval board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds support for the Marvell Octeon watchdog driver, which
currently only support the ARM64 Octeon TX & TX2 platforms. Since the
IP is pretty similar, it makes sense to extend this driver to also
support the MIPS Octeon SoC.
A follow-up patch will enable this watchdog support on the EBB7304
eval board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
board_get_usable_ram_top() conflated the RAM size with the top address
of RAM. On systems where RAM starts at address 0 these numbers are the
same so it went unnoticed. Update board_get_usable_ram_top() to take
CONFIG_SYS_SDRAM_BASE into account when determining the top address.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
It does not matter what is DT node name of atsha device. So find it via
atsha driver and not by DT node name.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
U-Boot does not implement down_write_trylock() and its stub always returns
true that lock was acquired. Therefore ubifs_assert_cmt_locked() assert
currently always fails.
Fix this issue by redefining ubifs_assert_cmt_locked() to just empty stub
as there is nothing to assert.
Signed-off-by: Pali Rohár <pali@kernel.org>
i2c changes for 2022.10
- new driver nuvoton, NPCM7xx from Jim Liu
Fixes:
- ast_i2c: Remove SCL direct drive mode
from Eddie James
- avoid dynamic stack use in dm_i2c_write
bloat-o-meter drivers/i2c/i2c-uclass.o.{0,1}
add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-144 (-144)
Function old new delta
dm_i2c_write 552 408 -144
Total: Before=3828, After=3684, chg -3.76%
patch from Rasmus Villemoes
To quote Andre:
One prominent feature is the restructering of the clock driver, which
allows to end up with one actual driver for all variants, although we
still only compile in support for one SoC.
Also contained are some initial SPI fixes, which should fix some
problems, and enable SPI flash support for the F1C100s SoC. Those
patches revealed more problems, I will queue fixes later on, but for
now it should at least still work.
Apart from some smaller fixes (for instance for NAND operation), there
is also preparation for the upcoming Allwinner D1 support, in form of
the USB PHY driver. There are more driver support patches to come.
The gitlab CI completed successfully, including the build test for all
160 sunxi boards. I also boot tested on a few boards, but didn't have
time for more elaborate tests this time.
The size of the dynamic stack allocation here is bounded by the if()
statement. However, just allocating the maximum size up-front and
doing malloc() if necessary avoids code duplication (the
i2c_setup_offset() until the invocation of ->xfer), and generates much
better (smaller) code:
bloat-o-meter drivers/i2c/i2c-uclass.o.{0,1}
add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-144 (-144)
Function old new delta
dm_i2c_write 552 408 -144
Total: Before=3828, After=3684, chg -3.76%
It also makes static analysis of maximum stack usage (using the .su
files that are automatically generated during build) easier if there
are no lines saying "dynamic".
[This is not entirely equivalent to the existing code; this now uses
the stack for len <= 64 rather than len <= 63, but that seems like a
more natural limit.]
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Heiko Schocher <hs@denx.de>
SCL direct drive mode prevents communication with devices that
do clock stretching, so disable. The Linux driver doesn't use
this mode, and the engine can handle clock stretching.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: ryan_chen <ryan_chen@aspeedtech.com>
D1 has a register layout like A100 and H616, with the moved SIDDQ bit.
Unlike H616 it does not have any dependencies between PHY instances.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
As Icenowy pointed out, newer manuals (starting with H6) actually
document the register block at offset 0x800 as "HCI controller and PHY
interface", also describe the bits in our "PMU_UNK1" register.
Let's put proper names to those "unknown" variables and symbols.
While we are at it, generalise the existing code by allowing a bitmap
of bits to clear and set, to cover newer SoCs: The A100 and H616 use a
different bit for the SIDDQ control.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Since commit 089ffd0aedb7 ("phy: sun4i-usb: Use CLK and RESET support")
neither of these headers is used. Dropping them allows the driver to be
architecture-independent.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This option is used only by the phy-sun4i-usb driver, which does not
inherently depend on the ARM architecture.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The UEFI console initialisation has been modified by commit 68edbed454b8
("efi_loader: initialize console size late"). A corresponding workaround is
now necessary for the automated tests, as added to some of the tests
already by commit e05bd68ed5fc ("test: work around for EFI terminal size
probing").
Add the same workaround to the UEFI authenticated capsules tests to repair
them.
This can be tested with sandbox_defconfig, sandbox64_defconfig or
sandbox_flattree_defconfig, plus CONFIG_EFI_CAPSULE_AUTHENTICATE=y.
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
%s/formatted/format/
Fixes: 4211fb2ef6dd ("doc: Migrate CodingStyle wiki page to Sphinx")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some consoles use CSI 200~ and CSI 201~ to bracket inserts. This leads
U-Boot to misinterpret the inserted string. Ignore these escape sequences.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Coverity CID 131256 indicates a possible buffer overflow in label_boot().
This would only occur if the size of the downloaded file would exceed 4
GiB. But anyway we can simplify the code by using snprintf() and checking
the return value.
Addresses-Coverity-ID: 131256 ("Security best practices violations (STRING_OVERFLOW)")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Do not suggest successful operation if a flash area to be changed is
actually locked, thus will not execute the request. Rather report an
error and bail out. That's way more user-friendly than asking them to
manually check for this case.
Derived from original patch by Chao Zeng.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
There was no user of this callback after 5b66fdb29dc3 anymore, and its
semantic as now inconsistent between stm and sst26. What we need for the
upcoming new usecase is a "completely unlocked" semantic. So consolidate
over this.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
On probe, the SPI NOR core will put a flash in 8D mode if it
supports it. But Linux as of now expects to get the flash in
1S mode. Handing the flash to Linux in Octal DTR mode means
the kernel will fail to detect the flash.
This commit adds an option to soft reset the flash after
spl_spi_load_image() so that the flash can be reset to 1S mode
and subsequent spi-nor probe in Linux does not fail, since
spl_spi_load_image() performs spi_flash_probe() the remove is
added after completion loading images in spi_flash_probe() itself.
Tested on J721E EVM with 5.10 Linux kernel.
Linux spi-nor probe without the fix:
root@j7-evm:~# dmesg | grep spi-nor
[ 4.928023] spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff
[ 4.934938] spi-nor: probe of spi0.0 failed with error -2
Linux spi-nor probe with the fix:
root@j7-evm:~# dmesg | grep spi-nor
[ 4.904484] spi-nor spi0.0: mt35xu512aba (65536 Kbytes)
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Power-on-Reset is a method to restore flash back to 1S-1S-1S mode from 8D-8D-8D
in the begging of probe.
Command extension type is not standardized across flash vendors in DTR mode.
For suiting different vendor flash devices, adding a flag to seperate types for
soft reset on boot.
Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Follow patch <f6adec1af4b2f5d3012480c6cdce7743b74a6156> (Allow using Micron mt35xu512aba
in Octal DTR mode).
Enable Octal DTR mode with 20 dummy cycles to allow running at the
maximum supported frequency for adding Macronix flash in Octal DTR mode.
-https://www.mxic.com.tw/Lists/Datasheet/Attachments/7841/MX25LM51245G,%203V,%20512Mb,%20v1.1.pdf
Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The sunxi nand SPL loader was broken at least for SUN4I,
SUN5I and SUN7I SOCs since the implementation change
from DMA to PIO usage - commit 6ddbb1e.
Root cause for this issue is the NFC control flag NFC_CTL_RAM_METHOD
being set by method nand_apply_config.
This flag controls the bus being used for the NFCs internal RAM access.
It must be set for the DMA use case only.
See A33_Nand_Flash_Controller_Specification.pdf page 12.
This fix is tested by myself on a Cubietruck A20 board.
Others should test it on new generation SOCs as well.
Signed-off-by: Markus Hoffrogge <mhoffrogge@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The boards that come with a flash memory pre-soldered have a Macronix
flash chip.
Fixes: 280294c5df ("sunxi: boards: Enable SPI flash support in U-Boot proper")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
KConfig has range option, use it instead of notice in the option
descrition.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Many LicheePi Nano boards come with SPI flash soldered, which already
works for booting the SPL and loading U-Boot proper.
With the updated DTB, we can now also use the SPI flash from U-Boot
proper, so enable the bits in the defconfig, to allow loading binaries
from SPI flash.
There seem to be board revisions with a Winbond SPI chip, but also
others with an XTX chip, so include support for both: the actual chip
used will be autodetected.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The SPI controllers in the Allwinner F1Cx00 series of SoCs are
compatible to the H3 IP. The only difference in the integration is
the missing mod clock in the F1C100, instead the SPI clock is directly
derived from the AHB clock.
We *should* be able to model this through the DT, but the addition of
get_rate() requires quite some refactoring, so it's not really worth in
this simple case: We programmed both the PLL_PERIPH to 600 MHz and the
PLL/AHB divider to 3 in the SPL, so we know the SPI base clock is 200
MHz. Since we used a hard coded fixed clock rate of 24 MHz for all the
other SoCs so far, we can as well do the same for the F1C100.
Define the SPI input clock and maximum frequency differently when
compiling for the F1C100 SoC.
Also adjust the power-of-2 divider programming, because that uses a
"minus one" encoding, compared to the other SoCs.
This allows to enable SPI flash support for the F1C100 boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The current SPI clock divider calculation has two problems:
- We use a normal round-down division, which results in a divider
typically being too small, resulting in a too high frequency on the bus.
- The calculaction for the power-of-two divider is very inaccurate, and
again rounds down, which might lead to wild bus frequencies.
This wasn't a real problem so far, since most chips can handle slightly
higher bus frequencies just fine. Also the actual speed was mostly lost
anyway, due to release_bus() reseting the device. And the power-of-2
calculation was probably never used, because it only applies to
frequencies below 47 KHz.
However this will become a problem for the F1C100s support, due to its
much higher base frequency.
Calculate a safe divider correctly (using round-up), and re-use that
value when calculating the power-of-2 value. We also separate the
maximum frequency and the input clock on the way, since they will be
different for the F1C100s.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
As George rightfully pointed out [1], the spi-sunxi driver programs the
speed and mode settings only when the respective functions are called,
but this gets lost over a call to release_bus(). That asserts the
reset line, thus forces each SPI register back to its default value.
Adding to that, trying to program SPI_CCR and SPI_TCR might be pointless
in the first place, when the reset line is still asserted (before
claim_bus()), so those setting won't apply most of the time. In reality
I see two nested claim_bus() calls for the first use, so settings between
the two would work (for instance for the initial "sf probe"). However
later on the speed setting is not programmed into the hardware anymore.
So far we get away with that default frequency, because that is a rather
tame 24 MHz, which most SPI flash chips can handle just fine.
Move the actual register programming into a separate function, and use
.set_speed and .set_mode just to set the variables in our priv structure.
Then we only call this new function in claim_bus(), when we are sure
that register accesses actually work and are preserved.
[1] https://lore.kernel.org/u-boot/20210725231636.879913-17-me@yifangu.com/
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: George Hilliard <thirtythreeforty@gmail.com>
The current detection of RX FIFO depth seems to be not reliable, and
XCH will self-clear when a transfer is done.
Check XCH bit when polling for transfer finish.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This header is not used since commit abdbefba2a4e ("net: sun8i_emac: Use
consistent clock bitfield definitions"). Dropping it allows the driver
to be architecture-independent.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This just prints the PHY mode taken from the devicetree. It does not
need to be printed during every boot, and also avoids an unwanted
line break for the "net: " reporting line.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
For mostly historic reasons we had configuration headers for each
Allwinner CPU "family". These days they are mostly just including one
common header, with the rest being somewhat empty.
There were attempts to remove them, and to just use the one common header
to begin with, but this has implications to the build system, which me
might not be ready for, yet.
To document this behaviour, and to avoid something sneaking in over
time, make those files all the same (minus the CPU family name and
the copyrights), and add a comment explaining that.
This makes it easier to just remove those files later on, when needed
and possible.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The clock and reset drivers use the exact same platform data. Simplify
them by sharing the object. This is safe because the parent device
(the clock device) always gets its driver model callbacks run first.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The reason here is the same as the reason for changing the clock driver:
platform data can be provided when binding the driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
All of the driver private data should really be platform data since it
is determined statically (selected by the compatible string or extracted
from the devicetree). Move everything to platform data, so it can be
provided when binding the driver. This is useful for SPL, or for
instantiating the driver as part of an MFD.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Now that all of the variants use the same bind/probe functions and ops,
there is no need to have a separate driver for each variant. Since most
SoCs contain two variants (the main CCU and PRCM CCU), this saves a bit
of firmware size and RAM.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: add F1C100s support]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This allows all of the clock drivers to use a common bind function.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: add F1C100s support]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Because the gate arrays are not given explicit sizes, the arrays are
only as large as the highest-numbered gate described in the driver.
However, only a subset of the CCU clocks are needed by U-Boot. So there
are valid clock specifiers with indexes greater than the size of the
arrays. Referencing any of these clocks causes out-of-bounds access.
Fix this by checking the identifier against the size of the array.
Fixes: 0d47bc705651 ("clk: Add Allwinner A64 CLK driver")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The reset array size is currently used for bounds checking in the reset
driver. The same bounds check should really be done in the clock driver.
Currently, the array size is provided to the reset driver separately
from the CCU descriptor, which is a bit strange. Let's do this the usual
way, with the array sizes next to the arrays themselves.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: add F1C100s support]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Now that the PHY driver will not try to drive VBUS if it is already
driven by an external supply, there is no need to check the VBUS voltage
before powering on the PHY.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Adding the SPL_USB_DWC3_GENERIC symbol broke some ti builds. This
should fix the builds but untested on HW.
Signed-off-by: Angus Ainslie <angus@akkea.ca>
- Merge the majority of the relevant wiki content to doc/process/ and
convert to Sphinx. Begin cleaning up and modernizing the content as
well to match current process. There is still more work to be done in
this regard.
The wiki had gitdm-generated release statistics starting with v1.3.0.
Re-generate this information as Sphinx. This aims to be as historically
accurate as possible and so some company renames were kept to their old
rather than current name until we had made the switch previously.
Signed-off-by: Tom Rini <trini@konsulko.com>
For quite a long time we've been using a 3 week, rather than 2 week,
merge window as it was only 2 weeks during the timeframe where we did 2
month rather than 3 month releases. This corrects the places that still
had 2 weeks and tries to make things a bit clearer overall.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Migrate the RelaseCycle wiki page to Sphinx. In terms of visible
changes, we stop having a dynamic countdown to when the release is. And
we drop the year-based statistics, that were not being kept up to date.
For the moment, we only link to statistics for v2022.07 but will add
back the historical data in a subsequent patch.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
The "Workflow of a Custodian" section on the wiki had not been changed
in quite some time to reflect how the process has been functioning for
some time. First, update some links to point to modern and current
sources of information.
Second, and more overarching, reword much of the section. This expands
on the expectations of both custodians and developers when it comes to
rebasing patches. Rework the final points to be clearer that Custodians
are expected to do their best to test the changes and ask for help when
needed, as well as that pull requests are expected in a timely manner.
Cc: Claudius Heine <ch@denx.de>
Cc: Martin Bonner <martingreybeard@gmail.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
- Use gender-neutral language to refer to the user, consistently.
- Reword a few places so that they read more naturally.
- Make the long standing practice around "Twilight Time" more clear,
hopefully.
- Replace a reference to MAKEALL with a reference to CI testing as
that's the current requirement.
Cc: Claudius Heine <ch@denx.de>
Cc: Martin Bonner <martingreybeard@gmail.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
- Remove some missed wiki markup, and escape a "\n" correctly.
- Use gender-neutral language to refer to the user, consistently.
Cc: Claudius Heine <ch@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Move the current Process wiki page to doc/develop/process.rst. The
changes here are for formatting or slight rewording so that it reads
well when linking to other Sphinx documents.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
For some time now we've allowed for '//' style comments, which mirrors
the Linux kernel. So drop this point here.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Move the current DesignPrinciples wiki page to
doc/develop/designprinciples.rst. The changes here are for formatting
or slight rewording so that it reads well when linking to other Sphinx
documents.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Move the current CodingStyle wiki page to doc/develop/codingstyle.rst.
The changes here are for formatting or slight rewording so that it reads
well when linking to other Sphinx documents.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
board_usb_init() should receive the controller_index as its
first parameter instead of having it hardcoded as 0.
All in-tree users have CONFIG_SPL_SDP_USB_DEV as 0, so this error
should not affect any board.
Fix it by passing controller_index as the parameter of board_usb_init().
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
The BootROM of MT7621 requires a image header for SPL to record its size
and load address when booting from NAND.
To create such an image, one can use the following command line:
mkimage -T mtk_image -a 0x80200000 -e 0x80200000 -n "mt7621=1"
-d u-boot-spl-ddr.bin u-boot-spl-ddr.img
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Add support to load legacy image with payload compressed. This redirects
the boot flow for all legacy images. If the payload is not compressed, the
actual behavior will remain unchanged.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
If the payload is compressed, SPL_COPY_PAYLOAD_ONLY should always be set
since the payload will not be directly read to its load address. The
payload will first be read to a temporary buffer, and then be decompressed
to its load address, without image header.
If the payload is not compressed, and SPL_COPY_PAYLOAD_ONLY is set, image
header should be skipped on loading. Otherwise image header should also be
read to its load address.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch removes the dependency to SPL_NAND_DRIVERS for SPL_NAND_BASE to
allow minimal spl nand driver to use nand base for probing NAND chips.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds NAND flash controller driver for MediaTek MT7621 SoC.
The NAND flash controller of MT7621 supports only SLC NAND flashes.
It supports 4~12 bits correction with maximum 4KB page size.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds GMAC support for MediaTek MT7621 SoC.
MT7621 has the same GMAC/Switch configuration as MT7623.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The address returned by regmap_get_range() is not remapped. Directly r/w
to this address is ok for ARM platforms since it's idential to the virtual
address.
But for MIPS platform only virtual address should be used for access.
To solve this issue, the regmap api regmap_read/regmap_write should be used
since they will remap address before accessing.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The iobase address from dts node is actually physical address. It's
identical to the virtual address in ARM platform. This is ok because this
driver was used only by ARM platforms (mt7622/mt7623 ...).
But now this driver will be used by mt7621 which is a MIPS SoC. For MIPS
platform the physical address space is mapped to KSEG0 and KSEG1 and this
makes the virtual address apparently not idential to its physical address.
To solve this issue, this patch replaces dev_read_addr with dev_remap_addr
to get the remapped iobase address.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch makes mt7621_wdt driver available for MediaTek MT7621 SoC
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch makes mt7621_gpio driver available for MediaTek MT7621 SoC
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds pinctrl support for MediaTek MT7621 SoC.
The MT7621 SoC supports pinconf, but it is not the same as mt7628.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds a clock driver for MediaTek MT7621 SoC.
This driver provides clock gate control as well as getting clock frequency
for CPU/SYS/XTAL and some peripherals.
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The MT7621 requires external binary blob being executed during u-boot's
boot-up flow. It's necessary to provide a guide here for users to correctly
build the u-boot.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The mt7621_rfb board supports integrated giga PHYs plus one external
giga PHYs. It also has up to 512MiB DDR3, 16MB SPI-NOR, 3 mini PCI-e x1
slots, SDXC and USB.
The mt7621_nand_rfb board is almost the same as mt7621_rfb board, but it
uses NAND flash and SDXC is not available.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds support for MediaTek MT7621 SoC.
All files are dedicated for u-boot.
The default build target is u-boot-mt7621.bin.
The specification of this chip:
https://www.mediatek.com/products/homenetworking/mt7621
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds support for noncached_alloc() which was only supported by
ARM platform.
Unlike the ARM platform, MMU is not used in u-boot for MIPS. Instead, KSEG
is provided to access uncached memory. So most code of this patch is copied
from cache.c of ARM platform, with only two differences:
1. MMU is untouched in noncached_set_region()
2. Address returned by noncached_alloc() is converted using KSEG1ADDR()
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds __image_copy_len needed by TPL of MT7621 SoC.
The __image_copy_len represents the binary blob size of both SPL/TPL
binaries. To achieve this, __text_start/end are added for calculation.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch add more definitions needed for MT7621 initialization.
MT7621 needs to initialize GIC/CPC and other related parts.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
To be compatible with old u-boot used by lots of MT7621 devices, the u-boot
needs to boot-up MT7621's all cores, and all VPES of each core.
This patch adds asm/mipsmtregs.h from linux kernel which is need for
boot-up VPEs.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Ilias has since long been reviewing UEFI patches.
Now he has volunteered to assist me in maintaining the sub-system.
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
efi_dp_str() allocates memory which should be released after use.
Use %pD printf code. Adjust message wording.
Fixes: d837cb1e3b6b ("efi: Add debugging to efi_set_bootdev()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This commit exposes the END device path node.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Our statistics pages have always been generated by gitdm. After
patching gitdm to generate an acceptable Sphinx output for tables,
include that and some other basic formatting here.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
- Explain why fdt_addr and initrd_addr should not be set to disable
relocation normally.
- Provide some advice on the typical loadaddr default value.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This variable is never set nor explained why it would be set, drop it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This tool seems a bit underloved. Unfortunately, it seems to be missing
support for FIT images. Alas...
Add a man page documenting it. The example is taken from commit a804b5ce2d
("Add dumpimage, a tool to extract data from U-Boot images").
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Despite the original description of these options, they are not always
image names, or even files. Some image types use these options to convey
configuration directly. Re-document these options as configuration options.
Additionally, add a new section documenting the format of the configuration
for each image type which uses it. In general, if configuration is used
directly (without a separate file) I have added documentation for it. If
the configuration points to a separate file, I have referenced that file's
documentation. Where there is no such documentation, I have added it.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The mkimage command has had many options added over the years.
Unfortunately, we are starting to run out of short options. Recent options
don't have any obvious relation to their meaning (e.g. -o/-g). Fortunately,
long options exist. Add long options for each current short option.
For the curious, the remaining short options are HIkLmMPQSuUwWXyYzZ.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Per man-pages(7), "use of an AUTHORS section is strongly discouraged."
Remove it, and instead add some copyright notices and an SPDX. The default
license for U-Boot is GPL2, so that's what I put. The copyright dates are
based on the commit dates.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a SEE ALSO section to link to similar man pages, as well as to
the U-Boot documentation.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In leiu of a non-standard HOMEPAGE section, add a BUGS section with a link
to the issue tracker.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This makes a variety of changes for the options to make them
typographically consistent, clarify their meaning, and fix grammatical (or
other) errors. Many of the changes here are stylistic, though there are a
few fixes. The main changes I made across the board were:
- All options are bolded and parameters italicised
- All single quotes are properly matched (instead of using apostrophes)
- Minor background info has been added to clarify many underdocumented
options
- Default values for options are documented
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The description in NAME should not be capitalized. Fix a grammatical error
as well.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This moves some options which work in any mode to the general options
section. -p is moved to after -E/-B since those options are related. This
also adds documentation for -h and -V.
The -F, -l, and -G options are documented twice. Remove the second
documentation in each case. The synopsis for -l also suggests an implied
second uimage-file-name parameter. E.g.
mkimage [-l uimage-file-name] uimage-file-name
This is misleading, so remove it. Wrap a few lines to 80 characters as
well.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The options are divided up into several subsections. Use the appropriate
macro. While we're at it, rename the headings to better reflect the
contents of their sections.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Square brackets are commonly used to denote optional parts of a command.
However, all option arguments are mandatory. Remove these brackets. This
also removes some unnecessary quotation marks, and uses hyphens to connect
words in option arguments. This is intended to just clean up the
formatting, leaving content corrections to later patches.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This puts each example in a new paragraph and uses a hanging indent for
continued lines to increase clarity. We use tabs instead of .in or .RS for
the indent because it renders properly in both man and mandoc (which is
what many common HTML man pages use). The only nit is that the tab stops in
man default to something like 2", so reduce that to 1". We also escape
every "minus" as recommended by man-pages(7).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Blank lines do not have well-defined semantics in fill mode (the default).
Instead, use empty requests (.) where vertical space is necessary for
readability. There are a few places where we use a paragraph instead.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The synopsis section is a bit messy. As an example, "uimage file name" is
printed in italics, bold, and roman (depending on the line). This cleans
things up and converts the synopsis section to use standard style. The
.SY/.YS macros set up appropriate formatting for command synopsis sections
(such as disabling hyphenation and setting a hanging indent). All parts of
the synopsis now use the following style:
- Bold for parts of the command which should be typed in by the user (such
as the program name and flags)
- Italic for parts which should be replaced (such as uimage-file-name)
- Roman for parts which should not be typed at all (such as brackets)
Multi-word variables now use hyphens to connect their words instead of
spaces. This makes it clearer that all the words are part of the same
variable. Additionally, "option ..." is used to denote where other options
may be specified, as this appears to be standard style.
In addition to the above style changes, this also makes some changes to
content. The use of the term "legacy" has been removed, since this simply
refers to any non-FIT image type. Additionally, wording like "uimage file
name" has been replaced with "image-file-name" to better reflect that
images may or may not be uImages. Lastly, the "auto" value for -f is
documented in the synopsis.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Add OP-TEE nodes for stm32mp13x, alligned with upstreamed OP-TEE
- Introduce of_to_plat ops in stm32_sdmmc2 driver
- Activate more features in stm32mp13 defconfig and support of STM32MP13x Rev.Y
- Drop fastboot and stm32prog trigger gpios on STM32MP15x DHCOM board
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Merge tag 'u-boot-stm32-20220712' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Alignment with Linux kernel device tree v5.19 for stm32mp15 and stm32mp13
- Add OP-TEE nodes for stm32mp13x, alligned with upstreamed OP-TEE
- Introduce of_to_plat ops in stm32_sdmmc2 driver
- Activate more features in stm32mp13 defconfig and support of STM32MP13x Rev.Y
- Drop fastboot and stm32prog trigger gpios on STM32MP15x DHCOM board
Introduce define for connection timeout, named HUB_DEBOUNCE_TIMEOUT
as in linux kernel drivers/usb/core/hub.c
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
For now the driver does not probe if usbkbd was not present in stdin.
This presents two issues, we can not probe the driver before setting stdin
and we can not use this driver in other manner than stdin console.
This patch fixes this by adding an else statement. It simply probes the
driver without console management in the case "usbkbd" is not in stdin.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
MPS3 board have a ISP1763 usb controller, enable it to be used
for mass storage access for example. Enable the usb command
also and for the FVP support for mass storage enable the mmc
command.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
ISP1760/61/63 are a family of usb controllers, here the main
goal is to support the ISP1763 hcd part found in the MPS3 FPGA
board form Arm. This is based on the kernel driver and ported
to u-boot.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Move urb code from musb only use to a more common scope, so other
drivers in the future can use the handling of urb in usb.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
When usb PHY initialization is done, the PHY need to be reset.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
keystone doesn't have custom gpio.h that's why don't select
GPIO_EXTRA_HEADER which points to it.
Logic in arch/arm/include/asm/gpio.h is very clear
#ifdef CONFIG_GPIO_EXTRA_HEADER
#include <asm/arch/gpio.h>
#endif
#include <asm-generic/gpio.h>
Where it is visible that there is no gpio.h in platform headers:
$ ls arch/arm/mach-keystone/include/mach/
clock_defs.h clock-k2e.h clock-k2hk.h ddr3.h hardware-k2e.h
hardware-k2hk.h i2c_defs.h mon.h mux-k2g.h xhci-keystone.h
clock.h clock-k2g.h clock-k2l.h hardware.h hardware-k2g.h
hardware-k2l.h mmc_host_def.h msmc.h psc_defs.h
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
PA13 and PA14 are used for USB power control and can't be used
to enforce fastboot or stm32prog mode by pressing a button.
Defining CONFIG_FASTBOOT/CONFIG_CMD_STM32PROG without this patch applied
results in fastboot/stm32prog always starting, because PA13/PA14 are always
low during boot. So drop the wrong trigger gpios definitions.
Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Activate the I2C driver in STM32MP13x config.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Activate the RTC driver in STM32MP13x config.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Activate the RNG driver provided by OP-TEE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
On STM32MP13x STMicroelectronics boards, the UART can reliably go up to
4000000 bauds when connected to the external ST-LINKV3.
This patch adds the support of higher baudrates on STMicroelectronics
STM32MP13x boards with ST-LINKV3.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Activate the led managed in stm32mp1 board for U-Boot indication
in STM32MP13F-DK device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of STM32MP13x Rev.Y for the Silicon revision REV_ID = 0x1003.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
New IP adds a conditional reset that impact the clock
error management. It is now linked to a new compatible.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The stm32mp13 soc differs from the stm32mp15 in terms of
clear register offset for controlling the FMP (Fast Mode Plus).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a "secure" version of STM32 boards based on SCMI when RCC_TZCR.TZEN=1.
Only boards provided by STMicroelectronics are concerned:
-STM32MP157A-DK1
-STM32MP157C-DK2
-STM32MP157C-ED1
-STM32MP157C-EV1
The resources secured by RCC_TZCR.TZEN=1 are managed by OP-TEE
and the associated SCMI services, reset and clock.
These device trees are only supported with stm32mp15_defconfig,
with OP-TEE, SCMI and without SPL support.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
With support of SCMI in OP-TEE, the early malloc usage
increase, the associated defined CONFIG_SYS_MALLOC_F_LEN
need to be increased.
For example, for stm32mp15_defconfig and
stm32mp157c-dk2-scmi.dtsi, we have:
Early malloc usage: 14098 / 80000
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support for new compatible st,stm32mp1-rcc-secure used when the
RCC resource is managed by secured world (RCC_TZCR.TZEN=1)
iand when SCMI is used.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add the uclass ops of_to_plat to parse the device tree properties
to respect the expected sequence by the driver model.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
All the elements of privdata are static and build from device tree,
they are moved in platdata to prepare the support of ops
of_to_plat.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Rename stm32_sdmmc_bind to stm32_sdmmc2_bind as all other functions
in SDMMCv2 driver
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ic51acdfbbba6e971809c1029dd2227038bfe879d
Add the node for SCMI firmware with the associated reserved memory nodes
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add the node for OP-TEE firmware with the associated reserved memory nodes
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Correctly handle STM32MP_BOARD_EXTRA_ENV define in stm32mp15_st_common.h;
the STM32MP_BOARD_EXTRA_ENV is added in CONFIG_EXTRA_ENV_SETTINGS
definition, as it is done "stm32mp15_st_common.h"
Without this patch, the content of STM32MP_BOARD_EXTRA_ENV is not used in
the default environment for STMicroelectronics boards.
Fixes: 806c4dd31532 ("configs: stm32mp1: set the console variable for extlinux.conf")
Reported-by: Gatien CHEVALLIER <gatien.chevallier@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
On p1_p2_rdb_pc platforms, we set ddr_data_init to the "poison" value of
0xdeadbeef rather than a real calculated / derived value. Do this
directly and comment rather than via CONFIG.
Signed-off-by: Tom Rini <trini@konsulko.com>
Perform a basic migration of the calls in setup_serial_number() to DM so
that we can switch to using DM_I2C on this platform.
Cc: David Lechner <david@lechnology.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: David Lechner <david@lechnology.com>
We have a single platform that is both in the OMAP3 family of parts, but
has an EMIF4 memory controller. Currently we hard-code the size of
chip select 0. Make this more clear by putting the value in the
function rather than a CONFIG option.
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently, the imx8mq_phanbell board fails to boot.
Remove the custom CONFIG_SYS_MALLOC_F_LEN setting in favor of the
generic one done via the main Kconfig.
Since commit b598957206e5 ("Kconfig: Fix SYS_MALLOC_F_LEN for i.MX8MQ")
the default SYS_MALLOC_F_LEN value for i.MX8MQ is 0x2000.
With such default value, the board boots again.
Signed-off-by: Fabio Estevam <festevam@denx.de>
In case the MALLOC_F_ADDR is set to non-zero value, the early malloc area is
not going to be placed just below stack top, but elsewhere. Do not reserve
MALLOC_F bytes in this case, as that wastes stack space and may even cause
insufficient stack space in SPL.
This functionality is particularly useful on i.MX8M, where the insufficient
stack space can be triggered.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Tom Rini <trini@konsulko.com>
Correct spelling and copy/paste errors in comments.
Fixes 1c4db59d9b ("regmap: Add support for regmap fields")
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit d293759d55cc ("serial: ns16550: Add support for
SPL_DEBUG_UART_BASE") fixed support for setting correct early debug UART
base address in SPL.
But after this commit, output from Marvell A385 BootROM is truncated or
lost and not fully present on serial console.
Debugging this issue showed that BootROM just put bytes into UART HW output
buffer and does not wait until UART HW transmit all characters. U-Boot
ns16550 early debug is initialized very early and during its initialization
is resetting UART HW and flushing remaining transmit buffer (which still
contains BootROM output).
Fix this issue by waiting in init function prior resetting UART HW until
TxEmpty bit in UART Line Status Register is set. TxEmpty is set when all
remaining bytes from HW buffer are transmitted.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
[trini: Add comment, move ';' to new line per checkpatch.pl]
Signed-off-by: Tom Rini <trini@konsulko.com>
The top level DT node of pwm-leds is not a LED itself, bind NOP uclass
driver to it, and bind different LED uclass driver to its subnodes which
represent the actual LEDs. This change removes the top-level node from
the 'led list' command output and is based on the commit 01074697801b
("led: gpio: Use NOP uclass driver for top-level node").
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
With the current code if the board has an ONFI compliant NAND without
support to the get and set features, U-boot returns an ENOTSUP error when
trying to tune the timings which prevents the probe of the device.
Indeed onfi_set_features() return ENOTSUP error if set/get features is not
supported. In the case of timings we should not return ENOTSUP because we
can use the default timings. The NAND is already capable of listening at
its highest supported rate, so we assume in this case that it is fine to
skip the operation.
Fix it by adding an intermediate nand_onfi_set_timings() function which
does not error out if set/get feature is not supported.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
A new DT binding for describing environment data block has been added in
Linux's commit 5db1c2dbc04c ("dt-bindings: nvmem: add U-Boot environment
variables binding"). Once we get a proper Linux NVMEM driver it'll be
possible to use Linux's binary interface for user-space as documented
in the:
https://www.kernel.org/doc/html/latest/driver-api/nvmem.html
This commits makes fw_env fallback to looking for a compatible NVMEM
device in case config file isn't present. In a long term this may make
config files redundant and avoid code (info) duplication.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
If CONFIG_CC_OPTIMIZE_FOR_DEBUG=y, the host tools should be built with
debug symbols and with reduced optimization.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
sandbox_defconfig builds the DA7219 driver. It should be possible to
build the sandbox without ACPI support.
ACPI support in the DA7219 driver is only needed when creating an ACPI
table. Fix building with ACPIGEN=n.
Fixes: 0324b7123e22 ("sound: Add an ACPI driver for Dialog Semicondutor da7219")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
sandbox_defconfig builds the max98357a driver. It should be possible to
build the sandbox without ACPI support.
ACPI support in the max98357a driver is only needed when creating an ACPI
table. Fix building with ACPIGEN=n.
Fixes: 54bcca29737f ("sound: Add an ACPI driver for Maxim MAX98357ac")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Fix multiple issues in ubifs distroboot code:
U-Boot supports attaching only one MTD device as UBI at the time. So
always call 'ubifsmount ubi0:${bootubivol}' for mounting UBI volume
${bootubivol}. Usage of 'ubi${devnum}' is incorrect as 'ubi part'
command attach MTD device always as UBI device ubi0.
Set distroboot ${bootfstype} variable to ubifs in ubifs_boot command.
Distroboot scripts require ${bootfstype} variable to be properly set and it
is already set for all other boot types.
Set distroboot ${distro_bootpart} variable to ${bootubivol} value. UBI
device does not have partitions, but has volumes. Distroboot scripts
require something to be set in ${distro_bootpart} variable, so set it to
the UBI volume which is currently mounted by ubifs.
Set distroboot ${devnum} variable to fixed string "ubi0". ubifs code
differs from the other partition code that it requires "ubi" prefix before
number.
Explicitly unmount ubifs volume after loading all data from it. This allows
to detach UBI device from MTD device.
Move definition of MTD device with UBI and UBI volume with ubifs filesystem
from global env variables ${bootubipart} and ${bootubivol} into the
distroboot "func" macro, defined in board include config files. UBIFS
distroboot macros then set ${bootubipart} and ${bootubivol} local variables
for compatibility with existing distroboot scripts.
This last change allows to define more UBIFS target devices and make it
clear what is boot MTD/UBI device.
All board include config files are adjusted to use this new scheme of
specifying boot MTD/UBI device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Original ubifs code was designed that after ubifs_umount() call it is
required to also call ubi_close_volume() which closes underlying UBI
volume. But U-Boot ubifs modification have not implemented it properly
which caused that ubifsumount command contains resource leak. It can be
observed by calling simple sequence of commands:
=> ubi part mtd2
ubi0: attaching mtd2
...
=> ubifsmount ubi0
=> ubifsumount
Unmounting UBIFS volume rootfs!
=> ubi detach
ubi0 error: ubi_detach_mtd_dev: ubi0 reference count 1, destroy anyway
ubi0: detaching mtd2
ubi0: mtd2 is detached
Fix this issue by calling ubi_close_volume() and mutex_unlock() in
directly in ubifs_umount() function before freeing U-Boot's global
ubifs_sb. And remove duplicate calls of these two functions in remaining
places. Note that when ubifs_umount() is not called then during error
handling is still needed to call ubi_close_volume() and mutex_unlock.
With this change ubifsumount command does not throw that error anymore:
=> ubi part rootfs
ubi0: attaching mtd2
...
=> ubifsmount ubi0
=> ubifsumount
Unmounting UBIFS volume rootfs!
=> ubi detach
ubi0: detaching mtd2
ubi0: mtd2 is detached
Signed-off-by: Pali Rohár <pali@kernel.org>
When having environment stored in EXT4 or FAT
and using an AHCI or SCSI device / partition
the scan would not be performed early enough
and hence the device would not be recognized.
This change adds the scan when the interface
is "scsi" in a similar way to mmc_initialize.
Signed-off-by: Rogier Stam <rogier@unrailed.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
This converts the following to Kconfig:
CONFIG_SYS_BOOTM_LEN
As part of this, rework error handling in boot/bootm.c so that we pass
the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not
be available to host tools but we do know the size that we passed to
malloc().
Cc: Soeren Moch <smoch@web.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
We only reference CONFIG_SYS_BFTIC3_BASE in one location. Move the
comment to where we reference it, and use the value directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
As this is used in the environment, reference it directly rather than as
a CONFIG value.
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
With the last platform for this architecture removed, remove the rest of
the architecture support as well.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
Signed-off-by: Tom Rini <trini@konsulko.com>
All of these symbols are not referenced anywhere else in the code, so
remove them.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
On platforms that use CONFIG_USB_OHCI_NEW we do not need to set
CONFIG_SYS_USB_OHCI_REGS_BASE nor CONFIG_SYS_USB_OHCI_SLOT_NAME. Drop
these from platforms that we can.
Signed-off-by: Tom Rini <trini@konsulko.com>
At this point, the only user of ohci-hcd that also uses PCI is using DM,
so we can drop CONFIG_PCI_OHCI* usage. No platforms set either of
CONFIG_SYS_USB_OHCI_BOARD_INIT or CONFIG_SYS_USB_OHCI_CPU_INIT so those
hooks can be removed as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_OHCI_SWAP_REG_ACCESS
CONFIG_SYS_USB_OHCI_CPU_INIT
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
CONFIG_SYS_USB_OHCI_SLOT_NAME
CONFIG_USB_ATMEL
CONFIG_USB_ATMEL_CLK_SEL_PLLB
CONFIG_USB_ATMEL_CLK_SEL_UPLL
CONFIG_USB_OHCI_LPC32XX
CONFIG_USB_OHCI_NEW
Signed-off-by: Tom Rini <trini@konsulko.com>
Tighten up symbol dependencies in a number of places. Ensure that a SPL
specific option has at least a direct dependency on SPL. In places
where it's clear that we depend on something more specific, use that
dependency instead. This means in a very small number of places we can
drop redundant dependencies.
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
This is a preliminary documentation introducing different
boot sequences, and notably the recovery mode.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20220706093649.3261229-1-narmstrong@baylibre.com
The AST2600 has a Qemu model that allows testing. Create a SPI NOR image
containing the combined SPL and u-boot FIT image.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The generic arm linker script contains this section:
.bss __rel_dyn_start (OVERLAY) : {
...
}
The (OVERLAY) syntax in the description causes the .bss section to be
included in the NOR area of the image:
$ objdump -t -j .bss spl/u-boot-spl
SYMBOL TABLE:
0000c61c l d .bss 00000000 .bss
0000c640 l O .bss 00000040 __value.0
0000c68c g O .bss 00000000 __bss_end
0000c61c g O .bss 00000000 __bss_start
0000c680 g O .bss 0000000c stdio_devices
This is what the custom linker script tries to avoid, as the NOR area is
read-only.
Remove the OVERLAY syntax to fix the BSS location:
$ objdump -t -j .bss spl/u-boot-spl
SYMBOL TABLE:
83000000 l d .bss 00000000 .bss
83000000 l O .bss 00000040 __value.0
0000c61c g O .bss 00000000 __image_copy_end
8300004c g O .bss 00000000 __bss_end
83000000 g O .bss 00000000 __bss_start
83000040 g O .bss 0000000c stdio_devices
This restores the state of the linker script before the patch that fixed
the linker lists issue.
Fixes: f6810b749f2e ("aspeed/ast2600: Fix SPL linker script")
Signed-off-by: Joel Stanley <joel@jms.id.au>
The normal way of loading u-boot is as a FIT, so configure u-boot.img as
the SPL playload.
The u-boot-with-spl.bin target will add padding according to
CONFIG_SPL_MAX_SIZE which defaults to 64KB on the AST2600.
With this the following simple steps can be used to build and boot a
system:
make u-boot-with-spl.bin
truncate -s 64M u-boot-with-spl.bin
qemu-system-arm -nographic -M ast2600-evb \
-drive file=u-boot-with-spl.bin,if=mtd,format=raw
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The AST2600 bootrom has a max size of 64KB. This can be overridden if the
system is running the SPL from SPI NOR and not using secure boot.
Signed-off-by: Joel Stanley <joel@jms.id.au>
The HACE driver lacks support for all the hash types, causing boot to
fail with the default FIT configuration which uses CRC32.
Additionally the Qemu model or the u-boot driver is unable to correctly
compute the SHA256 hash used in a FIT.
Disable HACE by default while the above issues are worked out to enable
boot testing in Qemu.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Allows loading one u-boot from another. Useful for testing on hardware.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Useful for testing images with the default hash type.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The Aspeed SDHCI controller is arranged with some shared control
registers, followed by one or two sets of actual SDHCI registers.
Adjust the driver to probe this controller device first. The driver then
wants to iterate over the child nodes to probe the SDHCI proper:
ofnode node;
dev_for_each_subnode(node, parent) {
struct udevice *dev;
int ret;
ret = device_bind_driver_to_node(parent, "aspeed_sdhci",
ofnode_get_name(node),
node, &dev);
if (ret)
return ret;
}
However if we did this the sdhci driver would probe twice; once
"naturally" from the device tree and a second time due to this code.
Instead of doing this we can rely on the probe order, where the
controller will be set up before the sdhci devices. A better solution is
preferred.
Select MISC as the controller driver is implemented as a misc device.
Signed-off-by: Joel Stanley <joel@jms.id.au>
The reset control was written for the ast2500 and directly programs the
clocking register.
So we can share the code with other SoC generations use the reset device
to deassert the I2C reset line.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
The I2C driver shares a reset line between buses, so allow it to test
the state of the reset line before resetting it.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
The EVB has an EEPROM on bus 3 and a LM75 temp sensor on bus 7. Enable
those busses we can test the I2C driver.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
The same as the upstream Linux device tree, each i2c bus has a property
specifying the reset line.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Set the pinctrl groups for each I2C bus. These are essential to
I2C operating correctly.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Anytime a new revision of a chip is produced, Texas Instruments
will increment the 4 bit VARIANT section of the CTRLMMR_WKUP_JTAGID
register by one. Typically this will be decoded as SR1.0 -> SR2.0 ...
however a few TI SoCs do not follow this convention.
Rather than defining a revision string array for each SoC, use a
default revision string array for all TI SoCs that continue to follow
the typical 1.0 -> 2.0 revision scheme.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Add new Toradex MAC OUI (8c:06:cb), to the config block. With this change
we extend the possible serial-numbers as follows:
For serial-numbers 00000000-16777215 OUI 00:14:2d is taken
For serial-numbers 16777216-33554431 OUI 8c:06:cb is taken
Lower 24-bit of the serial number are used in the NIC part of the
MAC address, the complete serial number can be calculated using the OUI.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Do 1 byte address checks first prior to doing 2 byte address checks.
When performing 2 byte addressing on 1 byte addressing eeprom, the
second byte is taken in as a write operation and ends up erasing the
eeprom region we want to preserve.
While we could have theoretically handled this by ensuring the write
protect of the eeproms are properly managed, this is not true in case
where board are updated with 1 byte eeproms to handle supply status.
Flipping the checks by checking for 1 byte addressing prior to 2 byte
addressing check prevents this problem at the minor cost of additional
overhead for boards with 2 byte addressing eeproms.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Due to supply chain issues, we are starting to see a mixture of eeprom
usage including the smaller 7-bit addressing eeproms such as 24c04
used for eeproms.
These eeproms don't respond well to 2 byte addressing and fail the
read operation. We do have a check to ensure that we are reading the
alternate addressing size, however the valid failure prevents us
from checking at 1 byte anymore.
Rectify the same by falling through and depend on header data comparison
to ensure that we have valid data.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The eeprom data area is much bigger than the data we intend to store,
however, with bad programming, we might end up reading bad records over
and over till we run out of eeprom space. instead just exit when 10
consecutive records are read.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Static DMA channel data for R5 SPL is mostly board agnostic so use SOC
configs instead of EVM specific config to ease adding new board support.
Drop J7200 EVM specific settings as its same as J721e
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Add CONFIG_NR_DRAM_BANKS from am62x_evm_a53_defconfig as this is
needed to calculate the size of DDR that is available.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.
A second fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Use the appropriate fdtdec_setup_mem_size_base() call in
dram_init() and fdtdec_setup_bank_size() in dram_bank_init()
to pull these values from DT, where they are already available,
instead of hardcoding them.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mark the memory node with u-boot,dm-spl so we can use it
from early SPL on both R5 and A53.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The spl_enable_dcache() function calls dram_init_banksize()
to get the total memory size. Normally the dram_init_banksize()
setups the memory banks, while the total size is reported
by ddr_init(). This worked so far for K3 since we set the
gd->ram_size in dram_init_banksize() as well.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
There are two decimal digits reserved to encode the module version and
revision. This code so far implemented A-Z which used 0-25 of this
range.
This commit extends the range to make use of all 99 numbers. After
capital letters the form with a hashtag and number (e.g. #26) is used.
Examples:
If the assembly version is between zero and 25 the numbering is as follows,
as it also has been before this commit:
0: V0.0A
1: V0.0B
...
25: V0.0Z
New numbering of assembly version:
If the number is between 26 and 99 the new assembly version name is:
26: V0.0#26
27: V0.0#27
...
99: V0.0#99
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
With those defines the length can be reused and is in one place
extendable.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Prevent memory issues that could appear with sprintf. Replace all
sprintf occurences with snprintf.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
While configuring SerDes, errors could be encountered, in these cases,
return instead of going ahead. This is will help in booting even if
configuration of SerDes fails.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
implement overrides for spl_spi_boot_bus() and spl_spi_boot_cs()
lookup functions according to bootmode selection, so as to support
both QSPI and OSPI boot using the same build.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Currently the SPI flash to load from is defined through the compile
time config CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS, this
prevents the loading of binaries from different SPI flash using the
same build.E.g. supporting QSPI flash boot and OSPI flash boot
on J721E platform is not possible due to this limitation.
This commit adds lookup functions spl_spi_boot_bus()
and spl_spi_boot_cs for identifying the flash device based on the
selected boot device, when not overridden the lookup functions are
weakly defined in common/spl/spl_spi.c.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This converts the following to Kconfig:
CONFIG_KIRKWOOD_EGIGA_INIT
CONFIG_KIRKWOOD_PCIE_INIT
CONFIG_KIRKWOOD_RGMII_PAD_1V8
CONFIG_KM_DISABLE_PCIE
Signed-off-by: Tom Rini <trini@konsulko.com>
These CONFIG options are only used on this board, in the board file
itself. Remove these from the CONFIG namespace and define in the board
file.
Signed-off-by: Tom Rini <trini@konsulko.com>
The symbol CONFIG_PCI_CLK_FREQ is local to this board. Provide equal
clarity in the code by referencing the numeric value directly and move
the explanatory comment to the code, just prior to use.
Signed-off-by: Tom Rini <trini@konsulko.com>
This driver is not enabled anywhere, remove it. Also remove definitions
of symbols only used in this driver, on platforms that did not enable
it.
Signed-off-by: Tom Rini <trini@konsulko.com>
As things stand currently, there is only one PowerPC platform that
enables the options for CHAIN_OF_TRUST. From the board header files,
remove a number of never-set options. Remove board specific values from
arch/powerpc/include/asm/fsl_secure_boot.h as well. Rework
include/config_fsl_chain_trust.h to not abuse the CONFIG namespace for
constructing CHAIN_BOOT_CMD. Migrate all of the configurable addresses
to Kconfig.
If any platforms are re-introduced with secure boot support, everything
required should still be here, but now in Kconfig, or requires migration
of an option to Kconfig.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The way that secure boot is implemented today on NXP ARM platforms does
not reuse the elements found in include/config_fsl_chain_trust.h to
construct CONFIG_SECBOOT but instead board header files have their
environment setup as needed and then fsl_setenv_chain_of_trust() will
set secureboot in the environment. Remove a large number of unused
defines here.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Move setting of SPL_UBOOT_KEY_HASH to a non-NULL value to Kconfig. As
part of this, change fsl_secboot_validate(...) to check that it is
passed a non-empty string, rather than non-NULL.
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Make all of the CHAIN_OF_TRUST options be under a single menu and add a
comment for the rest, so the resulting config file reads more clearly.
Remove duplicate CHAIN_OF_TRUST options from
board/congatec/common/Kconfig. Remove duplicate NXP_ESBC config
questions and move to arch/Kconfig.nxp.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_KEY_REVOCATION
CONFIG_SYS_FSL_SFP_BE
CONFIG_SYS_FSL_SFP_LE
CONFIG_SYS_FSL_SFP_VER_3_0
CONFIG_SYS_FSL_SFP_VER_3_2
CONFIG_SYS_FSL_SFP_VER_3_4
CONFIG_SYS_FSL_SRK_LE
This partly means making sure to enable SYS_FSL_ERRATUM_A007186 only for
when CHAIN_OF_TRUST is enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FSL_SEC_MON
CONFIG_SYS_FSL_SEC_MON_BE
CONFIG_SYS_FSL_SEC_MON_LE
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_HETROGENOUS_CLUSTERS
CONFIG_SYS_MAPLE
CONFIG_SYS_CPRI
CONFIG_PPC_CLUSTER_START
CONFIG_DSP_CLUSTER_START
CONFIG_SYS_CPRI_CLK
CONFIG_SYS_ULB_CLK
CONFIG_SYS_ETVPE_CLK
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SAMSUNG_ONENAND
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
We rename the S5P specific "CONFIG_PWM" to CONFIG_PWM_S5P and move it to
Kconfig. Given the usage of CONFIG_PWM_NX, we have that select this new
symbol.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
- Drop the emulator CONFIG test from include/configs/ls1088ardb.h
- Migrate CONFIG_SYS_FSL_DDR_EMU to a select'able option in
drivers/ddr/fsl/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
As this driver can dynamically determine the values set in
CONFIG_DW_WDT_BASE when using WDT, so make this depend on WDT rather
than migrate CONFIG_DW_WDT_BASE to Kconfig.
Cc: Chee Tien Fong <tien.fong.chee@intel.com>
Cc: Chin-Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinh.nguyen@intel.com>
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Stefan Roese <sr@denx.de>
Cc: hee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This value is always used at the default, rename it for now. This
likely should come from the device tree if non-default, moving forward.
Signed-off-by: Tom Rini <trini@konsulko.com>
In this test case, a image binary, helloworld.efi.signed, is willfully
modified to print a corrupted message while the signature itself is
unchanged.
This binary must be rejected under secure boot mode.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
At the last step of PE image authentication, an image's hash value must be
compared with a message digest stored as the content (of SpcPeImageData type)
of pkcs7's contentInfo.
Fixes: commit 4540dabdcaca ("efi_loader: image_loader: support image authentication")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This function is used to calculate a message digest as part of
authentication process in a later patch.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In MS authenticode, pkcs7 should have data in its contentInfo field.
This data is tagged with SpcIndirectData type and, for a signed PE image,
provides a image's message digest as SpcPeImageData.
This parser is used in image authentication to parse the field and
retrieve a message digest.
Imported from linux v5.19-rc, crypto/asymmetric_keys/mscode*.
Checkpatch.pl generates tones of warnings, but those are not fixed
for the sake of maintainability (importing from another source).
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Commit 81755b8c20fe ("usb: host: ehci-generic: Make resets and clocks
optional") improved the error check to cover the reset property being
optional. However this was using the wrong error variable for the
check, so would now never fail.
Use the correct error variable for checking the result of
reset_get_bulk(), to actually report genuine errors.
Fixes: 81755b8c20fe ("usb: host: ehci-generic: Make resets and clocks optional")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
After more patches code for jumping to _start_cont symbol in flash memory
involved to code with useless mathematical operations. Currently it does:
r3 := CONFIG_SYS_MONITOR_BASE + ABS(_start_cont) - CONFIG_SYS_MONITOR_BASE
jump to r3
Which is equivalent of just:
r3 := ABS(_start_cont)
jump to r3
The purpose of that code is just to jump to _start_code symbol,
independently of program counter. So branch must be done to absolute
address. Trying to write:
ba _start_cont
just cause linker error:
LD u-boot
powerpc-linux-gnuspe-ld.bfd: arch/powerpc/cpu/mpc85xx/start.o: in function `switch_as':
(.bootpg+0x4b8): relocation truncated to fit: R_PPC_ADDR24 against symbol `_start_cont' defined in .text section in arch/powerpc/cpu/mpc85xx/start.o
make: *** [Makefile:1801: u-boot] Error 1
Probably by the fact that absolute address cannot be expressed by 24-bits.
So write the code via mtlr+blr pattern as it was before and load general
purpose register with absolute address of the symbol:
lis r3,_start_cont@h
ori r3,r3,_start_cont@l
mtlr r3
blr
Seems that gcc and gnu ld linker support symbol@h and symbol@l syntax like
number@h and number@l without any problem. And disassembling of compiler
u-boot binary proved that lis+ori instructions are called with numbers
which represent halves of absolute address of _start_cont symbol.
Signed-off-by: Pali Rohár <pali@kernel.org>
From whole P1/P2 family of RDB boards is TDM-PMC card (PCI Mezzanine Card,
Freescale PQ-MDS-T1) available only on P1021RDB and P1025RDB boards.
So address mapping for TDM-PMC card on LBC should not be enabled on any
other P1/P2 RDB board as there is no device at that TDM-PMC address.
Support for P1021RDB and P1025RDB boards was already removed from mainline
U-Boot in commits 6d1dd76afe85 ("board/freescale: Remove P1021RDB board
support") and d521cece5adb ("board/freescale: Remove P1025RDB board
support").
So do not enable TDM-PMC address mapping on remaining P1/P2 RDB boards and
remove all macros related to TDM-PMC address mappings.
Signed-off-by: Pali Rohár <pali@kernel.org>
DT node pic@40000 is defined explicitly in p2020-post.dtsi file and also
transitionally via include file pq3-mpic.dtsi. Remove duplicate definition
from p2020-post.dtsi.
No change in final DTB file.
Signed-off-by: Pali Rohár <pali@kernel.org>
ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function
nand_scan_ident() has not selected ecc.mode or when it selected it to none
ecc mode.
Distinguish between these two states by checking of node property
"nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode.
This change fixes usage of none ecc mode if it is specified in DTS file.
Fixes: c9ea9019c5aa ("mtd: rawnand: fsl_elbc: Use ECC configuration from device tree")
Signed-off-by: Pali Rohár <pali@kernel.org>
The requsted partition disk sector incorrectly has the parition start
sector added in twice for UCLASS_PARTITION devices. The efi_disk_rw_blocks()
routine adds the diskobj->offset to the requested lba. When the device
is a UCLASS_PARTITION, the dev_read() or dev_write() routine is called
which adds part-gpt_part_info.start. This causes I/O to the wrong sector.
Takahiro Akashi suggested removing the offset field from the efi_disk_obj
structure since disk-uclass.c handles the partition start biasing. Device
types other than UCLASS_PARTITION set the diskobj->offset field to zero
which makes the field unnecessary. This change removes the offset field
from the structure and removes all references from the code which is
isolated to the lib/efi_loader/efi_disk.c module.
This change also adds a test for the EFI ReadBlocks() API in the EFI
selftest code. There is already a test for reading a FAT file. The new
test uses ReadBlocks() to read the same "disk" block and compare it to
the data read from the file system API.
Signed-Off-by: Paul Barbieri <plb365@gmail.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Without the patch for qemu-x86_defconfig:
* sizeof(lbaint_t) = 4 in dev_read()
* sizeof(lbaint_t) = 8 in blkcache_read()
CONFIG_SYS_64BIT_LBA is defined in common.h via
include/configs/x86-common.h:22.
We have to include common.h before including blk.h.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The documentation above the DEFINE_ALIGN_BUFFER says it's for use
outside functions, but we're inside one.
Instead use ALLOC_CACHE_ALIGN_BUFFER, the stack based macro, which also
includes the cache alignment.
Fixes: b583348ca8c8 ("image: fit: Align hash output buffers")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Tested-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Both of us are working on NAND subsystem on several architectures and
we have boards and projects to improve the subsystem in uboot. The idea
is to guarantee quick feedback on patches sent on mailing list and most
of the time the possibilities to test them.
Cc: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Tom Rini <trini@konsulko.com>
Since I'm leaving the company with end of June, the maintainership will
be transferred to Wolfgang Wallner.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
All the source code of clk-mem-n5x.c and clk-n5x.c are from Intel,
update the license to use both GPL2.0 and BSD-3 Clause because this
copy of code may used for open source and internal project.
Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Before relocating to SDRAM, the ECC is initialized by clearing the
whole SDRAM. In order to speed this up, dcache_enable is used (see
sdram_init_ecc_bits).
Since commit 503eea451903 ("arm: cp15: update DACR value to activate
access control"), this no longer works, because running code in OCRAM
with the XN bit set causes a page fault. Override dram_bank_mmu_setup
to disable XN in the OCRAM and setup DRAM dcache before relocation.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For some reason, on the Mercury+ AA1 module, calling
fpgamgr_wait_early_user_mode immediately after writing the peripheral
bitstream leaves the fpga in a broken state (ddr calibration hangs).
Adding a delay before the first sync word is written seems to fix this.
Inspecting the fpgamgr registers before and after the delay,
imgcfg_FifoEmpty is the only bit that changes. Waiting for this bit
(instead of a hardcoded delay) also fixes the issue.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Apply some optimizations to speed up bitstream loading
(both for full and split periph/core bitstreams):
* Change the size of the first fs read, so that all the subsequent
reads are aligned to a specific value (called MAX_FIRST_LOAD_SIZE).
This value was chosen so that in subsequent reads the fat fs driver
doesn't have to allocate a temporary buffer in get_contents
(assuming 8KiB clusters).
* Change the buffer size to a larger value when reading to ddr
(but not too large, because large transfers cause a stack overflow
in the dwmmc driver).
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Using udelay while the clocks aren't fully configured causes the timer
system to save the wrong clock rate. Use sdelay and wait_on_value
instead (the values used in these functions were found experimentally).
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
This driver is a child of the rstmgr driver, both of which share the
same devicetree node. As a result, passing the child's udevice pointer
to dev_read_addr_ptr results in a failure of reading the #address-cells
property. Use the parent udevice pointer instead.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
From the ATSHA204A datasheet (document DS40002025A):
Wake: If SDA is held low for a period greater than tWLO, the device
exits low-power mode and, after a delay of tWHI, is ready to receive
I2C commands.
tWHI value can be found in table 7-2.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add defconfig and Kconfig files for Google Chameleon V3 board
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add devicetrees for Google Chameleon V3 board
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add handoff headers for the Google Chameleonv3 variants: 480-2 and
270-3. Both files were generated using qts-filter-a10.sh.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Fix for rk3328 nonopi-r2s boot env;
- Fix for rk8xx pmic boot on power plug-in;
- Fix for tee.bin support in fit image;
- rk3288 board dts update or fix;
- Some rk3399 board fix;
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Merge tag 'u-boot-at91-2022.10-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2022.10 cycle:
This feature set includes mostly fixes and alignments: DT alignment with
Linux for sama7g5, removal of invalid eeprom compatibles, removal of
extra debug_uart_init calls for all at91 boards, support for pio4 driver
pioE bank, and other minor fixes and enhancements for sam9x60 and
sama5d2_icp boards.
- Convert a large number of CONFIG symbols to Kconfig. Of note is a
large chunk of USB symbols (and dead code removal), ensuring all
SPL/TPL/VPL symbols have an appropriate dependency, largely (but not
entirely) removing the testing of CONFIG_SPL_BUILD in board headers,
and allowing CONFIG_EXTRA_ENV_TEXT and CONFIG_EXTRA_ENV_SETTINGS to
co-exist as this facilities migration of many platforms.
When the requested flash speed is 0, the baudrate division for the
requested speed causing drop in the performance. So set the ospi flash
to operate at max frequency when requested speed is zero.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-6-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
On versal platform, enable apb linear mode for apb read and write
execute operations amd disable it when using dma reads. This is done by
xilinx_pm_request() secure calls when CONFIG_ZYNQMP_FIRMWARE is enabled,
else we use direct raw reads and writes in case of mini U-Boot.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-5-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
When flash operated at non default mode like DDR, flash need to be reset
to operate in SDR mode to read flash ids by spi-nor framework. Reset the
flash to the default state before using the flash. This reset is handled
by a gpio driver, in case of mini U-Boot as gpio driver is disabled, we
do raw read and write access by the registers.
Versal platform utilizes spi calibration for read delay programming, so
incase by default read delay property is set in DT. We make sure not to
use read delay from DT by overwriting read_delay with -1.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-4-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add support for cadence ospi driver for Versal platform. This driver
provides support for DMA read operation which utilizes cadence qspi
driver.
If "cdns,is-dma" DT property is specified use dma for read operation
from cadence_qspi driver. As cadence_qspi_apb_dma_read() is defined in
cadence_ospi_versal driver add a weak function defination in
cadence_qspi driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-3-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Move all the cadence macros from cadence_qspi_apb.c to cadence_qspi.h
file.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-2-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
mxs_nand_command() implementation assume that it's working with a
LP NAND, which is a common case nowadays and thus uses two bytes
for column address.
However this is wrong for NAND_CMD_READID and NAND_CMD_PARAM, which
expects only one byte of column address, even for LP NANDs.
This leads to ONFI detection problem with some NAND manufacturer (like
Winbond) but not with others (like Samsung and Spansion)
We fix this with a simple workaround to avoid the 2nd byte column address
for those two commands.
Also align the code with nand_base to support 16 bit devices.
Tested on an iMX6SX device with:
* Winbond W29N04GVSIAA
* Spansion S34ML04G100TF100
* Samsung K9F4G08U00
Tested on imx8mn device with:
* Windbond W29N04GV
Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
CC: Stefano Babic <sbabic@denx.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Sync the pinebook pro to upstream 5.18, in particular this brings
brings in a fix so the DP is disabled so Linux will actually boot.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockpro64 has some GPIO leds so let's enable them so the
user gets some output in early boot.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Set a default offset for environment so it doesn't write it to
unexpected locations, drop unneeded mtd config option.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For Rockchip boards with the all rk8xx series PMICs (excluding the
rk808), it is sometimes desirable to not boot whenever the device is
plugged in. An example would be for the Odroid Go Advance.
This provides a configurable option to check the PMIC says it was
powered because of a plug-in event. If the value is 1 and this option
is selected, the device shuts down shortly after printing a message
to console stating the reason why it's shutting down. Powering up the
board with the power button is not affected.
This patch parallels the work done in the following patch series:
https://lore.kernel.org/u-boot/20220121133732.2397273-1-andre.przywara@arm.com/
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add support for sysreset shutdown for this PMIC. The values were pulled
from the various datasheets, but for now it has only been tested on
the rk817 (for an Odroid Go Advance).
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit adds support for the OP-TEE 'tee.bin' v1 format for Rockchip
platforms.
Since OP-TEE 3.8.0, tee.bin contains meta-data in a proprietary format
in addition to the ELF data. They are essential information for proper
initialization of the TEE core, such as the size of the memory region
covered by the TEE or a compact representation of runtime relocation
data when ASLR is enabled.
With OP-TEE 3.8.0 onwards, 'tee.elf' MUST NOT be used and 'tee.bin'
MUST be used instead. Ignoring this recommendation can lead to crashes
as described in [3].
Link: [1] 5dd1570ac5
Link: [2] https://github.com/OP-TEE/optee_os/blob/3.17.0/scripts/gen_tee_bin.py#L275-L302
Link: [3] https://github.com/OP-TEE/optee_os/issues/4542
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
The NanoPi-R2S doesn't have eMMC so use the sdcard as the device
to save the environment variables
Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to better compare the Linux rk3288.dtsi version
with the u-boot version move the dma-controller nodes
to the DT root.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to better compare the Linux rk3288.dtsi version
with the u-boot version sort the mipi,hdmi,lvds and dp nodes.
Changed:
Rename mipi_dsi label.
Rename dp nodename.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
With the conversion of rockchip-usb-phy.yaml a long time used fallback
string for rk3066a/rk3188 was added. The linux driver doesn't do much with
the GRF phy address range, however the u-boot driver rockchip_usb2_phy.c
does. The bits in GRF_UOC0_CON2 for rk3066a/rk3188 and rk3288 for example
don't match. Remove the usb-phy fallback string for rk3188
to prevent possible strange side effects.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change define condition in board_usb_init() function
to allow rk3066/rk3188 to use the USB PHY driver.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add rk3066a/rk3188 support to rockchip_usb2_phy.c
They don't have completely identical usb phy registers,
so separate comapatible strings and data.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Product id of rk3066 usb otg is 0x300a.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The configs ROCKCHIP_CHIP_TAG and ROCKCHIP_MAX_INIT_SIZE were
originally added with rksd.c, rkspi.c and rkcommon.c in mind,
but are no longer in use and replaced by struct spl_info,
so remove unused configs for tag and size.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This is not needed or used, and adds code size. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Move the environment text over from being set via
CONFIG_EXTRA_ENV_SETTINGS in include/configs/gw_ventana.h and over
to plain text in board/gateworks/gw_ventana/gw_ventana.env. This lets
us drop CONFIG_EXTRA_ENV_SETTINGS_COMMON as everything resides in a
single environment file now.
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
- Ensure that everyone setting mtdids= and mtdparts= is doing so via the
CONFIG options.
- If the CONFIG options are set, ensure that the default environment
sets mtdparts / mtdids.
Signed-off-by: Tom Rini <trini@konsulko.com>
The "autoload" environment variable is always checked with env_get_yesno
as it can be set to any form of no. The default behavior of
env_get_yesno is to return -1 on variables that are not set, which acts
as true in general (we test for non-zero return). To convert
CONFIG_SYS_AUTOLOAD to Kconfig, given that it was almost always used to
set autoload to no, first rename to CONFIG_SYS_DISABLE_AUTOLOAD for
consistency sake. Then, make it so that if enabled we set autoload=0 in
the default environment. Migrate all platforms which set
CONFIG_SYS_AUTOLOAD to non-true or that set autoload to false in their
default environment to using CONFIG_SYS_DISABLE_AUTOLOAD
Signed-off-by: Tom Rini <trini@konsulko.com>
Move the environment text over from being set via
CONFIG_EXTRA_ENV_SETTINGS in include/configs/opos6uldev.h and over to
plain text in board/armadeus/opos6uldev/opos6uldev.env. This lets us
manage env_version without a CONFIG variable.
Cc: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_ENV_RANGE
Now that this is in Kconfig we can enforce a minimum size and so remove
the check in C code to ensure range is larger than size.
Signed-off-by: Tom Rini <trini@konsulko.com>
With the exception of distro_boot support, we can move all of the rest
of the environment changes to come from CONFIG_EXTRA_ENV_TEXT and in
turn remove CONFIG_ENV_REFLASH.
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
When running "make clean" we want to remove env.in and well as env.txt.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Largely, the use of CONFIG_EXTRA_ENV_SETTINGS can be migrated directly
to come from CONFIG_EXTRA_ENV_TEXT. The biggest case that cannot easily
be migrated is distro_bootcmd support. Rather than block migration on
this, remove the #error here so that we can being moving forward.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we have consistently named symbols to enable USB host or gadget
controller support in SPL or full U-Boot, we do not need to
unconditionally build USB files nor depend on non-SPL symbols to know
when to build these common files.
Signed-off-by: Tom Rini <trini@konsulko.com>
As this particular platform is intended to be loaded and run a specific
set of routines in SPL, we do not need the ability to further use the
USB as a host device in SPL. Disable this support.
Cc: Eric Nelson <eric@nelint.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Eric Nelson <eric@nelint.com>
This define is only currently used in a single board, and always set to
one. Define this within the board code and remove other references.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_ENV_MIN_ENTRIES
CONFIG_ENV_MAX_ENTRIES
Cc: Michal Simek <michal.simek@amd.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
With the exception of how PowerPC handles SPL and TPL (which has its own
issues), we cannot safely hide options under CONFIG_SPL_BUILD. Largely
remove the places that have this test today.
Signed-off-by: Tom Rini <trini@konsulko.com>
Introduce board/siemens/common/Kconfig and have it hold FACTORYSET to
start with. Use select for this on the boards that need it.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Following how it's done for the majority of drivers, add a new
VIDEO_EXYNOS option and Kconfig file under drivers/video/exynos and list
the current options there.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
- In a number of cases, use CONFIG_ARCH_EXYNOS[45] rather than
CONFIG_EXYNOS[45]
- In other cases, test for CONFIG_ARCH_EXYNOS or CONFIG_ARCH_S5PC1XX
- Migrate specific SoC CONFIG values to Kconfig
- Use CONFIG_TARGET_x rather than CONFIG_x
- Migrate other CONFIG_EXYNOS_x symbols to Kconfig
- Reference CONFIG_EXYNOS_RELOCATE_CODE_BASE directly as EXYNOS_RELOCATE_CODE_BASE
- Rename CONFIG_S5P_PA_SYSRAM to CONFIG_SMP_PEN_ADDR to match the rest
of U-Boot usage.
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Since bb5930d5c97f ("exynos: video: Convert several boards to driver
model for video") there have been no callers of any of the exynos_lcd_*
family of functions. Remove these from the boards, and then remove
unused logo and related code as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
The only platform currently that defines an ide_preinit function has an
empty one that immediately returns. Remove this hook.
Signed-off-by: Tom Rini <trini@konsulko.com>
The migration deadline for this has passed and all boards have been
updated, remove this legacy code and references for it.
Signed-off-by: Tom Rini <trini@konsulko.com>
The migration deadline for this has passed and all boards have been
updated, remove this legacy code and references for it.
Signed-off-by: Tom Rini <trini@konsulko.com>
The only use of CONFIG_XTFPGA was to build all of the in-tree device
trees. Switch to using CONFIG_XTENSA instead of a non-Kconfig symbol.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tighten up symbol dependencies in a number of places. Ensure that a VPL
specific option has at least a direct dependency on VPL. In places
where it's clear that we depend on something more specific, use that
dependency instead.
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tighten up symbol dependencies in a number of places. Ensure that a TPL
specific option has at least a direct dependency on TPL. In places
where it's clear that we depend on something more specific, use that
dependency instead.
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
We want to keep all of the default values for SPL_LDSCRIPT in the same
place both for overall clarity as well as not polluting unrelated config
files.
Signed-off-by: Tom Rini <trini@konsulko.com>
Passing the mtdparts environment variable to the Linux kernel is
required to properly mount the UBI rootfs.
Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
The Linux kernel device tree already specifies the device to be used for
boot console output with a stdout-path property under /chosen.
Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
imx8mn_bsh_smm_s2 uses ubifs rootfs, UBI commands are required to flash
it.
Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
It allows to boot from NAND.
Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
A crafted squashfs image could embed a huge number of empty metadata
blocks in order to make the amount of malloc()'d memory overflow and be
much smaller than expected. Because of this flaw, any random code
positioned at the right location in the squashfs image could be memcpy'd
from the squashfs structures into U-Boot code location while trying to
access the rearmost blocks, before being executed.
In order to prevent this vulnerability from being exploited in eg. a
secure boot environment, let's add a check over the amount of data
that is going to be allocated. Such a check could look like:
if (!elem_size || n > SIZE_MAX / elem_size)
return NULL;
The right way to do it would be to enhance the calloc() implementation
but this is quite an impacting change for such a small fix. Another
solution would be to add the check before the malloc call in the
squashfs implementation, but this does not look right. So for now, let's
use the kcalloc() compatibility function from Linux, which has this
check.
Fixes: c5100613037 ("fs/squashfs: new filesystem")
Reported-by: Tatsuhiko Yasumatsu <Tatsuhiko.Yasumatsu@sony.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Tatsuhiko Yasumatsu <Tatsuhiko.Yasumatsu@sony.com>
When running "i2c md 0 0 80000100", the function do_i2c_md parses the
length into an unsigned int variable named length. The value is then
moved to a signed variable:
int nbytes = length;
#define DISP_LINE_LEN 16
int linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
ret = dm_i2c_read(dev, addr, linebuf, linebytes);
On systems where integers are 32 bits wide, 0x80000100 is a negative
value to "nbytes > DISP_LINE_LEN" is false and linebytes gets assigned
0x80000100 instead of 16.
The consequence is that the function which reads from the i2c device
(dm_i2c_read or i2c_read) is called with a 16-byte stack buffer to fill
but with a size parameter which is too large. In some cases, this could
trigger a crash. But with some i2c drivers, such as drivers/i2c/nx_i2c.c
(used with "nexell,s5pxx18-i2c" bus), the size is actually truncated to
a 16-bit integer. This is because function i2c_transfer expects an
unsigned short length. In such a case, an attacker who can control the
response of an i2c device can overwrite the return address of a function
and execute arbitrary code through Return-Oriented Programming.
Fix this issue by using unsigned integers types in do_i2c_md. While at
it, make also alen unsigned, as signed sizes can cause vulnerabilities
when people forgot to check that they can be negative.
Signed-off-by: Nicolas Iooss <nicolas.iooss+uboot@ledger.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>
The commit 99e2fbcb69f0 ("linker_lists: Rename sections to remove .
prefix") changed the name of the linker list sections. As the Aspeed SPL
linker wasn't in the tree yet, it missed the change.
This updates the SPL linker to match arch/arm/cpu/u-boot-spl.lds which
Aspeed was copied from.
Fixes: 442a69c14375 ("configs: ast2600: Move SPL bss section to DRAM space")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are
manually increased by 0x1000 due to .bootpg section. This section has size
of 0x1000 bytes and is manually put by linker script before .text section
(and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is
set. Due to this fact lot of other config options are manually increased by
0x1000 value to make correct layout. Note that entry point is not on
CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address
CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image).
Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is
set. Put .bootpg code directly into .text section and move text base
address to the start of .bootpg code. And finally remove +0x1000 value from
lot of config options. With this removal custom PHDRS is not used anymore,
so remove it too.
After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at
address -0x1000 anymore.
Tested on P2020 board with SPL and proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Add CAAM support, which is required when enabling HAB secure boot.
Select CONFIG_SPL_DRIVERS_MISC so that CONFIG_IMX_HAB could
build successfully, if selected.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Do DDR initialization using the procedural mx6_dram_cfg() instead of
programming the MMDC using a raw list of register/value pairs, this
solves some rare boot failures on specific "bad" modules.
Calibration values, DDR geometry are unchanged, memory timings are
updated according to the relevant memory datasheet, no changes on
the power consumption.
For IT temperature range SKUs CL is decreased from 8 to 7 and tFAW
value is increased, for commercial temperature range SKUs some
changes on ODT parameters.
This change was validated over a range of different apalis-imx6 SoM, on
the whole working temperature range with weeks of continuous testing.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Currently accessing the SD card on USDHC2 fails with:
=> mmc dev 1
Card did not respond to voltage select! : -110
This is due to the fact that UHS modes are enabled in the defconfig
and the devicetree, but the referenced LDO5 regulator (reg_nvcc_sd)
is not available to switch the data lines from 3.3V to 1.8V mode.
By enabling the regulator driver the vqmmc-supply is now available
and the SD card works also in high speed modes:
=> mmc dev 1
switch to partitions #0, OK
mmc1 is current device
Please note that the board has a GPIO connected to the SD_VSEL signal
of the PMIC. As the driver uses the LDO5CTRL_H register to set the
voltage, we need to make sure that this GPIO (GPIO01_IO4) is set to
a high level.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Fabio Estevam <festevam@denx.de>
LDO5 has two separate control registers. LDO5CTRL_L is used if the
input signal SD_VSEL is low and LDO5CTRL_H if it is high.
The current driver implementation only uses LDO5CTRL_H. To make this
work on boards that have SD_VSEL connected to a GPIO, we add support
for specifying an optional GPIO and setting it to high at probe time.
In the future we might also want to add support for boards that have
SD_VSEL set to a fixed low level. In this case we need to change the
driver to be able to use the LDO5CTRL_L register.
This is a port of the same change in the Linux kernel:
8c67a11bae88 ("regulator: pca9450: Add SD_VSEL GPIO for LDO5")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Fabio Estevam <festevam@denx.de>
In case rtt_nom is set to 0 keep ODT disabled (MMDC MPODTCTRL = 0).
No changes required for DDR MR1 Rtt_Nom impedance register, 0 value is
already handled correctly.
No board is currently affected by this change (rtt_nom != 0 on all i.MX6
ddr3 boards), this will be used by a follow-up change.
Fixes: fe0f7f7842e1 ("mx6: add mmdc configuration for MX6Q/MX6DL")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Set CLK01 and CLK02 to 24MHz and enable it in CCM_CCOSR register.
This clock is used by both the audio codec (CLKO1) and by the CSI camera
(CLKO2) and is expected to be 24MHz.
Despite the wrong 16.5MHz there was no real issue because of the wrong
frequency since Linux reconfigures the clocks afterward, however this
was triggering an issue with noise coming from the SGTL5000 audio codec.
The problem is that the SGTL5000 does not have a reset pin and after it
is configured if the input MCLK clock is disabled it produces a constant
noise on its output, this was happening on software reboot.
Forcing the clock to be enabled in U-Boot prevent the problem by making
sure that the clock is always available, without this change as soon as
Linux was changing the clock tree (setting clk_out_sel=1 without setting
clko2_en=1) the noise would start till the actual clock was enabled
(clko2_en=1) during the SGTL5000 driver probe.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Fixup thermal trips in Linux device tree according to SoC thermal
grade.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Tested-by: Adam Ford <aford173@gmail.com>
Since 0dba45864b ("arm: Init the debug UART") ,
the debug_uart_init is now called from crt.S
It's no longer required to call it from the board file.
With the current code, the banned <debug_uart> is printed twice:
<debug_uart>
<debug_uart>
U-Boot 2022.07-rc4-00089-gee3d158fa8 (Jun 08 2022 - 17:39:29 +0300)
Remove all calls from board_early_init_f .
Suggested-by: Balamanikandan Gunasundar <Balamanikandan.Gunasundar@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
The memory on this board is microchip 24aa025e48 which is compatible with
at24c02 with a page size of 16.
Fix the compatible accordingly.
Reported-by: Sergiu Moga <sergiu.moga@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This compatible does not exist in the bindings.
All occurences in DT have been replaced by at24c02 which is equivalent.
Fixes: 7264066707 ("misc: i2c_eeprom: Add compatible for 24AA02E48")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
microchip,24aa025e48 does not exist in the bindings of this driver.
It can be replaced with atmel,at24c02 which is a standard compatible
and the memory is compatible with this one, depending on the page size.
microchip 24aa02e48 has a page size of 8, while 24aa025e48 has a page
size of 16 bytes.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
Include microchip,pdmc.h from Linux.
This file includes required defines for DT successful build.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add the configurations required for enabling QSPI and the SF command
to allow changes to be made dynamically to serial flash devices from
the command line interface.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Add the configurations required for enabling QSPI and the SF command
to allow changes to be made dynamically to serial flash devices from
the command line interface.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Change the compatible of the qspi child node to
`jedec,spi-nor` so that it can be properly found
when probing the bus.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
In arch/arm/lib/sections.c there is below code:
char __image_copy_start[0] __section(".__image_copy_start");
But actually 'objdump -t spl/u-boot-spl' not able to find out
symbol '__image_copy_start' for binman update image-pos/size.
So update link file
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
The i.MX8M boards use partially specified binman images which have an
SPL entry without a U-Boot entry. This would normally cause an error due
to the 'u_boot_any' binman symbols declared by BINMAN_UBOOT_SYMBOLS
requiring a U-Boot-like entry in the same image as the SPL.
However, a problem in the ARMv8 __image_copy_start symbol definition
effectively disables binman from attempting to write any symbols at all,
so everything appears to work fine until runtime. A future patch fixes
the issue in the linker scripts, which lets binman fill in the symbols,
which would result in the build error described above.
Explicitly disable the 'u_boot_any' symbols for i.MX8M boards. They are
already effectively unusable, and they are incompatible with the boards'
current binman image descriptions.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Binman lets us declare symbols in SPL/TPL that refer to other entries in
the same binman image as them. These symbols are filled in with the
correct values while binman assembles the images, but this is done
in-memory only. Symbols marked as optional can be filled with
BINMAN_SYM_MISSING as an error value if their referred entry is missing.
However, the unmodified SPL/TPL binaries are still available on disk,
and can be used by people. For these files, nothing ensures that the
symbols are set to this error value, and they will be considered valid
when they are not.
Empirically, all symbols show up as zero in a sandbox_vpl build when we
run e.g. tpl/u-boot-tpl directly. On the other hand, zero is a perfectly
fine value for a binman-written symbol, so we cannot say the symbols
have wrong values based on that.
Declare a magic symbol that binman always fills in with a fixed value.
Check this value as an indicator that symbols were filled in correctly.
Return the error value for all symbols when this magic symbol has the
wrong value.
For binman tests, we need to make room for the new symbol in the mocked
SPL/TPL data by extending them by four bytes. This messes up some test
image layouts. Fix the affected values, and check the magic symbol
wherever it makes sense.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
The SPL code declares binman symbols for U-Boot phases depending on
CONFIG_IS_ENABLED(BINMAN_UBOOT_SYMBOLS). This config exists for SPL and
TPL, also add a version for VPL.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Enabling CONFIG_BINMAN makes binman run after a build to package any
images specified in the device-tree. It also enables a mechanism for
SPL/TPL to declare and use special linker symbols that refer to other
entries in the same binman image. A similar feature that gets this info
from the device-tree exists for U-Boot proper, but it is gated behind a
CONFIG_BINMAN_FDT unlike the symbols.
Confusingly, CONFIG_SPL/TPL_BINMAN_SYMBOLS also exist. These configs
don't actually enable/disable the symbols mechanism as one would expect,
but declare some symbols for U-Boot using this mechanism.
Reuse the BINMAN_SYMBOLS configs to make them toggle the symbols
mechanism, and declare symbols for the U-Boot phases in a dependent
BINMAN_UBOOT_SYMBOLS config. Extend it to cover symbols of all phases.
Update the config prompt and help message to make it clearer about this.
Fix binman test binaries to work with CONFIG_IS_ENABLED(BINMAN_SYMBOLS).
Co-developed-by: Peng Fan <peng.fan@nxp.com>
[Alper: New config for phase symbols, update Kconfigs, commit message]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
The binman extern symbol declarations in spl.h are missing the VPL
symbols recently added to spl.c, add them like the others.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
TPL_BINMAN_SYMBOLS depends on SPL_FRAMEWORK. The code this enables is
compiled by checking CONFIG_$(SPL_TPL_)FRAMEWORK, so it should depend on
TPL_FRAMEWORK instead (which in turn depends on SPL_FRAMEWORK). This was
most likely a typo due to copy-pasting the config's SPL version, fix it.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Some SPL functions directly use the binman 'u_boot_any' symbols to get
U-Boot's binman image position. These symbols are declared by the
SPL/TPL_BINMAN_SYMBOLS configs, but they are accessed by macros defined
by just CONFIG_BINMAN. So when BINMAN is enabled and BINMAN_SYMBOLS is
disabled, the code tries to use undeclared symbols and we get an error.
Therefore, any use of 'u_boot_any' symbols in the code is an implicit
dependency on SPL/TPL_BINMAN_SYMBOLS. However, in the current uses
they are meant to be the next phase's values, where that happens to be
U-Boot. In the meantime, helper funcions spl_get_image_pos/size() were
introduced to get these values.
Convert all uses of u_boot_any symbols to these functions, so we only
access these symbols at one place. Make sure they will not use these
symbols when the BINMAN_SYMBOLS configs are disabled, by returning early
in those cases.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Building sandbox_defconfig on ARMv7 with HOST_32BIT=y results in:
drivers/misc/qfw_sandbox.c:51:25: warning:
cast to pointer from integer of different size [-Wint-to-pointer-cast]
51 | void *address = (void *)be64_to_cpu(dma->address);
Add the missing type conversion.
Fixes: 69512551aa84 ("test: qemu: add qfw sandbox driver, dm tests, qemu tests")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add an option to tell SPL to show memory usage for driver model just
before it boots into the next phase.
Signed-off-by: Simon Glass <sjg@chromium.org>
This command shows the memory used by driver model along with various
hints as to what it might be if some 'core' tags were moved to use the
tag list instead of a core (i.e. always-there) pointer.
This may help with future work to reduce memory usage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function for collecting the amount of memory used by driver model,
including devices, uclasses and attached data and tags.
This information can provide insights into how to reduce the memory
required by driver model. Future work may look at execution speed also.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present tag numbers are only allocated for non-core data, meaning that
the 'core' data, like priv and plat, are accessed through dedicated
functions.
For debugging and consistency it is convenient to use tags for this 'core'
data too. Add support for this, with new tag numbers and functions to
access the pointer and size for each.
Update one of the test drivers so that the uclass-private data can be
tested here.
There is some code duplication with functions like device_alloc_priv() but
this is not addressed for now. At some point, some rationalisation may
help to reduce code size, but more thought it needed on that.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this driver uses 'priv' struct to hold 'plat' data, which is
confusing. The contents of the strct don't matter, since only dtoc is
using it. Create a new struct with the correct name.
Signed-off-by: Simon Glass <sjg@chromium.org>
This command converts pointers to addresses, but the pointers being
converted are in the image's rodata region. For sandbox this means it
is not in DRAM so it does not make sense to do this conversion.
Fix this by showing a simple pointer instead. Drop the unnecessary
@ and hex prefixes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Put these in alphabetic order, both in the help and in the implementation,
as there are quite a few subcommands now. Tweak the help for 'dm tree' to
better explain what it does.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is not a good name anymore as it does not dump everything. Rename it
to dm_dump_tree() to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
* Use spaces not tabs
* Limit lines to 100 spaces
* Remove an unused import
* Sort imports correctly
* Add a module description
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
On python 3.8.10 (and 3.10), subparsers are not updated with defaults. I
suspect this is related to [1]. Fix this by explicitly updating
subparsers with settings.
[1] https://github.com/python/cpython/issues/89398
Fixes: 3145b63513 ("patman: Update defaults in subparsers")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Tested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Insert an empty line after each uclass independent of whether it has
devices or not.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
U-Boot's printf() used before setting up U-Boot's serial driver does not
create any output. Use os_printf() for error messages related to loading
the device-tree.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Before setting up the devices U-Boot's printf() function cannot be used
for console output. Provide function os_printf() to print to stderr.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
While running tests for a python tool, the tests' outputs get printed in
whatever order they happen to run, without any indication as to which
output belongs to which test. Unittest supports capturing these outputs
and printing them as part of the test summaries, but when a failure or
error occurs it switches back to printing as the tests run. Testtools
and subunit tests can do the same as their parts inherit from unittest,
but they don't outright expose this functionality.
On the unittest side, enable output buffering for the custom test result
class. Try to avoid ugly outputs by not printing stdout/stderr before
the test summary for low verbosity levels and for successful tests.
On the subunit side, implement a custom TestProtocolClient that enables
the same underlying functionality and injects the captured streams as
additional test details. This causes them to be merged into their test's
error traceback message, which is later rebuilt into an exception and
passed to our unittest report class.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
By default, unittest test summaries only print extended info about tests
that failed or couldn't run due to an error. Use a custom text result
class to print info about more cases: skipped tests, expected failures
and unexpected successes.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
The python tools' test utilities handle printing test results, but the
output is quite bare compared to an ordinary unittest run. Delegate
printing the results to a unittest text runner, which gives us niceties
like clear separation between each test's result and how long it took to
run the test suite.
Unfortunately it does not print info for skipped tests by default, but
this can be handled later by a custom test result subclass. It also does
not print the tool name; manually print a heading that includes the
toolname so that the outputs of each tool's tests are distinguishable in
the CI output.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It's possible to request a specific test to run when trying to run a
python tool's tests. If we request a nonexistent test, the unittest
loaders generate a fake test that reports this as an error. However, we
get these fake tests even when the test exists, because test_util can
load tests from multiple places one by one and the test we want only
exists in one.
The test_util helpers currently remove these fake tests when printing
test results, but that's more of a workaround than a proper solution.
Instead, don't even try to load the missing tests.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When printing a python tool's test results, the entire list of failed
tests and their tracebacks are reprinted for every failed test. This
makes the test output quite unreadable. Fix the loop to print failures
and tracebacks one at a time.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We have some nice macros for iterating over devices in device.h, but they
are not used by the driver core. Convert all the users I could find.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Because fdt_get_config_str et al. were moved/renamed to
ofnode_conf_read_str, they now depend on CONFIG_DM as well as
CONFIG_OF_CONTROL. Add some fallback implementations, preventing a
linker error when CONFIG_SPL_OF_CONTROL and CONFIG_SPL_ENV_IS_IN_MMC are
enabled and CONFIG_SPL_DM is disabled.
Fixes: 7de8bd03c3 ("treewide: fdt: Move fdt_get_config_... to ofnode_conf_read...")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
sandbox_flash_bulk uses priv->read_len to determine if priv->buff contains
the response data (such as from SCSI_INQUIRY). However, if priv->fd=-1 in
handle_read, then priv->read_len is not set even though we are going to
PHASE_DATA. This causes sandbox_flash_bulk to try and read len bytes from
priv->buff, which likely goes past the end of the buffer. Fix this by always
setting priv->read_len even if we aren't going to read anything.
Fixes: f4f715360c ("dm: usb: sandbox: Add an emulator for USB flash devices")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the common functions to run tests and report results. Ensure that the
result code indicates success or failure.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Add a comment explaining the design goals of bloblist, to make it easier
for people to understand and comment on the structure.
Signed-off-by: Simon Glass <sjg@chromium.org>
To quote the author:
This series adds support for the SHA-1 and SHA-256 Secure Hash Algorithm
for CPUs that have support of the ARM v8 Crypto Extensions. It Improves
speed of integrity & signature checking procedures.
Now that we can make use of CPU features for sha1/sha256, enable in QEMU
so that we get some test coverage.
Cc: Loic Poulain <loic.poulain@linaro.org>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
This patch adds support for the SHA-256 Secure Hash Algorithm for CPUs
that have support for the SHA-256 part of the ARM v8 Crypto Extensions.
It greatly improves sha-256 based operations, about 17x faster on iMX8M
evk board. ~12ms vs ~208ms for a 20MiB kernel sha-256 verification.
asm implementation is a simplified version of the Linux version (from
Ard Biesheuvel).
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Mark sha256_process as weak to allow hardware specific implementation.
Add parameter for supporting multiple blocks processing.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
This patch adds support for the SHA-1 Secure Hash Algorithm for CPUs
that have support for the SHA-1 part of the ARM v8 Crypto Extensions.
It greatly improves sha-1 based operations, about 10x faster on iMX8M
evk board. ~12ms vs ~165ms for a 20MiB kernel sha-1 verification.
asm implementation is a simplified version of the Linux version (from
Ard Biesheuvel).
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
sha1 digest size is 5*32-bit => 160-bit. Using 64-bit unsigned long
does not cause issue with the current sha1 implementation, but could
be problematic for vectorized access.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Mark sha1_process as weak to allow hardware specific implementation.
Add parameter to support for multiple blocks processing.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
cpu:
- Add driver for microblaze cpu
net:
- Add support for DM_ETH_PHY to AXI emac and emaclite
xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS
zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize
versal:
- Enable loading app at EL1
serial:
- Setup default address and clock rates for DEBUG uarts
pinctrl:
- Add support for tri state and output enable properties
relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze
microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support
timer:
- Extract axi timer driver from Microblaze to generic location
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Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.10
cpu:
- Add driver for microblaze cpu
net:
- Add support for DM_ETH_PHY to AXI emac and emaclite
xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS
zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize
versal:
- Enable loading app at EL1
serial:
- Setup default address and clock rates for DEBUG uarts
pinctrl:
- Add support for tri state and output enable properties
relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze
microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support
timer:
- Extract axi timer driver from Microblaze to generic location
The main attraction are two regressions, plus a fix
for a long standing bug:
- Fix USB support on boards with a switched VBUS regulator.
- Fix failing boot due to env loading on boards without MMC (CHIP).
- Fix PSCI CPU_OFF operation on R40 boards.
The rest are smaller fixes, and the forgotten DT sync for sun4i boards.
linux system will die if we offline one of the cpu on R40 based board:
eg: echo 0 > /sys/devices/system/cpu/cpu3/online
The reason is that the R40 version of sunxi_cpu_set_power always passes
0 for the CPU number, so we turn off CPU0, regardless of what CPU the
CPU_OFF request came for.
Fix this by passing the proper CPU number, as there are proper power
clamp registers for every of the four cores.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Commit e42dad4168fe ("sunxi: use boot source for determining environment
location") changed our implementation of env_get_location() and enabled
it for every board, even those without MMC support (like the C.H.I.P.
boards). However the default fallback location of ENVL_FAT requires MMC
support compiled in, so the board hangs when trying to initially load
the environment.
Change the algorithm to only return configured environment locations,
and improve the fallback algorithm on the way.
The env_init() routine calling this function here does not behave well
if the return value is ENVL_UNKNOWN on the very first call: it will make
U-Boot proper silently hang very early.
Work around this issue by making sure we return some configured (dummy)
environment location when prio is 0. This for instance happens when
booting via FEL.
This fixes U-Boot loading on the C.H.I.P. boards.
Fixes: e42dad4168fe ("sunxi: use boot source for determining environment location")
Reported-by: Chris Morgan <macroalpha82@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fix FEL boot case by not returning ENVL_UNKNOWN when prio==0]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Compatible strings for some new RTC hardware variants were added to
the binding. Add them to the driver in preparation for supporting
those new SoCs.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This driver uses simple_strtol(), so it needs SPL_STRTO. Before commit
88ca8e26958b6 ("disk: Add an option for partitions in SPL"), SPL_STRTO
was always selected indirectly. Now it is not, so select it here.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Copy the devicetree source for the A10 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.
The previous version of this change was only partially applied.
Fixes: 4746694cba74 ("ARM: dts: sun4i: Sync from Linux v5.18-rc1")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Allwinner USB PHY driver is still using the legacy GPIO interface,
which is now implemented by the DM_GPIO compat functions.
Those seem to have some design flaws, as setting the direction, then
later setting the value will not work, if the DM_GPIO driver is
implementing set_flags.
Fix this by using the dm_ version of the direct GPIO interface, which
uses struct gpio_desc structs to handle requested GPIOs, and actually
keeps the flags we set earlier.
This fixes USB operation on boards which need to toggle the VBUS supply
via a GPIO, like the Teres-I laptop or the BananaPi M2 Berry board.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Milan P. Stanić <mps@arvanta.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
- fix stb TrueType to check return value of STBTT_malloc()
- remove not required DM_REGULATOR test in stm32 dsi driver
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Merge tag 'video-20220625' of https://source.denx.de/u-boot/custodians/u-boot-video
- fix building sandbox with NO_SDL=1
- fix stb TrueType to check return value of STBTT_malloc()
- remove not required DM_REGULATOR test in stm32 dsi driver
The tests on CONFIG_DM_REGULATOR, added to avoid compilation issues, can
now be removed, they are no more needed since the commit 16cc5ad0b439
("power: regulator: add dummy helper").
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The codes that call STBTT_malloc() / stbtt__new_active() do not check
the return value at present which may cause segfault.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Building the sandbox with NO_SDL=1 resulted in an undefined reference to
'sandbox_sdl_remove_display'. Resolve this by adding a stub
implementation to match the stubs of the other similar functions.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no reason to do serial initialization. Uart driver does it
already based on DT. Good effect is that it is clear which interface is
console.
The resulting change was done in past by commit 84d2bbf082fa ("arm64:
zynqmp: Remove low level UART setting").
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-12-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The set_dfu_alt_info function use the CONFIG_SYS_SPI_U_BOOT_OFFS define
to set the dfu_alt_info environment variable for qspi boot mode. Guard
the usage of CONFIG_SYS_SPI_U_BOOT_OFFS to make spi flash support
optional.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-11-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add machine identification support based on the
zynqmp_get_silicon_idcode_name function and use the soc_get_machine
function of the soc uclass to get silicon idcode name for the fpga init.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-8-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Probe the driver before use to ensure that the driver is always
available and the global data are valid. Initialize the global data
with zero and probe the driver if the global data are still zero. This
allows a usage of the firmware functions from other drivers with
arbitrary order between the drivers.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-2-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
"size-cells" of the nand controller node should be 0 as the "reg"
property of the nand device node contains the chip select number and not
address information.
The patch fixes the below compilation warning
arch/arm/dts/zynq-zc770-xm011.dtb: Warning (reg_format):
/axi/memory-controller@e000e000/nand-controller@0,0/nand@0:reg: property
has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6e90665a2dad7fe8ade10b8f57101f8144963791.1655288559.git.michal.simek@amd.com
As per design, all input/rx pins should have fast slew rate and 12mA
drive strength. Rest all pins should be slow slew rate and 4mA drive
strength. Fix usb nodes as per this and remove setting of slow slew rate
for all the usb gorup pins.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b245c165f05845c1f3ab41a92c82b7ec1538cee4.1655288171.git.michal.simek@amd.com
Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.
CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com
Add a basic CPU driver that retrieves information about the microblaze CPU
core. cpu_ops handlers are implemented so that the "cpu" command can work
properly:
U-Boot-mONStR> cpu list
0: cpu@0 MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000
U-Boot-mONStR> cpu detail
0: cpu@0 MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000
ID = 0, freq = 50 MHz: L1 cache, MMU
Note: cpu_ver_lookup[] and family_string_lookup[] arrays were imported from
linux.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-14-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add helper code for PVR (Processor Version Register) data handling. It
will be used by the UCLASS_CPU driver to populate cpuinfo fields at
runtime.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Provide a static Kconfig value for the target FPGA archtitecture, as it is
done in Linux. The cpu-uclass driver will cross-check it with the value
read from PVR10 register.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Align microblaze with the other architectures and provide an
implementation for flush_dcache_range(). Also, remove the microblaze
exception in drivers/core/device.c.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-11-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Introduce a minimal cpuinfo structure to hold cache related info. The
instruction/data cache size and cache line size are initialized early in
the boot to default Kconfig values. They will be overwritten with data
from PVR/dtb if the microblaze UCLASS_CPU driver is enabled.
The cpuinfo struct was placed in global_data to allow the microblaze
UCLASS_CPU driver to also run before relocation (initialized global data
should be read-only before relocation).
gd_cpuinfo() helper macro was added to avoid volatile
"-Wdiscarded-qualifiers" warnings when using the pointer directly.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-10-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/)
All flush_cache() calls in microblaze code are supposed to flush the
entire instruction and data caches, so introduce flush_cache_all()
helper to handle this.
Also, provide implementations for flush_dcache_all() and
invalidate_icache_all() so that icache and dcache u-boot commands can
work.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-9-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for
instruction and data caches sizes, respectively:
CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE
CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE
Also, get rid of the hardcoded value in icache_disable().
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
Factor out icache/dcache components from flush_cache() function. Call the
newly added __flush_icache()/__flush_dcache() functions inside
icache_disable() and dcache_disable(), respectively. There is no need to
flush both caches when disabling a particular cache type.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-7-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Replace CONFIG_ICACHE with a Kconfig option more limited in scope -
XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports
the "wic" (Write to Instruction Cache) instruction. It will be used to
guard "wic" invocations in microblaze cache code.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Replace CONFIG_DCACHE with a Kconfig option more limited in scope -
XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports
the "wdc" (Write to Data Cache) instruction. It will be used to guard
"wdc" invocations in microblaze cache code.
Also, drop all ifdefs around flush_cache() calls and only keep one
CONFIG_IS_ENABLED() guard within flush_cache() itself.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
XILINX_USE_DCACHE macro was removed in 7556fa09e0e ("microblaze: Simplify
cache handling"), but it was still used in a couple of places.
Replace those occurences with CONFIG_DCACHE.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-4-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Relocate cpu_ops pointers when CONFIG_NEEDS_MANUAL_RELOC is enabled.
The (gd->flags & GD_FLG_RELOC) check was added to make sure the reloc_done
logic works for drivers that use DM_FLAG_PRE_RELOC.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-2-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Migrate cpu command to use U_BOOT_CMD_WITH_SUBCMDS() helper macro, to
reduce duplicated code. This also fixes the cpu command on boards that
enable CONFIG_NEEDS_MANUAL_RELOC.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-1-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing
issues with function pointer arrays which need to be updated manually after
relocation. Building code with -fPIC and linking with -pic will remove this
limitation and there is no longer need to run manual update.
By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC
code will be compiled for full relocation.
The patch does couple of things which are connected to each other.
- Define STATIC_RELA dependency to call relocate-rela to fill sections.
- REMAKE_ELF was already enabled but u-boot file can't be used because
sections are empty. relocate-rela will fill them and output file is
u-boot.elf which should be used.
- Add support for full relocation (u-boot.elf)
- Add support for early relocation when u-boot.bin is loaded to different
address then CONFIG_SYS_TEXT_BASE
- Add rela.dyn and dynsym sections
Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original
size (550kB to 608kB).
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com
Microblaze is 32bit that's why it is using elf32 format. Relocation code
requires to get information about rela and dynsym senctions and also text
base which was used for compilation.
Code build with -fPIC and linked with -pic generates 4 relocation types.
R_MICROBLAZE_NONE is the easiest one which doesn't require any action.
R_MICROBLAZE_REL only requires write addend to r_offset address.
R_MICROBLAZE_32/R_MICROBLAZE_GLOB_DAT are the most complicated. There is a
need to find out symbol value with adding symbol value and write it to
address pointed by r_offset. Calculation with addend is also added but
only 0 addend values are generated now.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9912c3d76933bdf75e1ebb6aab43726cd32cafb5.1655299267.git.michal.simek@amd.com
Adding support for new type requires to change code layout that's why move
elf64 code to own function for easier maintenance.
It also solves the problem with not calling fclose in case of error.
Return value from rela_elf64 is saved to variable that's why fclose() is
called all the time.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/21763b80527521c85ca7d4ac64ad6ff4885409c8.1655299267.git.michal.simek@amd.com
Symbol handling depends on compilation flags. Right now manual relocation
is used that's why symbols can be referenced just by name and there is no
need to find them out. But when position independent code (PIC) is used
symbols need to be described differently. That's why having one macro
change is easier than changing the whole code.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d704e9a267c8b536452fb999111dbfbc9d652be5.1655299267.git.michal.simek@amd.com
Right now U-Boot runs all the time from the same address where it is loaded
but going to full relocation code starting address doesn't need to be fixed
and can be simply discovered from reading PC register. That's why use r20
to get PC address and subtract offset from the beginning to get starting
address.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/044b727c33dfbe662f68512d0da0775a4805f360.1655299267.git.michal.simek@amd.com
Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul
relocation. Enable option for big endian configuration but it is not used
too much that's why it is completely untested.
By supporting this system there is a need to define LITTLE/BIG endian
Kconfig options to pass -EL/-EB flags.
Full command line for u-boot.elf recreation looks like this:
microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \
-O elf32-microblazeel u-boot.bin u-boot-elf.o
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com
CONFIG_SYS_INIT_SP_OFFSET macro place stack to TEXT_BASE - SYS_MALLOC_F_LEN
but there is no reason to do it now because board_init_f_alloc_reserve()
returns exact location where stack should be. That's why stack location is
calculated at run time and there is no need to hardcode it via macro. This
change will help with placing U-Boot to any address.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e9aee69646e022fd8a96cbee2d2a07ab81fb6e05.1655299267.git.michal.simek@amd.com
When U-Boot starts stack protection can be already enabled that's why setup
the lowest possible SLR value which is address 0. And the highest possible
stack in front of U-Boot. That's why you should never load U-Boot to the
beginning of DDR. There must be some space reserved. Code is using this
location for early malloc space, early global data and stack.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/86b9748bad12142659804d6381bc6bbf20be44f1.1655299267.git.michal.simek@amd.com
There is no need to pass section information via parameters.
Let's read text base and rela start/end directly from elf.
It will help with reading other information from ELF for others
architecture. Input to relocate-rela is u-boot binary and u-boot ELF.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ab7ae14a6e058722e8c608089729e98edf20a08d.1655299267.git.michal.simek@amd.com
Add support to handle 'output-enable' and 'bias-high-impedance'
configurations. DT property output-enable brings out the pins from
tri-state, whereas bias-high-impedance changes the pins state to
tri-state.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1a02cd41d183d397ebce23c497178281c7286692.1655286745.git.michal.simek@amd.com
Do not use 0 as address for memory because of the special meaning for
pointers (null pointer). Change the spl bss start address to the second
page.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220607074314.27125-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Board is using kv260 design for couple of parts defined by spec like i2c
eeproms, ina260, uart, etc.
Board has 4 gems. One gem connected via PS SGMII(GT), another PS RGMII(MIO)
and 2 via EMIO. First two shares the same MIO lines for PHYs. PL based one
have separate EMIO lines via PL.
Also two USB 3.0 with usb hubs are present. USB phys and USB hubs should
have separate reset line. The first usb0 hub also has USB-SD controller
(usb2244) connected to port 0.
To test compatibility with k26 you can run:
fdtoverlay -o /tmp/output.dtb -i arch/arm/dts/zynqmp-sm-k26-revA.dtb \
arch/arm/dts/zynqmp-sck-kr-g-revA.dtbo
Also add support for kr260-revB board. Based on FRU it is revision B
but schematics can be label as revA03.
Changes in revB are:
- SFP light
- GEM2/3 TX_CLK fixes
- PMOD/RPI connector fixes
- Replace si5332 with oscilators
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dac2ee1826e73b89c8cc1e430354eb43d291f675.1652870941.git.michal.simek@amd.com
Add support to switch to EL1 and load an EL1 app from U-Boot which is
executing at EL2 or EL3 in aarch64 mode.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220506055345.1921-1-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy
framework. Though if ethernet PHY node is in other ethernet node, it
will use shared MDIO to access the PHY of other ethernet. Move ethernet
print info statement from plat function to probe function, as phyaddr is
not enumerated when CONFIG_DM_ETH_PHY is enabled.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/93e11ccca56b6e52b2dcc283d08d5042537f828f.1652181968.git.michal.simek@amd.com
CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy
framework. Though if ethernet PHY node is in other ethernet node, it
will use shared MDIO to access the PHY of other ethernet. Move ethernet
print info statement from plat function to probe function, as phyaddr is
not enumerated when CONFIG_DM_ETH_PHY is enabled.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/ecfec78234233fefdc172c141c207b2d78ef70c5.1652181968.git.michal.simek@amd.com
This consists of two slightly related series. For the first, to quote
the author:
This series implements 2 features in driver/firmware/scmi.
First, a single change adds support for SCMI OP-TEE transport to
use OP-TEE native shared memory. See the 1st patch in this series:
"firmware: scmi: optee: use TEE shared memory for SCMI messages".
Then come changes for supporting multi-channel in the SCMI drivers.
I've split the implementation in 11 several small incremental changes
in the hope it helps the review. Few minor fixup commits are also
inserted in the series.
And the second series implements some smccc improvements.
To quote the author:
This series introduces ASAN and a basic fuzzing infrastructure that
works with sandbox. The example fuzz test towards the end of the series
will find something pretty quickly. That something is fixed by the
series "virtio: Harden and test vring" that needs to be applied for the
final patch in this series.
There is some refactoring to stop using '.' prefixed sections. ELF
defines sections with names that contain anything that isn't
alphanumeric or an underscore as being for system use which means
clang's ASAN instrumentation happily add redzones between the contained
objects. That's not what we want for things like linker lists where the
linker script has carefully placed the sections contiguously. By
renaming the sections, clang sees them as user sections and doesn't add
instrumentation.
ASAN is left disabled by default as there are still some tests that it
triggers on and will need some more investigation to fix. It can be
enabled with CONFIG_ASAN or passing `-a ASAN` to buildman.
Adds random number generator driver using Arm SMCCC TRNG interface to
get entropy bytes from secure monitor. The driver registers as an
Arm SMCCC feature driver to allow PSCI driver to bind a device for
when secure monitor exposes RNG support from Arm SMCCC TRNG interface.
Cc: Sughosh Ganu <sughosh.ganu@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Use PSCI device to query Arm SMCCC v1.1 support from secure monitor
and if so, bind drivers for the SMCCC features that monitor supports.
Drivers willing to be bound from Arm SMCCC features discovery can use
macro ARM_SMCCC_FEATURE_DRIVER() to register to smccc feature discovery,
providing target driver name and a callback function that returns
whether or not the SMCCC feature is supported by the system.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Defines function IDs ARM_SMCCC_ARCH_FEATURES used to query SMCCC feature
support, applicable from Arm SMCCC v1.1 specification.
Defines macro ARM_SMCCC_RET_NOT_SUPPORTED as generic return identifier
for when a SMCCC feature is not supported.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Updates .process_msg operators of the SCMI transport drivers that
supports multi-channel to use it now that drivers do provide
the reference through channel argument. These are the mailbox
agent, the optee agent and the smccc agent.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Update SCMI regulator controller driver to get its assigned SCMI channel
during initialization. This change allows SCMI voltage domain protocol
to use a dedicated channel when defined in the DT. The reference is
saved in SCMI regulator controller driver private data.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Update SCMI reset controller driver to get its assigned SCMI channel
during initialization. This change allows SCMI reset domain protocol
to use a dedicated channel when defined in the DT. The reference is
saved in SCMI reset controller driver private data.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Update SCMI clock driver to get its assigned SCMI channel during
initialization. This change allows SCMI clock protocol to use a
dedicated channel when defined in the DT. The reference is saved
in SCMI clock driver private data.
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Implements multi SCMI channel support in OP-TEE SCMI transport. An
SCMI protocol may use a dedicated channel, specified by the DT.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Updates SCMI SMCCC transport driver to get SCMI channel reference
at initialization and use when posting SCMI messages.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Updates SCMI mailbox transport driver to get SCMI channel reference
at initialization and use when posting SCMI messages.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Adds resources for SCMI protocols to possibly use a dedicated SCMI
channel instead of the default channel allocated by the SCMI agent
during initialization. As per DT binding documentation, some SCMI
transports can define a specific SCMI communication channel for
given SCMI protocols. It allows SCMI protocols to pass messages
concurrently each other.
This change introduces new scmi agent uclass API function
devm_scmi_of_get_channel() for SCMI drivers probe sequences to get
a reference to the SCMI channel assigned to its related SCMI protocol.
The function queries the channel reference to its SCMI transport driver
through new scmi agent uclass operator .of_get_channel that uses Device
Tree information from related SCMI agent node.
Operator .of_get_channel returns a reference to the SCMI channel
assigned to SCMI protocol used by the caller device. SCMI transport
drivers that do not support multi-channel are not mandated to register
this operator. When so, API function devm_scmi_of_get_channel() returns
NULL and SCMI transport driver are expected to retrieve by their own
means the reference to the unique SCMI channel, for example using
platform data as these drivers currently do in U-Boot source tree.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Defines local helper function find_scmi_transport_device() with the
instructions to find the SCMI transport device from a SCMI protocol
device.
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Changes SCMI driver API function devm_scmi_process_msg() to add
an SCMI channel reference argument for when SCMI agent supports
SCMI protocol specific channels. First argument of devm_scmi_process_msg()
is also change to point to the caller SCMI protocol device rather
than its parent device (the SCMI agent device).
The argument is a pointer to opaque struct scmi_channel known from
the SCMI transport drivers. It is currently unused and caller a pass
NULL value. A later change will enable such support once SCMI protocol
drivers have means to get the channel reference during initialization.
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Changes implementation when using TEE dynamically allocated shared
memory to synchronize with the Linux implementation where the legacy
SMT protocol cannot be used with such memory since it is expected from
device mapped memory whereas OP-TEE shared memory is cached and
hence should not be accessed using memcpy_toio()/memcpy_fromio().
This change implements the MSG shared memory protocol introduced
in Linux [1]. The protocol uses a simplified SMT header of 32bit
named MSG_SMT to carry SCMI protocol information and uses side channel
means to carry exchanged buffer size information, as TEE invocation API
parameters when used in the SCMI OP-TEE transport.
Link: [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f301bba0ca7392d16a6ea4f1d264a91f1fadea1a
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Add a fuzzer to test the vring handling code against unexpected
mutations from the virtio device.
After building the sandbox with CONFIG_FUZZ=y, the fuzzer can be invoked
with by:
UBOOT_SB_FUZZ_TEST=fuzz_vring ./u-boot
This fuzzer finds unvalidated inputs in the vring driver that allow a
buggy or malicious device to make the driver chase wild pointers.
Signed-off-by: Andrew Scull <ascull@google.com>
Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.
Signed-off-by: Andrew Scull <ascull@google.com>
Add an implementation of LLVMFuzzerTestOneInput() that starts the
sandbox on a secondary thread and exposes a function to synchronize the
generation of fuzzing inputs with their consumption by the sandbox.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move the program's entry point to os.c, in preparation for a separate
fuzzing entry point to be added.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the basic infrastructure for declaring fuzz tests and a command to
invoke them.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This new class of device will provide fuzzing inputs from a fuzzing
engine.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to prevent build regressions with ASAN, add the builds to CI.
The longer term objective will be to enabled test targets with ASAN
enabled, but there are too many at the moment.
Signed-off-by: Andrew Scull <ascull@google.com>
The stack protector test intentionally overflows a buffer in order to
corrupt the stack canary so that it can test that the corruption is
detected as expected. However, this is incompatible with ASAN, which
detects the buffer overflow and interrupts the test, so disable the test
for such configurations.
Signed-off-by: Andrew Scull <ascull@google.com>
Add CONFIG_ASAN to build with the Address Sanitizer. This only works
with the sandbox so the config is likewise dependent. The resulting
executable will have ASAN instrumentation, including the leak detector
that can be disabled with the ASAN_OPTIONS environment variable:
ASAN_OPTIONS=detect_leaks=0 ./u-boot
Since u-boot uses its own dlmalloc, dynamic allocations aren't
automatically instrumented, but stack variables and globals are.
Instrumentation could be added to dlmalloc to poison and unpoison memory
as it is allocated and deallocated, and to introduce redzones between
allocations. Alternatively, the sandbox may be able to play games with
the system allocator and somehow still keep the required memory
abstraction. No effort to address dynamic allocation is made by this
patch.
The config is not yet enabled for any targets by default.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rename the sections used to implement linker lists so they begin with
'__u_boot_list' rather than '.u_boot_list'. The double underscore at the
start is still distinct from the single underscore used by the symbol
names.
Having a '.' in the section names conflicts with clang's ASAN
instrumentation which tries to add redzones between the linker list
elements, causing expected accesses to fail. However, clang doesn't try
to add redzones to user sections, which are names with all alphanumeric
and underscore characters.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rename the sections used for defining sandbox command line options so
that they don't start with a '.'. ELF says that sections starting with a
'.' are reserved for system use, but the sandbox runs as a normal user
process so should be using user sections instead.
Clang's ASAN adds redzones to non-user sections and the extra padding
meant that the list of options was being corrupted. Naming the sections
as user sections avoids this issue as clang handles them as we intended.
Signed-off-by: Andrew Scull <ascull@google.com>
Rename the sections used for placing the EFI runtime so that they don't
start with a '.'. ELF says that sections starting with a '.' are
reserved for system use, but the sandbox runs as a normal user process
so should be using user sections instead.
Clang's ASAN adds redzones to non-user sections and the extra padding
meant that the list of options was being corrupted. Naming the sections
as user sections avoids this issue as clang handles them as we intended.
Signed-off-by: Andrew Scull <ascull@google.com>
Fix the buffer underflow that would occur if puts is called with length
of zero.
Fixes: efa51f2bd64 ("serial: sandbox: Implement puts")
Cc: Sean Anderson <sean.anderson@seco.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
This was previously needed, but U-Boot is now capable of parsing
the new "phy-connection-type" property that is already used in
the main devicetree.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This syncs the devicetree files with the latest Linux kernel (5.19-rc2).
This also fixes the currently broken ethernet support:
Before:
Net: Could not get PHY for FEC0: addr 0
After:
Net: eth0: ethernet@30be0000
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Timeouts are not expected to happen and are handled as fatal errors.
Increase all timeouts to 1 second as defensive measure to avoid relying
on the timing behaviour of certain firmware versions or configurations.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
The NVMe firmware in the macOS 13 beta blocks or crashes with u-boot's
current minimal RTKit implementation. It does not provide buffers for
the firmware's buffer requests. The ANS2 firmware included in macOS 11
and 12 tolerates this. The firmware included in the first macOS 13 beta
requires buffers for the crashlog and ioreport endpoints to function.
In the case of the NVMe the buffers are physical memory. Access to
physical memory is guarded by what Apple calls SART.
Import m1n1's SART driver (exclusively used for the NVMe controller).
Implement buffer management helpers for RTKit. These are generic since
other devices (none in u-boot so far) require different handling.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
AST2600 supports boot from SPI(mmap), eMMC, and UART.
This patch adds the boot mode detection and return the
corresponding boot device type.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
The commit b583348ca8c8 ("image: fit: Align hash output buffers") places
the hash output buffer at the .bss section. However, AST2600 by default
executes SPL in the NOR flash XIP way. This results in the hash output
cannot be written to the buffer as it is located at the R/X only region.
We need to move the .bss section out of the SPL body to the DRAM space,
where hash output can be written to. This patch includes:
- Define the .bss section base and size
- A new SPL linker script is added with a separate .bss region specified
- Enable CONFIG_SPL_SEPARATE_BSS kconfig option
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Neal Liu <neal_liu@aspeedtech.com>
The HPE SoC is new to linux. A basic device tree layout with minimum
required for linux to boot including a timer and watchdog support has
been created.
The dts file is empty at this point but will be updated in subsequent
updates as board specific features are enabled.
Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
The GXP supports 3 separate SPI interfaces to accommodate the system
flash, core flash, and other functions. The SPI engine supports variable
clock frequency, selectable 3-byte or 4-byte addressing and a
configurable x1, x2, and x4 command/address/data modes. The memory
buffer for reading and writing ranges between 256 bytes and 8KB. This
driver supports access to the core flash.
Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Add support for the HPE GXP SOC timer. The GXP supports several different
kinds of timers but for the purpose of this driver there is only support
for the General Timer. The timer has a 1us resolution and is 56 bits.
Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
The GXP is the HPE BMC SoC that is used in the majority
of current generation HPE servers. Traditionally the asic will
last multiple generations of server before being replaced.
Info about SoC:
HPE GXP is the name of the HPE Soc. This SoC is used to implement many BMC
features at HPE. It supports ARMv7 architecture based on the Cortex A9
core. It is capable of using an AXI bus to whicha memory controller is
attached. It has multiple SPI interfaces to connect boot flash and BIOS
flash. It uses a 10/100/1000 MAC for network connectivity. It has multiple
i2c engines to drive connectivity with a host infrastructure. There
currently are no public specifications but this process is being worked.
Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Currently, enabling CMD_MISC gives:
cmd/misc.c:67:25: warning: assignment to 'int (*)(struct udevice *, int, void *, int)' from incompatible pointer type 'int (*)(struct udevice *, int, const void *, int)' [-Wincompatible-pointer-types]
Because 'misc_read' takes a void * and 'misc_write' takes a const void
*, both of which make sense for their operation. Given there's one
place we make use of the function pointer, just call read or write
directly for the operation we're called with.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
cp.b is used a lot as a way to load binaries to memory and execute
them, however we may need to integrate this with the efi subsystem to
set it up as a bootdev.
So, introduce a loadm command that will be consistent with the other
loadX commands and will call the efi API's.
ex: loadm $kernel_addr $kernel_addr_r $kernel_size
with this a kernel with CONFIG_EFI_STUB enabled will be loaded and
then subsequently booted with bootefi command.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Seems that u-boot can't probe i2c bus at 2.6Mhz speed, so lower
the speed to the default value 100Khz.
v2: fix i2c1 frequency in the root omap3-u-boot.dtsi include.
Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
- Correct livetree support in stm32mp1 boards
- Activate livetree for stm32mp15 DHSOM boards
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Merge tag 'u-boot-stm32-20220620' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
- Add STM32MP13 SoCs support with associated board STM32M135F-DK
- Correct livetree support in stm32mp1 boards
- Activate livetree for stm32mp15 DHSOM boards
The board supports up to 8 GiB memory. The memory is soldered on the
board but the configuration is equivalent to a dual chip select, dual
rank DIMM module.
Signed-off-by: Michael Walle <michael@walle.cc>
With a 8GiB memory board, it seems that the "very unlikely event" of a
DDR initialization with non-optimal values are not really that unlikely.
It happens in about every other reboot. As described in erratum
A-009942, preset the DEBUG_28 register with an optimal value. The value
iself depends on the memory configuration of the board, but the used
value seems to work well for all variants.
Signed-off-by: Michael Walle <michael@walle.cc>
A board might need to get the source of the RCW word, which is also the
boot source in most cases.
These defines are taken from the LS1028A and I expect they are the same
across the SoCs with the same chassis, after all, there was already a
reset source for NOR flash.
Signed-off-by: Michael Walle <michael@walle.cc>
Code for changing boot source is platform generic and can be used by any
P1* and P2* compatible RDB board. Not only by boards which use config
header file p1_p2_rdb_pc.h.
So move this code from p1_p2_rdb_pc.h to p1_p2_bootsrc.h and cleanup macros
for generating boot source env variables in CONFIG_EXTRA_ENV_SETTINGS.
This allows to use code for resetting board and rebooting to other boot
source also by other boards in future.
Signed-off-by: Pali Rohár <pali@kernel.org>
Currently default fallback SDHC mode is 1-bit. Add new config option
CONFIG_SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH to allow specifying default fallback
mode. This is useful e.g. for SPL builds which loads other parts from SD
card during boot process.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
8-bit mode is not supported by SD cards and on P2020 are four SDHC pins
shared with SPI (so if P2020 board have also SPI then only 4-bit SDHC mode
is provided). So 8-bit SDHC mode is really bad default.
When max bus width is not provided then set mode to 1-bit. This mode is
supported by all cards, so it is the best option for fallback mode.
Also P2020 bootrom sets mode to 1-bit when booting from SD/MMC card.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This patch adds config support for HDP firmware loading on LS1028A.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
For proper DM support it is required to fill also mtd->dev member.
Otherwise DM would not see nand device at all.
Signed-off-by: Pali Rohár <pali@kernel.org>
Effective page number mask for MAS2 register is stored in macro MAS2_EPN.
Fixes: 2146cf56821c ("Reworked FSL Book-E TLB macros to be more readable")
Signed-off-by: Pali Rohár <pali@kernel.org>
Header file asm/fsl_law.h already provides correct definition for second
and third PCIe controller (LAW_TRGT_IF_PCIE_2 and LAW_TRGT_IF_PCIE_3). But
is missing definition for the first PCIe controller (LAW_TRGT_IF_PCIE_1).
Note that existing definition for LAW_TRGT_IF_PCIE_2 and LAW_TRGT_IF_PCIE_3
are slightly complicated, but are really correct for P2020 platform.
Signed-off-by: Pali Rohár <pali@kernel.org>
When CONFIG_WDT is enabled then non-DM watchdog code cannot be used due to
conflicting functions like watchdog_reset(). So disable compilation of
mpc85xx watchdog_reset() function when CONFIG_WDT is enabled.
Signed-off-by: Pali Rohár <pali@kernel.org>
These frequency calculations depend on the RCW format, which is not
dependent on any particular board. Switch to using ARCH symbols instead
of TARGET.
This whole function could probably use less ifdefs, but for now just do
a minimal conversion.
Fixes: 24cb6f2295 ("fsl-layerscape: Add fsl_esdhc peripheral clock support")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds an SFP binding for the processors it is present on. I have
only tested this for the LS1046A.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
QorIQ platforms now use different clock bindings. Although we don't use
the device tree for clocks on this platform, it is helpful to sync it
because then the bindings will more closely match Linux. Additionally,
it allows for using more clock fractions (such as platform/4).
This corresponds to Linux commit b6f5e7019391 ("ARM: dts: ls1021a:
update the clockgen node").
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds a driver for the Security Fuse Processor (SFP) present on
LS1012A, LS1021A, LS1043A, and LS1046A processors. It holds the
Super-Root Key (SRK), One-Time-Programmable Master Key (OTPMK), and
other "security" related fuses. Similar devices (sharing the same name)
are present on other processors, but for the moment this just supports
the LS2 variants.
The mirror registers are loaded during power-on reset. All mirror
registers must be programmed or read at once. Because of this, `fuse
prog` will program all fuses, even though only one might be specified.
To prevent accidentally burning through all your fuse programming cycles
with something like `fuse prog 0 0 A B C D`, we limit ourselves to one
programming cycle per reset. Fuses are numbered based on their address.
The fuse at 0x1e80200 is 0, the fuse at 0x1e80204 is 1, etc.
The TA_PROG_SFP supply must be enabled when programming fuses, but must
be disabled when reading them. Typically this supply is enabled by
inserting a jumper or by setting a register in the board's FPGA. I've
also added support for using a regulator. This could be helpful for
automatically issuing the FPGA write, or for toggling a GPIO controlling
the supply.
I suggest using the following procedure for programming:
1. Override the fuses you wish to program
=> fuse override 0 2 A B C D
2. Inspect the values and ensure that they are what you expect
=> fuse sense 0 2 4
3. Enable TA_PROG_SFP
4. Issue a program command using OSPR0 as a dummy. Since it contains the
write-protect bit you will usually want to write it last anyway.
=> fuse prog 0 0 0
5. Disable TA_PROG_SFP
6. Read back the fuses and ensure they are correct
=> fuse read 0 2 4
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
If CONFIG_VIDEO_DM=n we query the display size from the serial console.
Especially when using a remote console the response can be so late that
it interferes with autoboot.
Only query the console size when running an EFI binary.
Add debug output showing the determined console size.
Reported-by: Fabio Estevam <festevam@gmail.com>
Fixes: a57ad20d07e8 ("efi_loader: split efi_init_obj_list() into two stages")
Fixes: a9bf024b2933 ("efi_loader: disk: a helper function to create efi_disk objects from udevice")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Fabio Estevam <festevam@denx.de>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
When the UEFI sub-system is initialized it sends an escape sequence to the
serial console to determine the terminal size. This stops the
run_command_list() function of the console emulation from recognizing the
U-Boot command line prompt.
Add a 'print -e' command as first command in the command list to work
around this issue.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
If printenv -e is executed and the specified variable is not found, the
return value $? of the command should be 1 (false).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Replace reference to the correct name STMicroelectronics
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Remove STM32_SYSRAM_END and clean the comments in stm32mp15_common.h file
after moving some CONFIG to Kconfig: CONFIG_SYS_CBSIZE,
CONFIG_SPL_MAX_FOOTPRINT, CONFIG_SYS_SPL_MALLOC_START and
CONFIG_SYS_SPL_MALLOC_SIZE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Depending on backup register value, U-Boot SPL maintains the debug unit
powered-on for debugging purpose; only BUCK1 is required for powering
the debug unit, so revert the setting for all the other power lanes,
except BUCK3 that has to be always on.
To be functional this patch requires a modification in the debugger
,openocd for example, to update the STM32MP15 backup register when it is
required to debug SPL after reset. After deeper analysis this behavior
will be never supported in tools so the associated code, will be never
used and the associated code can be removed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Activate the live DT with CONFIG_OF_LIVE to reduce the DT parsing
time.
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Replace call to fdt_*() functions and access to gd->fdt_blob
with call to ofnode_*() functions to support a live tree.
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Replace gd->fdt_blob access with fdt_getprop() function to the
function ofnode_get_property() to support a live tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Replace gd->fdt_blob access with fdt_getprop() function to the
function ofnode_get_property() to support a live tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add the MISC RCC driver for STM32MP13, and bind it to the RCC reset
driver, required for initial support.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Change-Id: Ida11c15462caf140f87b1e3239efa2b8a689acb9
Add a directory in drivers/clk to regroup the clock drivers for all
STM32 Soc with CONFIG_ARCH_STM32 (MCUs with cortex M) or
CONFIG_ARCH_STM32MP (MPUs with cortex A).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Acked-by: Sean Anderson <seanga2@gmail.com>
Change-Id: I955af307963f732167396f0157a30cf2fc91f150
Add support of STM32MP13x the ETZPC part of fdt.c
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: If2777fbf66b8525a2a447056780aaa04e6b0a9a0
Introduce STM32MP15 function and defines to prepare the
STM32MP13 introduction.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I909b205e73dcf207e0216aae5905c3c52472020e
Add in U-Boot documentation the quick instruction to
setup the STMicroelectronics STM32MP13x boards.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a initial config for STM32M13x SOC family, using the stm32mp135f-dk
device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Compile the device tree of STM32MP13x boards and add the needed
U-Boot add-on.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Although not recommended, the reset property could be made optional.
This way the driver will probe even if no reset property is provided
in an sdmmc node in DT. This reset is already optional in Linux.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add support for new compatible "st,stm32mp13-ddr" to manage the
DDR sub system (Controller and PHY) in STM32MP13x SOC:
- only one AXI port
- support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2)
The STM32MP15x SOC have 2 AXI ports and 32 bits support.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add stm32mp15x prefix to all STM32MP15x board specific functions,
this patch is a preliminary step for STM32MP13x support.
This patch also adds the RCC probe to avoid circular access with
usbphyc probe as clk provider.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Convert the constant integer to 'phys_size_t' to avoid overflow
when calculating the SDRAM size.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
There is hardware bug in NCORE CCU IP and it is causing an issue in the
coherent directory tracking of outstanding cache lines.
The workaround is disabling snoop filter.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
The freeze controller is required for FPGA partial reconfig.
This node is disable on default.
Enable this node via u-boot fdt command when needed.
Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com>
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
The freeze controller is required for FPGA partial reconfig.
This node is disable on default.
Enable this node via u-boot fdt command when needed.
Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com>
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Override __udelay() as 'always inlined' function so that PSCI code
run in '__secure' section can call this delay function as well.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Add support for "st,stm32mp135-pinctrl" for STM32MP13x
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of several MAC address in OTP (3 32bits OTP word for
2 MAC address) for SOCs in STM32MP13x family: STM32MP133 and STM32MP135.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Introduce the code in mach-stm32mp and the configuration file
stm32mp13_defconfig for the new STM32MP family.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add config CONFIG_STM32MP15_PWR to handle the
access to regulators managed by the PWR driver defined in
pwr_regulator.c
This driver is only used in U-Boot by STM32MP15x family.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add sub Kconfig for each SOC in the STM32 CPU family.
It is a preliminary step to introduce a new SOC in the STM32MP family.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add mandatory choice for SOC support in ARCH_STM32MP.
This patch is a preliminary step for new SOC introduction
in STM32MP family.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Move code and defines only needed for CONFIG_STM32MP15x in stm32mp15x.c
when low level init without TFABOOT is supported.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
As the get_otp() helper function in bsec are common for all STM32MP family,
move this function in bsec driver
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The SPL is only supported by STM32MP15x not by all the
SOC with STM32MP arch.
Only TFABOOT is supported in next products.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add initial support of STM32MP13 family based on v5.18-rc2
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add DT for DH DRC Compact unit, which is a universal controller device.
The system has two ethernet ports, one CAN, RS485 and RS232, USB, uSD
card slot, eMMC and SDIO Wi-Fi.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add another mux option for SPI2 pins, this is used on DRC Compact board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add another mux option for CAN1 pins, this is used on DRC Compact board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add another mux option for UART5 pins, this is used on DRC Compact board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add another mux option for UART4 pins, this is used on DRC Compact board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add another mux option for UART3 pins, this is used on DRC Compact board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The third parameter of dfu_alt_add(), the string description of alternate,
is build in stm32prog_alt_add() with a unnecessary character ';' at the
end of the string.
This separator was required in the first implementation of
dfu_alt_add() but is no more needed in the current implementation;
this separator is managed only in dfu_config_interfaces() which call
dfu_alt_add() for this parameter without this separator.
And since the commit 53b406369e9d ("DFU: Check the number of arguments
and argument string strictly"), this added character cause an error when
the stm32prog command is executed because the third parameter of
dfu_alt_add() must be a string with a numerical value; 's' must be NULL
in the result of call in dfu_fill_entity_mmc():
third_arg = simple_strtoul(argv[2], &s, 0);
Fixes: 53b406369e9d ("DFU: Check the number of arguments and argument string strictly")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Replace discuss with discard, that is what happens with packet with
incorrect checksum. Fix the typo.
Fixes: 4b37fd146bb ("Convert CONFIG_UDP_CHECKSUM to Kconfig")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
The origin of this patch is the breaking of am335x-hs boot
due to commit e41651fffda7 ("dm: Support parent devices with of-platdata")
HS boards have less SRAM for SPL and so this commit increased memory usage beyond am335x limit.
This commit added 10 driver binding pass and am335x boot only if one pass is done.
SPL try to do more than one pass due to eth_cpsw failing.
Since HS SPL does not need network (and NET is already disabled in config),
the easiest fix is to "remove" eth_cpsw from SPL by testing if NET is enabled.
Signed-off-by: Corentin LABBE <clabbe@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Andrew Davis <afd@ti.com>
Currently get_tcr() takes an "el" parameter, to select the proper
version of the TCR_ELx system register.
This is problematic in case of the Apple M1, since it runs with
HCR_EL2.E2H fixed to 1, so TCR_EL2 is actually using the TCR_EL1 layout,
and we get the wrong version.
For U-Boot's purposes the only sensible choice here is the current
exception level, and indeed most callers treat it like that, so let's
remove that parameter and read the current EL inside the function.
This allows us to check for the E2H bit, and pretend it's EL1 in this
case.
There are two callers which don't care about the EL, and they pass 0,
which looks wrong, but is irrelevant in these two cases, since we don't
use the return value there. So the change cannot affect those two.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
With the move to use DM_CLK the boards uart stops working. The used
properties are not supported by the imx8mq clock driver. Thus
the correct baudrate cannot be selected. Remove this properties here and
the board can start with working uart. Keep it in the main dts because
linux handles these porperties fine.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
The generic EHCI binding does not *require* resets and clocks
properties, and indeed for instance the Allwinner A20 SoCs does not
need or define any resets in its DT.
Don't easily give up if clk_get_bulk() or reset_get_bulk() return an
error, but check if that is due to the DT simply having no entries for
either of them.
This fixes USB operation on all boards with an Allwinner A10 or A20 SoC,
which were reporting an error after commit ba96176ab70e2999:
=======================
Bus usb@1c14000: ehci_generic usb@1c14000: Failed to get resets (err=-2)
probe failed, error -2
=======================
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Following Jincheng's report, an out-of-band write leading to arbitrary
code execution is possible because on one side the squashfs logic
accepts directory names up to 65535 bytes (u16), while U-Boot fs logic
accepts directory names up to 255 bytes long.
Prevent such an exploit from happening by capping directory name sizes
to 255. Use a define for this purpose so that developers can link the
limitation to its source and eventually kill it some day by dynamically
allocating this array (if ever desired).
Link: https://lore.kernel.org/all/CALO=DHFB+yBoXxVr5KcsK0iFdg+e7ywko4-e+72kjbcS8JBfPw@mail.gmail.com
Reported-by: Jincheng Wang <jc.w4ng@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Jincheng Wang <jc.w4ng@gmail.com>
When migrating CONFIG_CONS_INDEX to Kconfig, on this platform we changed
what "board" evaluated to in the environment. This in turn meant that
we would no longer try and find the correct fdtfile via the normal
distro boot logic. Fix this by overriding board in the default
environment, as done on other platforms where CONFIG_SYS_BOARD is not
what we want to be in the board environment variable.
Fixes: f76750d11133 ("Convert CONFIG_CONS_INDEX et al to Kconfig")
Reported-by: Gabriel Hojda <ghojda@yo2urs.ro>
Tested-by: Gabriel Hojda <ghojda@yo2urs.ro>
Signed-off-by: Tom Rini <trini@konsulko.com>
b4 utility [1] is introduced by Linux Kernel developers and used to
fetch patches and patch series from lore.kernel.org and is proven
to be useful for U-Boot development. Detailed usage of the tool can be
read under post from the original author [2].
This tool fetches files from the list and populates the source folder
with additional files (*.cover and *.mbx) which are not ignored by git
and shown as newly added files.
Add those file patterns into .gitignore file, so they can be safely
skipped during changes attestation.
Link: [1]: https://pypi.org/project/b4/
Link: [2]: https://people.kernel.org/monsieuricon/introducing-b4-and-patch-attestation
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Without this register unlock it is not possible to configure the
pinmux used for mcu spi0.
Fixes: 92e46092f2 ("arch: arm: mach-k3: am642_init: Probe ESM nodes")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
While working on an LX2160 based board and updating to latest mainline
I noticed problems using the HW accelerated hash functions on this
platform, when trying to boot a FIT Kernel image. Here the resulting
error message:
Using 'conf-freescale_lx2160a.dtb' configuration
Trying 'kernel-1' kernel subimage
Verifying Hash Integrity ... sha256Error: Address arguments are not aligned
CAAM was not setup properly or it is faulty
error!
Bad hash value for 'hash-1' hash node in 'kernel-1' image node
Bad Data Hash
ERROR: can't get kernel image!
Testing and checking with Gaurav Jain from NXP has revealed, that this
alignment check is not necessary here at all. So let's remove this
check completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gaurav Jain <gaurav.jain@nxp.com>
Cc: dullfire@yahoo.com
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Clean up in ubiload script. Unmount UBIFS from which kernel image was
loaded and detach UBI on which the UBIFS is located, otherwise message
similar to the following is printed just before booting kernel:
Removing MTD device #7 (rootfs) with use count 1
Error when deleting partition "rootfs" (-16)
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Replace with phys_size_t for all memory size variables declaration
for the sake of scalability. phys_size_t is defined in
/arch/arm/include/asm/types.h.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Bit[7-4] for both register seq2core and core2seq handshake in HPS are not
required for triggering DDR re-calibration or resetting EMIF. So, ignoring
these bits just for playing it safe.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
This new MMC sample select value is obtained from running
tests on multiple Stratix 10 boards and proven working.
Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
All the source code of sdram_n5x.c are from Intel, update the license to
use both GPL2.0 and BSD-3 Clause because this copy of code may used for
open source and internal project.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
The nxp_fspi_default_setup() is only ever called from nxp_fspi_probe(),
where the IP clock are initially disabled. Drop the second disabling of
clock to prevent clock enable/disable imbalance reported by clock core:
"
clk qspi_root_clk already disabled
"
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
There is no wait_dat0 mmc ops, causing operations waiting for data
line state change (e.g mmc_switch_voltage) to fallback to a 250ms
active delay. mmc_ops still used when DM_MMC is not enabled, which
is often the case for SPL. The result can be unexpectly long SPL
boot time.
This change adds support for wait_dat0() mmc operation.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
On eMMC device, the erase_grp_size > 1 so the address and size for the
erase block command in env/mmc.c can be unaligned on erase group size and
some strange trace occurs and the result is not guarantee by MMC devices.
The SD-Card behavior doesn't change as erase_grp_size = 1 for SD-Card.
For example, on eMMC present on STM32MP15C-EV1 and before the patch:
STM32MP> env erase
Erasing Environment on MMC...
Caution! Your devices Erase group is 0x400
The erase range would be change to 0x2000~0x27ff
16 blocks erased: OK
Caution! Your devices Erase group is 0x400
The erase range would be change to 0x2000~0x23ff
16 blocks erased: OK
OK
After this patch:
STM32MP> env erase
Erasing Environment on MMC...
1024 blocks erased at 0x2000: OK
1024 blocks erased at 0x2000: OK
OK
Here the 2 copies of U-Boot environment are in the same devices Erase
group: it is erased twice.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Fix the end address in the message for unaligned erase request in
mmc_berase() when start + blkcnt is aligned to erase_grp_size.
for example:
- start = 0x2000 - 26
- count = 26
- erase_grp_size = 0x400
Caution! Your devices Erase group is 0x400
The erase range would be change to 0x2000~0x27ff
But no issue when the end address is not aligned, for example
- start = 0x2000 - 2 * 26
- count = 26
- erase_grp_size = 0x400
Caution! Your devices Erase group is 0x400
The erase range would be change to 0x2000~0x23ff
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Mark wdog1/pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
CONFIG_SPL_RAW_IMAGE_SUPPORT default y has been used to replace
CONFIG_SPL_ABORT_ON_RAW_IMAGE for quite some time, so drop
CONFIG_SPL_ABORT_ON_RAW_IMAGE.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable CONFIG_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_init to make sure driver
model work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Enable CONFIG_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_init to make sure driver
model work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable CONFIG_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable CONFIG_DM_SERIAL. uart3 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_init to make sure driver
model work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm_beacon
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mn_beacon
Since these boards has CONFIG_DM_SERIAL and/or CONFIG_SPL_DM_SERIAL,
the legacy macro no need to be defined.
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Soeren Moch <smoch@web.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Upstream commit 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY,
HSIOMIX clock") added usb_core_ref for USB Controller but never set it
to be used as a clock source, using rather "osc_32k" instead.
This produces following boot log message:
"clk_register: failed to get osc_32k device (parent of usb_root_clk)"
Fix the USB controller clock source by using usb_core_ref instead of
osc_32k.
Fixes: 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Root clock name contained underscore, which does not match to the actual
clock name.
Correct the name to match what is present in the FDT.
Fixes: 87f958810fcb ("clk: imx8mp: Add ECSPI clocks")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
systemd prints its messages on the last console= statement that it finds
in the kernel arguments. The current ordering sends the systemd messages
to tty1, by default this is the display.
Ensure that systemd sends its messages to the default UART, reorder the
console= statements accordingly.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Since SoMs revision 1.9 the ar8035 phy has been replaced by adin1300.
Enable the driver so that the new SoMs have functional networking.
Signed-off-by: Josua Mayer <josua@solid-run.com>
SoM revision 1.9 has replaced the ar8035 phy address 0 with an adin1300
at address 1. Because early SoMs had a hardware flaw, the ar8035 can
also appear at address 4 - making it a total of 3 phy nodes in the DTB.
To avoid confusing Linux with probe errors, fixup the dtb to only enable
the phy node that is detected at runtime.
Signed-off-by: Josua Mayer <josua@solid-run.com>
The Cubox has an unstable phy address - which can appear at either
address 0 (intended) or 4 (unintended).
SoM revision 1.9 has replaced the ar8035 phy with an adin1300, which
will always appear at address 1.
Change the reg property of the phy node to the magic value 0xffffffff,
which indicates to the generic phy driver that all addresses should be
probed. That allows the same node (which is pinned by phy-handle) to match
either the AR8035 PHY at both possible addresses, as well as the new one
at address 1.
Also add the new adi,phy-output-clock property for enabling the 125MHz
clock used by the fec ethernet controller, as submitted to Linux [1].
Linux solves this problem differently:
For the ar8035 phy it will probe both phy nodes in device-tree in order,
and use the one that succeeds. For the new adin1300 it expects U-Boot to
patch the status field in the DTB before booting
While at it also sync the reset-delay with the upstream Linux dtb.
[1] https://patchwork.kernel.org/project/netdevbpf/patch/20220428082848.12191-4-josua@solid-run.com/
Signed-off-by: Josua Mayer <josua@solid-run.com>
The ADIN1300 supports generating certain clocks on its GP_CLK pin, as
well as providing the reference clock on CLK25_REF.
Add support for selecting the clock via device-tree properties.
This patch is based on the Linux implementation for this feature,
which has been added to netdev/net-next.git [1].
[2] https://patchwork.kernel.org/project/netdevbpf/cover/20220517085143.3749-1-josua@solid-run.com/
Signed-off-by: Josua Mayer <josua@solid-run.com>
Currently, the adin driver fails to compile.
The original patch introducing the adin driver used the function
phy_get_interface_by_name to support the adi,phy-mode-override
property. Unfortunately, a few days before the adin patch
was accepted, another patch removed support for phy_get_interface_by_name:
123ca114e0
This patch refactors adin_get_phy_mode_override, implementing the logic in
the new function, ofnode_read_phy_mode, from the patch above.
Signed-off-by: Nate Drude <nate.d@variscite.com>
Tested-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Josua Mayer <josua@solid-run.com>
The imx8mn-ddr4-evk board has Ethernet support already, but the
lpddr4 board does not.
Add Ethernet support for the LPDDR4 variant too.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Add the new Apalis iMX8 product variant
0067: Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT
the only difference to the product
0037 Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT
is the 8gb of RAM. Toradex strategy to choose the correct RAM timing in
SCFW is by fuses in the user area telling which RAM timing to load.
This commit makes use of this information to set the correct size of
the RAM and therefore distinguish between the new 0067 and 0037 product
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
0067: Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT
This module is identical to its 4GB counterpart
0037: Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT
except for the RAM size.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
The generated flash.bin does not boot the imx8mn evk LPDDR4 variant
as it misses the spl.bin description in binman.
Add its entry to fix the boot on the imx8mn evk LPDDR4 variant.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Arti Zirk <art@zirk.me>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
This test was written to match up with the list of compatibles in
drivers/i2c/tegra_i2c.c so adding another one requires the test to be
updated to match.
Fixes: 0d2105ae5e32 ("arm: tegra: Update some DT compatibles")
Signed-off-by: Tom Rini <trini@konsulko.com>
The pca9450 driver uses dm_i2c_{read,write}, which
are (unsurprisingly) only available with DM_I2C. Make sure one can't
create an unbuildable .config by adding proper dependencies.
While here, append "in SPL" to the prompt for the SPL_ variant so it
doesn't read the same as the one for the non-SPL_ variant.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Use device tree to set MAC address of the Ethernet chip.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Some of the DT compatibles have changed upstream so add new DT compatibles
to ensure things continue to keep working if the device trees are
updated.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add new lines to make errorr messages easier to read.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add new lines for error messages to make them easier to read.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
UEFI:
* Ignore OsIndications if CONFIG_EFI_IGNORE_OSINDICATIONS=y
* Correct UEFI default binary name
* Let efidebug create boot options without file path
* Support booting with a boot option with shortened device only device path
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Merge tag 'efi-2022-07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc5
UEFI:
* Ignore OsIndications if CONFIG_EFI_IGNORE_OSINDICATIONS=y
* Correct UEFI default binary name
* Let efidebug create boot options without file path
* Support booting with a boot option with shortened device only device path
Allow booting from a short form device-path without file path, e.g.
/HD(1,GPT,5ef79931-a1aa-4c70-9d67-611e8f69eafd,0x800,0x1000)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Only on the sandbox the default EFI binary name (e.g. BOOTX64.EFI) must
match the host architecture.
In all other cases we must use the target architecture.
Use #elif where appropriate.
Reported-by: Vagrant Cascadian <vagrant@reproducible-builds.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The GetImageInfo function definitions for the FIT images and raw
images are the same. Use a common function for the both the Firmware
Management Protocol(FMP) instances for raw and FIT images.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The EFI_IGNORE_OSINDICATIONS config symbol was introduced as a
mechanism to have capsule updates work even on platforms where the
SetVariable runtime service was not supported. The current logic
requires the OsIndications variable to have been set to a 64 bit value
even when the EFI_IGNORE_OSINDICATIONS config is enabled. Return an
error code on not being able to read the variable only when
EFI_IGNORE_OSINDICATIONS is not enabled.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add am62x_evm_r5_defconfig for R5 SPL and am62x_evm_a53_defconfig for
A53 SPL and U-Boot support.
To keep the changes to minimum. Only UART And SD boot related configs
are included. This should serve as good starting point for new board
bringup with AM62x.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
[trini: Migrate a number of CONFIG symbols, have re-tested]
Tested-by: Georgi Vlaev <g-vlaev@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
AM62 StarterKit (SK) board is a low cost, small form factor board
designed for TI’s AM625 SoC. It supports the following interfaces:
* 2 GB DDR4 RAM
* x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode
* x1 HDMI Port with audio + x1 OLDI/LVDS Display interface for Dual Display
* x1 Headphone Jack
* x1 USB2.0 Hub with two Type A host and x1 USB Type-C DRP Port
* x1 UHS-1 capable µSD card slot
* 2.4/5 GHz WLAN + Bluetooth 4.2 through WL1837
* 512 Mbit OSPI flash
* x4 UART through UART-USB bridge
* XDS110 for onboard JTAG debug using USB
* Temperature sensors, user push buttons and LEDs
* 40-pin User Expansion Connector
* 24-pin header for peripherals in MCU island (I2C, UART, SPI, IO)
* 20-pin header for Programmable Realtime Unit (PRU) IO pins
* 15-pin CSI header
Add basic support for AM62-SK.
To keep the changes to minimum. Only UART And SD are supported at the
moment. This should serve as good example for adding new board support
based on AM62x SoC
Schematics: https://www.ti.com/lit/zip/sprr448
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add basic support for AM62 SK. This has 2GB DDR.
Note that stack for R5 SPL is in OCRAM @ 0x7000ffff so that is away from
BSS and does not step on BSS section
Add only the bare minimum required to support UART and SD.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Introduce autogenerated SoC data support clk and device data for the
AM62. Hook it upto to power-domain and clk frameworks of U-Boot.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The AM62 SoC family is the follow on AM335x built on K3 Multicore SoC
architecture platform, providing ultra-low-power modes, dual display,
multi-sensor edge compute, security and other BOM-saving integration.
The AM62 SoC targets broad market to enable applications such as
Industrial HMI, PLC/CNC/Robot control, Medical Equipment, Building
Automation, Appliances and more.
Some highlights of this SoC are:
* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
Pin-to-pin compatible options for single and quad core are available.
* Cortex-M4F for general-purpose or safety usage.
* Dual display support, providing 24-bit RBG parallel interface and
OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display
resolution.
* Selectable GPUsupport, up to 8GFLOPS, providing better user experience
in 3D graphic display case and Android.
* PRU(Programmable Realtime Unit) support for customized programmable
interfaces/IOs.
* Integrated Giga-bit Ethernet switch supporting up to a total of two
external ports (TSN capable).
* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for
NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
* Dedicated Centralized System Controller for Security, Power, and
Resource Management.
* Multiple low power modes support, ex: Deep sleep,Standby, MCU-only,
enabling battery powered system design.
AM625 is the first device of the family. Add DT bindings for the same.
More details can be found in the Technical Reference Manual:
https://www.ti.com/lit/pdf/spruiv7
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add support for AM62x SoC identification.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add pinctrl macros for AM62x SoCs. These macro definitions are similar
to that of previous platforms, but adding new definitions to avoid any
naming confusions in the SoC dts files.
checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses
However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
The phy used in the 8 bit instance has been changed to the phy used in 4
bit instance on AM62 SoC. This implies the phy configuration required for
both the instances of mmc are similar. Therefore, add a new compatible
for AM62 SoC using the driver data of am64 4 bit instance.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Sync the configs required for enabling checks for size of image and stack
from generic r5 defconfig file.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
The node name of the bus in the device tree has changed. Also, the length
argument to be passed should be the length of new value. Therefore, fix the
path to usb device tree node as well as the length argument passed.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
For dfu boot mode, the clocks property needs to be deleted and dr_mode
needs to be set to peripheral. Therefore, add the required fixes for the
same.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
There is a TX-FIFO and Shift Register empty(TFES) status
bit in spi controller. This commit checks the TFES bit
to wait the TX transfer completes.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Satoru Okamoto <okamoto.satoru@socionext.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
DMSTART bit must not be set while there is active transfer.
This commit sets the DMSTART bit only when the transfer begins.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Satoru Okamoto <okamoto.satoru@socionext.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
synquacer_cs_set() function does not wait the chip select
is deasserted when the driver sets the DMSTOP to deselect
the slave.
This commit checks the Slave Select Released(SRS) bit to wait
until the slave is deselected.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Satoru Okamoto <okamoto.satoru@socionext.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
"busy" variable is ORed without being initialized,
must be zeroed before use.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Satoru Okamoto <okamoto.satoru@socionext.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
This commit sets two additional variables in the default BOOTCOMMAND.
Adding 'boot=mmc' and 'addr_fit=0x8b000000' removes the need for a
special 'uEnv.txt' to be created. The 'addr_fit' variable is the key
piece here. It is normally defined as 0x90000000, in the macro
DEFAULT_FIT_TI_ARGS. For this OMAP34XX board, 0x8b000000 works without
touching other varibles. This was tested with a 'fitImage' created
using the following FIT source:
----------------------------------------------------------------------
/dts-v1/;
/ {
description = "Simple image with single Linux kernel and FDT blob";
#address-cells = <1>;
images {
kernel {
description = "Linux kernel: omap2plus";
data = /incbin/("./zImage");
type = "kernel";
arch = "arm";
os = "linux";
compression = "none";
load = <0x80008000>;
entry = <0x80008000>;
hash-1 {
algo = "sha256";
};
};
fdt-omap3-evm.dtb {
description = "FDT: omap3-evm.dtb";
data = /incbin/("./omap3-evm.dtb");
type = "flat_dt";
arch = "arm";
compression = "none";
load = <0x8ff00000>;
hash-1 {
algo = "sha256";
};
};
};
configurations {
default = "conf-omap3-evm.dtb";
conf-omap3-evm.dtb {
description = "Boot Linux kernel with FDT blob";
kernel = "kernel";
fdt = "fdt-omap3-evm.dtb";
};
};
};
----------------------------------------------------------------------
Additionally, the default environment is now stored in "uboot.env" on
the FAT partition of MMC '0'.
Fixes: 11e2ab3f0b ("ARM: omap3: evm: Enable booting 'fitImage' with DEFAULT_FIT_TI_ARGS")
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
This is the initial support for Broadcom's ARM-based 47622 SOC.
In this change, our first SOC is an armv7 platform called 47622. The
initial support includes a bare-bone implementation and dts with ARM
PL011 uart.
The SOC-specific code resides in arch/arm/mach-bcmbca/<soc> and board
related code is in board/broadcom/bcmba.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Enable HBMC and HyperFlash in R5SPL, A72 SPL and A72 U-Boot
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
[trini: Update j721e_hs_evm_a72 as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
On j721e, its not possible to use OSPI0 and HBMC simultaneously as they
are muxed within the Flash Subsystem hence disable HBMC by default and
keep OSPI enabled. Bootloader will fixup DT when it detects HyperFlash
mux selection instead of OSPI.
Also updated detect_enable_hyperflash to use correct GPIO when checking
hypermux selection state:
* J7200 - hypermux sel connected to WKUP_GPIO0_6
* J721E - hypermux·sel·connected·to·WKUP_GPIO0_8
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Add wkup_gpio pinmux setting which will be used for performing the
DT fixup for hbmc node according to mux selection state, on J721E
EVM, hypermux sel is tied to ·WKUP_GPIO0_8.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Add DT node for HyperBus Memory Controller and hbmc-mux in the
FSS. hbmc-am654 driver uses syscon_get_regmap() call which fails
with current compatible setting.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
To quote the author:
This adds support for the nvmem-cells properties cropping up in manyb
device trees. This is an easy way to load configuration, version
information, or calibration data from a non-volatile memory source. For
more information, refer to patch 6 ("misc: Add support for nvmem
cells").
For the moment I have only added some integration tests using the
ethernet addresses. This hits the main code paths (looking up nvmem
cells) but doesn't test writing. I can add a few stand-alone tests if
desired.
This uses the nvmem API to load a mac address from an RTC.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This uses an i2c eeprom to load a mac address using the nvmem interface.
Enable I2C_EEPROM for sandbox SPL since it is the only sandbox config
which doesn't enable it eeprom.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds support for reading mac addresses from the "mac-address" nvmem
cell. If there is no (local-)mac-address property, then we will try
reading from an nvmem cell.
For some existing examples of this property, refer to imx8mn.dtsi and
imx8mp.dtsi. Unfortunately, fuse drivers have not yet been converted
to DM.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This enables NVMEM for all sandbox defconfigs, enabling it to be used in
unit tests in the next few commits.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds support for "nvmem cells" as seen in Linux. The nvmem device
class in Linux is used for various assorted ROMs and EEPROMs. In this
sense, it is similar to UCLASS_MISC, but also includes
UCLASS_I2C_EEPROM, UCLASS_RTC, and UCLASS_MTD. New drivers corresponding
to a Linux-style nvmem device should be implemented as one of the
previously-mentioned uclasses. The nvmem API acts as a compatibility
layer to adapt the (slightly different) APIs of these uclasses. It also
handles the lookup of nvmem cells.
While nvmem devices can be accessed directly, they are most often used
by reading/writing contiguous values called "cells". Cells typically
hold information like calibration, versions, or configuration (such as
mac addresses).
nvmem devices can specify "cells" in their device tree:
qfprom: eeprom@700000 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x00700000 0x100000>;
/* ... */
tsens_calibration: calib@404 {
reg = <0x404 0x10>;
};
};
which can then be referenced like:
tsens {
/* ... */
nvmem-cells = <&tsens_calibration>;
nvmem-cell-names = "calibration";
};
The tsens driver could then read the calibration value like:
struct nvmem_cell cal_cell;
u8 cal[16];
nvmem_cell_get_by_name(dev, "calibration", &cal_cell);
nvmem_cell_read(&cal_cell, cal, sizeof(cal));
Because nvmem devices are not all of the same uclass, supported uclasses
must register a nvmem_interface struct. This allows CONFIG_NVMEM to be
enabled without depending on specific uclasses. At the moment,
nvmem_interface is very bare-bones, and assumes that no initialization
is necessary. However, this could be amended in the future.
Although I2C_EEPROM and MISC are quite similar (and could likely be
unified), they present different read/write function signatures. To
abstract over this, NVMEM uses the same read/write signature as Linux.
In particular, short read/writes are not allowed, which is allowed by
MISC.
The functionality implemented by nvmem cells is very similar to that
provided by i2c_eeprom_partition. "fixed-partition"s for eeproms does
not seem to have made its way into Linux or into any device tree other
than sandbox. It is possible that with the introduction of this API it
would be possible to remove it.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Add some fallback functions for when i2c_eeprom is disabled. This allows
code to reference i2c_eeprom_* functions without needing to check
whether support has been compiled in.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
i2c_eeprom_ops->write uses a const buf, so use one for the wrapper
function as well.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If the DSA master fails to probe for whatever reason, then DSA devices
will continue on as if nothing is wrong. This can cause incorrect
behavior. In particular, on sandbox, dsa_sandbox_probe attempts to
access the master's private data. This is only safe to do if the master
has been probed first. Fix this by probing the master after we look it
up, and bailing out if we get an error.
Fixes: fc054d563b ("net: Introduce DSA class for Ethernet switches")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
This prevents some conflicts when running sandbox with -D, since the
"rom" mac address will be random and won't match the environment. We
still need to keep addresses for eth1 and eth6 in the environment,
because dm_test_eth_rotate expects to be able to disable them by
removing their envaddr variables. This can likely be fixed in a future
series by adding a function to cause sandbox eth_opts callback for a
particular mac to fail immediately.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
DSA interfaces use the same mac address for each interface, unless
instructed otherwise. Just set eth4addr and let eth2addr and eth7addr be
set automatically.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Instead of reading a pseudo-rom mac address from the device tree, just use
whatever we get from write_hwaddr. This has the effect of using the mac
address from the environment (or from the device tree, if it is
specified).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
This adds a test to make sure that all the ethernet interfaces have
their addresses read properly. At the moment everything is read from the
environment, but the next few commits will add additional sources.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The phy_eth0 interface introduced in commit f3dd213e15 ("net: introduce
helpers to get PHY ofnode from MAC") uses a globally-administered
address. Switch to using a locally-administered address, and add it to
the sandbox environment, like the others.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
To quote the author:
Make the virtio ring code resilient against corruption of the buffers
shared with the device.
It follows the example of Linux by keeping a private copy of the
descriptors and metadata for state tracking and only ever writing to the
descriptors that are shared with the device. I was able to test these
hardening steps in the sandbox by simulating device writes to the
queues.
Add a regression test for virtio-rng reading beyond the end of its
buffer if the virtio device provides an invalid length.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Check the length of data written by the device is consistent with the
size of the buffers to avoid out-of-bounds memory accesses in case
values aren't consistent.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Once the virtio-rng driver has been bound, probe it to trigger the pre
and post child probe hooks of the virtio uclass driver. Check the status
of the virtio device to confirm it reached the expected state.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The virtio-rng driver is extremely simple, making it suitable for
testing more of the virtio uclass logic. Have the sandbox driver bind
the virtio-rng driver rather than the virtio-blk driver so it can be
used in tests.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Virtio tests that find a child device require the virtio device driver
to be included in the build so it can probe. The sandbox virtio
transport driver currently reports a virtio-blk device so make sure the
corresponding driver is built before running tests that need it.
Signed-off-by: Andrew Scull <ascull@google.com>
The virtqueue is passed to virtio_notify() so move the virtqueue
deletion to the end of the test when it's no longer needed. This wasn't
causing any problems because the sandbox virtio transport driver doesn't
do anything for notifications, but it could cause problems if things
change and it was a bad example.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The virtio sandbox transport was setting the device features value to
the bit index rather than shifting a bit to the right index. Fix this
using the bit manipulation macros.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The virtio ring is the basis of virtio communication. Test its basic
functionality and its resilience against corruption from the device.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When the device returns used buffers, it should refer to the descriptor
that is the head of the descriptor chain for that buffer. Confirm this
to be the case by tracking the head of descriptor chains that have been
made available to the device.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The shared descriptors should only be written by the guest driver,
however, the device is still able to overwrite and corrupt them.
Maintain a private shadow copy of the descriptors for the driver to
use for state tracking, removing the need to read from the shared
descriptors.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move the logic for attaching a descriptor to its own function.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The variables `total_sg` and `descs_used` have the same value. Replace
the few uses of `total_sg` with `descs_used` to simplify the situation.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds a driver for configuration of the Microchip USB251xB/xBi
USB 2.0 hub controller series with USB 2.0 upstream connectivity, SMBus
configuration interface and two to four USB 2.0 downstream ports.
This is ported from Linux as of Linux kernel commit
5c2b9c61ae5d8 ("usb: usb251xb: add boost-up property support")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
This is used to avoid the ports status of IPPC being brought in kernel
stage, it may cause ports error especially when the xhci controller is
a component of dual-role controller.
Reported-by: Yun-Chien Yu <yun-chien.yu@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Allow to compile assembler files in SPL build which calls WATCHDOG_RESET
function when watchdog is disabled in SPL and enabled in U-Boot proper.
This issue was fixed in past by commit 7fbd42f5afc4 ("watchdog: Handle SPL
build with watchdog disabled") for C source files, but not for assembler
source files.
Currently the only assembler source file which calls WATCHDOG_RESET is
arch/powerpc/lib/ticks.S, so this patch affects and fixes powerpc SPL
builds.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
CONFIG_VAL(DEBUG_UART_BASE) expands to CONFIG_DEBUG_UART_BASE or
CONFIG_SPL_DEBUG_UART_BASE or CONFIG_TPL_DEBUG_UART_BASE and allows boards
to set different values for SPL, TPL and U-Boot Proper.
For ns16550 driver this support is there since commit d293759d55cc
("serial: ns16550: Add support for SPL_DEBUG_UART_BASE").
Signed-off-by: Pali Rohár <pali@kernel.org>
Skip missing setup data (which is valid) rather than failing with an
error.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reported-by: Andrew Walbran <qwandor@google.com>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
GZIP option can be manually de-selected when UBIFS is enabled. This cause
following compile error because ubifs calls gzip functions.
/tmp/ccxVrh2c.ltrans1.ltrans.o: in function `gzip_decompress.lto_priv.566':
<artificial>:(.text+0x768): undefined reference to `zunzip'
collect2: error: ld returned 1 exit status
make: *** [Makefile:1813: u-boot] Error 1
So add missing dependency on GZIP.
Signed-off-by: Pali Rohár <pali@kernel.org>
rootwait=1 is not a valid kernel boot parameters. According
to the documenation is only rootwait
rootwait [KNL] Wait (indefinitely) for root device to show up.
Useful for devices that are detected asynchronously
(e.g. USB and MMC devices).
Fix:
Unknown kernel command line parameters "rootwait=1", will be passed to user space.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
The bi_enetaddr field in struct bd_info is write-only; nothing ever
reads back the value.
Moreover, the value we write is more or less random, and certainly not
something one can rely on: If the board has a writable environment and
the mac address has been stored there, we fetch that value. But if the
board doesn't, this code runs before initr_net() -> eth_initialize(),
and thus before the code in eth-uclass which fetches MAC addresses
from eeprom, fuses or whatnot and populates the (run-time) environment
with those values.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Linux determines its console based on several sources:
1. the console command line parameter
2. device tree (e.g. /chosen/stdout-path)
3. various other board- and arch-specific sources
If the console parameter specifies a real console (e.g. ttyS0) then that is
used as /dev/console. However, if it does not specify a real console (e.g.
ttyDoesntExist) then *nothing* will be used as /dev/console.
Reading/writing it will return ENODEV. Additionally, no other source will
be used as a console source.
Linux commit ab4af56ae250 ("printk/console: Allow to disable console output
by using console="" or console=null") recently changed the semantics of the
parameter. Previously, specifying console="" would be treated like
specifying some other bad console. This commit changed things so that it
added /dev/ttynull as a console (if available). However, it also allows
for other console sources. If the device tree specifies a console (such as
if U-Boot and Linux share a device tree), then it will be used in addition
to /dev/ttynull. This can result in a non-silent console.
To avoid this, explicitly set ttynull as the console. This will disable
other console sources. If CONFIG_NULL_TTY is disabled, then this will have
the same behavior as in the past (no output, and writing /dev/console
returns ENODEV).
[1] and [2] have additional background on this kernel change.
[1] https://lore.kernel.org/all/20201006025935.GA597@jagdpanzerIV.localdomain/
[2] https://lore.kernel.org/all/20201111135450.11214-1-pmladek@suse.com/
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Add a check for calloc() failing to allocate the requested memory.
Make decode_regions() return an error code.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Asking if the alias we found actually points at the device tree node
we passed in (in the guise of its offset from blob) can be done simply
by asking if the fdt_path_offset() of the alias' path is identical to
offset.
In fact, the current method suffers from the possibility of false
negatives: dtc does not necessarily emit a phandle property for a node
just because it is referenced in /aliases; it only emits a phandle
property for a node if it is referenced in <angle brackets>
somewhere. So if both the node we passed in and the alias node we're
considering don't have phandles, fdt_get_phandle() returns 0 for both.
Since the proper check is so simple, there's no reason to hide that
behind a config option (and if one really wanted that, it should be
called something else because there's no need to involve phandle in
the check).
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Aswath Govindraju <a-govindraju@ti.com>
CONFIG_MMC only initializes drivers for devices in UCLASS_MMC, we need
to initialize drivers for devices of type IF_TYPE_MMC in UCLASS_BLK as
well because they are the child devices of devices in UCLASS_MMC. This
is required for feature RPMB since it will access eMMC in optee-os.
Signed-off-by: Judy Wang <wangjudy@microsoft.com>
[trini: Add my SoB line and adjust Judy's name in git, having emailed
off-list]
Signed-off-by: Tom Rini <trini@konsulko.com>
ARM semihosting provides no provisions for determining if there is
pending input. The only way to determine if there is console input is to
do a read (and block until the user types something). For this reason,
we always return true for tstc (since you will always get input if you
try). However, this behavior can cause problems for code which expects
tstc to eventually be empty. In query_console_serial, there is the
following construct:
/* empty input buffer */
while (tstc())
getchar();
with the current implementation, this effectively turns into an infinite
loop. To avoid this, fake tstc by returning false half of the time. This
is generally OK because the other common construct looks like
do {
if (tstc())
process(getchar());
} while (!timeout());
so it's fine if we only read a new character every other loop. This will
break things like CYGACC_COMM_IF_GETC_TIMEOUT, but that could be
reworked to test on the timeout instead of calling tstc again (and
ymodem over semihosted serial is not that useful in the first place).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Replace in the function of_machine_is_compatible(), the used API
fdt_node_check_compatible() by ofnode_device_is_compatible()
to support a live tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This adds support for signing images in auto-generated FITs. To do this,
we need to add a signature node. The algorithm name property already has
its own option, but we need one for the key name hint. We could have
gone the -G route and added an explicit name for the public key (like
what is done for the private key). However, many places assume the
public key can be constructed from the key dir and hint, and I don't
want to do the refactoring necessary.
As a consequence of this, it is now easier to add public keys to an
existing image without signing something. This could be done all along,
but now you don't have to create an its just to do it. Ideally, we
wouldn't create a FIT at the end. This could be done by calling
fit_image_setup_sig/info.crypto->add_verify_data directly.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Document -G and the secondary image types which can be used with -R.
Also reword the documentation of -s for clarity.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Static events do not currently work post-relocation for boards that enable
CONFIG_NEEDS_MANUAL_RELOC. Relocate event handler pointers for all event
spies to fix this.
Tested on Microblaze.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
The whole event_register() function is wrapped in EVENT_DYNAMIC #ifdef
checks, so the inner check is not needed:
#if CONFIG_IS_ENABLED(EVENT_DYNAMIC)
...
int event_register(...)
{
...
if (!CONFIG_IS_ENABLED(EVENT_DYNAMIC))
return -ENOSYS;
}
#endif
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Set correct type for 3rd argument of ofnode_get_addr_size_index_notrans()
function. It expects fdt_size_t * and not fdt_addr_t *.
When these two types do not have same size then U-Boot throw compile
warning:
drivers/mtd/mtdpart.c: In function ‘add_mtd_partitions_of’:
drivers/mtd/mtdpart.c:906:57: warning: passing argument 3 of ‘ofnode_get_addr_size_index_notrans’ from incompatible pointer type [-Wincompatible-pointer-types]
offset = ofnode_get_addr_size_index_notrans(child, 0, &size);
^~~~~
In file included from include/dm/device.h:13,
from include/linux/mtd/mtd.h:26,
from include/ubi_uboot.h:28,
from drivers/mtd/mtdpart.c:27:
include/dm/ofnode.h:530:25: note: expected ‘fdt_size_t *’ {aka ‘long long unsigned int *’} but argument is of type ‘fdt_addr_t *’ {aka ‘long unsigned int *’}
fdt_size_t *size);
~~~~~~~~~~~~^~~~
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Add a make command to compile binary files as C data through bin2c with
$(call,bin2c,<data_name_prefix>)
Note that this requires BUILD_BIN2C=y.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
Setting sblk = NULL has no effect on the caller.
We want to set *sblk = NULL if an error occurrs to avoid usage after free.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
After returning if ret <= 0 we know that ret > 0. No need to check it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Anand Jain <anand.jain>
While our copy of zlib is missing upstream commit 263b1a05b04e ("Allow
deflatePrime() to insert bits in the middle of a stream.") we do have
Z_FIXED support, and so the majority of the code changes in 5c44459c3b28
("Fix a bug that can crash deflate on some input when using Z_FIXED.")
apply here directly and cleanly. As this has been assigned a CVE, lets
go and apply these changes.
Link: 5c44459c3b
Reported-by: "Gan, Yau Wai" <yau.wai.gan@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
We have many cases of SPL (or TPL or VPL) drivers that don't depend on
SPL_MISC (and so on) but rather just MISC.
Cc: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
The actual support was added in commit fec8c900c8b2 ("power: regulator:
Add support for regulator-force-boot-off"), update the docs to include
this.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Migrate dm command to use U_BOOT_CMD_WITH_SUBCMDS() helper macro, to reduce
duplicated code. We can also drop the CONFIG_NEEDS_MANUAL_RELOC exception,
as the command list is updated post relocation in board_r.c initcall
initr_manual_reloc_cmdtable().
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
CONFIG_DM_EVENT without CONFIG_EVENT is non-functional.
Let CONFIG_DM_EVENT depend on CONFIG_EVENT.
Remove superfluous stub in include/event.h.
Fixes: 5b896ed5856f ("event: Add events for device probe/remove")
Reported-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
- Bring in a number of series of patches that migrate all remaining
CONFIG_SPL symbols to Kconfig, remove some dead code that this
uncovered and then start to tighten the dependencies in Kconfig now
that everything is migrated and these relationships can be clearly
expressed.
- In a few places, add missing "depends on" that can be implied from the
option name (i.e. SPL_DM_xxx depends on SPL_DM).
- Make less use of "if SPL_xxx ... endif" clauses as most of the time
this reads better as depends on. In the case of UBI however, move it
all to a sub-menu.
- Rework SPL_NO_CPU_SUPPORT as it's very specific to the
non-SPL_FRAMEWORK implementation used on those platforms, and a
tangent to how CONFIG_SPL_START_S_PATH was used.
Signed-off-by: Tom Rini <trini@konsulko.com>
- Move all PowerPC (and some shared with Layerscape) options to
common/spl/Kconfig.nxp
- Move all other TPL related options to common/spl/Kconfig.tpl
- Move all VPL related options to common/spl/Kconfig.vpl
This makes the whole of common/spl/Kconfig slightly more readable.
Signed-off-by: Tom Rini <trini@konsulko.com>
CONFIG_SPL_BOOT_DEVICE was made obsolete by
CONFIG_MVEBU_SPL_BOOT_DEVICE_{SPI,MMC,SATA,UART}.
CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI is the default so existing users of
CONFIG_SPL_BOOT_DEVICE can simply have the option removed.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
CONFIG_FIXED_SDHCI_ALIGNED_BUFFER is needed on some Marvell SoCs when
booting from MMC. All existing usages of this have the same value so
make this the default and have the Kconfig option depend on SPL &&
MVEBU_SPL_BOOT_DEVICE_MMC.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Update the way KWB_CFG_SEC_BOOT_DEV is determined to use
CONFIG_MVEBU_SPL_BOOT_DEVICE_{SPI,MMC} instead of
CONFIG_SPL_BOOT_DEVICE.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Looking at the git history and values used for the raw kernel/args
location, it's clear these platforms only ever did Falcon Mode via
filesystem images and not raw MMC/SD locations. Disable
CONFIG_SPL_FALCON_BOOT_MMCSD.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
Signed-off-by: Tom Rini <trini@konsulko.com>
In some cases, when we don't use CONFIG_SPL_FRAMEWORK nor are we on
PowerPC using their specific SPL/TPL framework, we need to specify the
start.S file to use for these typically very constrained systems. Do
this within the Makefile logic, rather than introducing a string-based
CONFIG option, as this would get slightly complex to do in Kconfig for a
very limited number of users.
Signed-off-by: Tom Rini <trini@konsulko.com>
The address where the device tree will be passed in to U-Boot at is now
moved to the Kconfig file. If this is user configurable, it needs to be
exposed rather than hidden, and should probably be renamed as well.
Reviewed-by: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_SPL_ARGS_ADDR
In doing so, we also consistently use this variable for SPL_OS_BOOT and
not CONFIG_SYS_FDT_BASE in some cases.
Signed-off-by: Tom Rini <trini@konsulko.com>
This is mostly unused. In the case where it is currently used, it means
the same as CONFIG_SPL_PAD_TO, which is already set for the platform.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_SPL_MALLOC_SIZE
CONFIG_SYS_SPL_MALLOC_START
We introduce a default value here as well, and CONFIG_SYS_SPL_MALLOC to
control if we have a malloc pool or not.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SPL_RELOC_TEXT_BASE
CONFIG_SPL_RELOC_STACK
CONFIG_SPL_RELOC_MALLOC_ADDR
CONFIG_SPL_RELOC_MALLOC_SIZE
Signed-off-by: Tom Rini <trini@konsulko.com>
Update the Kconfig entry to have the correct defaults for i.MX7
platforms, and move the existing large comment from imx7_spl.h to
doc/imx/common/imx7.txt so that it's not lost.
Signed-off-by: Tom Rini <trini@konsulko.com>
Update the Kconfig entry to have the correct defaults for i.MX6
platforms, and move the existing large comment from imx6_spl.h to
doc/imx/common/imx6.txt so that it's not lost.
Signed-off-by: Tom Rini <trini@konsulko.com>
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR
- Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack
pointer directly, otherwise we use the common calculation.
- On some platforms that were using the standard calculation but did not
set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them.
- On a small number of platforms that were not subtracting
GENERATED_GBL_DATA_SIZE do so now via the standard calculation.
- CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most
board config header files.
Signed-off-by: Tom Rini <trini@konsulko.com>
We have a number of CONFIG symbols today that are of the form:
SYM1 = CONST1 + CONST2
or other static math operations (shifts, etc). The issue is that by
moving these to Kconfig we no longer have the ability to calculate these
values, so they become less flexible and useful. It's also the case
that sometimes a platform will just define SYM1 directly or perform a
slightly different set of calculations. We introduce this header now to
have a place to start to handle these cases.
Signed-off-by: Tom Rini <trini@konsulko.com>
We have GENERATED_GBL_DATA_SIZE to tell us how large the generated
global data is, so do not use a hard-coded value of 1024 for it.
Signed-off-by: Tom Rini <trini@konsulko.com>
In the places where PowerPC references CONFIG_SYS_GBL_DATA_OFFSET it
does so as (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET). And
it defines CONFIG_SYS_GBL_DATA_OFFSET in the same manner that other
architectures define CONFIG_SYS_INIT_SP_OFFSET. Other architectures
define CONFIG_SYS_INIT_SP_ADDR as (CONFIG_SYS_INIT_RAM_ADDR +
CONFIG_SYS_INIT_SP_OFFSET) typically. Rename things within PowerPC for
consistency with other architectures.
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently, since we know that in the combination of
CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET all of the "high"
bits are in CONFIG_SYS_INIT_RAM_ADDR and "low" bits are in
CONFIG_SYS_GBL_DATA_OFFSET we reference this separately in start.S, but
added together everywhere else. For clarity consistency, reference the
combined value here instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
This value is only referenced by PowerPC code in a way other than
directly as CONFIG_SYS_INIT_SP_ADDR. Switch to CONFIG_SYS_INIT_SP_ADDR
directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
This value is only referenced by PowerPC code in a way other than
directly as CONFIG_SYS_INIT_SP_ADDR. Switch to CONFIG_SYS_INIT_SP_ADDR
directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
In some cases, we define CONFIG_SYS_INIT_SP_ADDR differently for SPL or
full U-Boot. This case should be making use of CONFIG_SPL_STACK, as
that's what that variable is for. In a few other cases we define
CONFIG_SPL_STACK directly to CONFIG_SYS_INIT_SP_ADDR, but do not need to
as the code handles this correctly, normally.
Signed-off-by: Tom Rini <trini@konsulko.com>
The definition of CONFIG_SPL_BOOTROM_SAVE is always a fixed
CONFIG_SPL_STACK + 4, while CONFIG_SPL_STACK is not constant. This
change will make it clear where the location is still, once
CONFIG_SPL_STACK moves to Kconfig.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
A number of PowerPC platforms define this, for SPL. To move this to
Kconfig, it needs to be CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE, so use
CONFIG_IS_ENABLED() to check for usage. A number of layerscape
platforms bring this logic from PowerPC, but only need a small part of
it, for the fman driver. Remove their unused portion at least.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SPL_SYS_MALLOC_SIMPLE
The problem here is that a few platforms have been doing:
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_MALLOC_SIMPLE
#endif
instead of defining CONFIG_SPL_SYS_MALLOC_SIMPLE directly. Correct this
and update the documentation in a few places to match usage.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SPL_BSS_MAX_SIZE
CONFIG_SPL_MAX_FOOTPRINT
Note that the da850evm platforms were violating the "only use one" rule
here, and so now hard-code their BSS limit.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SPL_PAD_TO
CONFIG_SPL_MAX_SIZE
CONFIG_TPL_PAD_TO
CONFIG_TPL_MAX_SIZE
Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the
existing places.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SPL_FS_LOAD_ARGS_NAME
CONFIG_SPL_FS_LOAD_KERNEL_NAME
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SPL_INIT_MINIMAL
CONFIG_SPL_FLUSH_IMAGE
CONFIG_SPL_SKIP_RELOCATE
Signed-off-by: Tom Rini <trini@konsulko.com>
This is only referenced in non-SPL_DM cases, of which there are
currently none. Remove this option and slightly re-organize the code is
there is now never an if/else at the start of spl_sata_load_image()
Signed-off-by: Tom Rini <trini@konsulko.com>
This is always defined to 2, and referenced in two places. Move the
define to <asm/omap_common.h> and make sure the code that uses this
includes that file. Make <asm/arch-omap*/clock.h> not include that
file, as we don't need to be doing so.
Signed-off-by: Tom Rini <trini@konsulko.com>
Two defconfigs were missed when transitioning the SYS_FMAN_FW_ADDR
symbol to Kconfig. CONFIG_SYS_FMAN_FW_ADDR is currently initialized to
0 by default on these builds, which prevents the firmware from loading.
Add the correct symbols to these defconfigs.
Fixes: a97a071d10d2b ("configs: fsl: migrate FMAN/QE specific defines to Kconfig")
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
UEFI:
* Fix the implementation of the firmware management protocol
* Fix the unit tests for signed update capsules
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Merge tag 'efi-2022-07-rc4-4' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc4-4
UEFI:
* Fix the implementation of the firmware management protocol
* Fix the unit tests for signed update capsules
Add support for the authentication of UEFI capsules containing FIT images.
The authentication code is moved out of the function handling raw images
into a new function efi_firmware_capsule_authenticate(). The special case
for the FMP header coming from edk2 tools is preserved. There is no
functional change for capsules containing raw images.
The python test for signed capsules with raw images is renamed with no
functional change and a new test is added for signed capsules containing
FIT images.
This can be tested with sandbox64_defconfig or sandbox_flattree_defconfig,
plus CONFIG_EFI_CAPSULE_AUTHENTICATE=y.
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Repair the python tests for authenticated EFI capsules, which can be run
with sandbox_defconfig plus CONFIG_EFI_CAPSULE_AUTHENTICATE=y.
- Account for the reset changes done by commit 3e6f81000672 ("efi_loader:
test/py: Reset system after capsule update on disk").
- Fix the capsule GUID typo introduced by commit 2e9c3c6965ba ("test:
capsule: Modify the capsule tests to use GUID values for sandbox").
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
The OsIndications is a 64 bit variable, and the current code expects
the value of the variable to be 64 bit. Update the documentation to
reflect this fact.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The GetImageInfo function of the Firmware Mangement Protocol(FMP) gets
called initially to query the size of the image descriptor array that
would have to be allocated. During this call, the rest of the function
arguments, specifically pointers might be passed as NULL. Do not
populate the descriptor_count value before it is known that the call
to GetImageInfo has been made with the allocated buffer for the image
descriptors.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
"valu" should be "value".
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since the power domain driver default select CONFIG_CLK, so we will
meet lots failures without CLK_IMX8MQ, so default select it.
Fixes: commit 4eb82c2e56a7c ("imx: power-domain: Get rid of SMCCC dependency")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add a new device tree property "u-boot,version" in the chosen node to
pass the U-Boot version to the operating system.
This can be useful to implement a firmware upgrade procedure from the
operating system.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nicolas Bidron and Nicolas Guigo reported the two bugs below:
"
----------BUG 1----------
In compiled versions of U-Boot that define CONFIG_IP_DEFRAG, a value of
`ip->ip_len` (IP packet header's Total Length) higher than `IP_HDR_SIZE`
and strictly lower than `IP_HDR_SIZE+8` will lead to a value for `len`
comprised between `0` and `7`. This will ultimately result in a
truncated division by `8` resulting value of `0` forcing the hole
metadata and fragment to point to the same location. The subsequent
memcopy will overwrite the hole metadata with the fragment data. Through
a second fragment, this can be exploited to write to an arbitrary offset
controlled by that overwritten hole metadata value.
This bug is only exploitable locally as it requires crafting two packets
the first of which would most likely be dropped through routing due to
its unexpectedly low Total Length. However, this bug can potentially be
exploited to root linux based embedded devices locally.
```C
static struct ip_udp_hdr *__net_defragment(struct ip_udp_hdr *ip, int *lenp)
{
static uchar pkt_buff[IP_PKTSIZE] __aligned(PKTALIGN);
static u16 first_hole, total_len;
struct hole *payload, *thisfrag, *h, *newh;
struct ip_udp_hdr *localip = (struct ip_udp_hdr *)pkt_buff;
uchar *indata = (uchar *)ip;
int offset8, start, len, done = 0;
u16 ip_off = ntohs(ip->ip_off);
/* payload starts after IP header, this fragment is in there */
payload = (struct hole *)(pkt_buff + IP_HDR_SIZE);
offset8 = (ip_off & IP_OFFS);
thisfrag = payload + offset8;
start = offset8 * 8;
len = ntohs(ip->ip_len) - IP_HDR_SIZE;
```
The last line of the previous excerpt from `u-boot/net/net.c` shows how
the attacker can control the value of `len` to be strictly lower than
`8` by issuing a packet with `ip_len` between `21` and `27`
(`IP_HDR_SIZE` has a value of `20`).
Also note that `offset8` here is `0` which leads to `thisfrag = payload`.
```C
} else if (h >= thisfrag) {
/* overlaps with initial part of the hole: move this hole */
newh = thisfrag + (len / 8);
*newh = *h;
h = newh;
if (h->next_hole)
payload[h->next_hole].prev_hole = (h - payload);
if (h->prev_hole)
payload[h->prev_hole].next_hole = (h - payload);
else
first_hole = (h - payload);
} else {
```
Lower down the same function, execution reaches the above code path.
Here, `len / 8` evaluates to `0` leading to `newh = thisfrag`. Also note
that `first_hole` here is `0` since `h` and `payload` point to the same
location.
```C
/* finally copy this fragment and possibly return whole packet */
memcpy((uchar *)thisfrag, indata + IP_HDR_SIZE, len);
```
Finally, in the above excerpt the `memcpy` overwrites the hole metadata
since `thisfrag` and `h` both point to the same location. The hole
metadata is effectively overwritten with arbitrary data from the
fragmented IP packet data. If `len` was crafted to be `6`, `last_byte`,
`next_hole`, and `prev_hole` of the `first_hole` can be controlled by
the attacker.
Finally the arbitrary offset write occurs through a second fragment that
only needs to be crafted to write data in the hole pointed to by the
previously controlled hole metadata (`next_hole`) from the first packet.
### Recommendation
Handle cases where `len` is strictly lower than 8 by preventing the
overwrite of the hole metadata during the memcpy of the fragment. This
could be achieved by either:
* Moving the location where the hole metadata is stored when `len` is
lower than `8`.
* Or outright rejecting fragmented IP datagram with a Total Length
(`ip_len`) lower than 28 bytes which is the minimum valid fragmented IP
datagram size (as defined as the minimum fragment of 8 octets in the IP
Specification Document:
[RFC791](https://datatracker.ietf.org/doc/html/rfc791) page 25).
----------BUG 2----------
In compiled versions of U-Boot that define CONFIG_IP_DEFRAG, a value of
`ip->ip_len` (IP packet header's Total Length) lower than `IP_HDR_SIZE`
will lead to a negative value for `len` which will ultimately result in
a buffer overflow during the subsequent `memcpy` that uses `len` as it's
`count` parameter.
This bug is only exploitable on local ethernet as it requires crafting
an invalid packet to include an unexpected `ip_len` value in the IP UDP
header that's lower than the minimum accepted Total Length of a packet
(21 as defined in the IP Specification Document:
[RFC791](https://datatracker.ietf.org/doc/html/rfc791)). Such packet
would in all likelihood be dropped while being routed to its final
destination through most routing equipment and as such requires the
attacker to be in a local position in order to be exploited.
```C
static struct ip_udp_hdr *__net_defragment(struct ip_udp_hdr *ip, int *lenp)
{
static uchar pkt_buff[IP_PKTSIZE] __aligned(PKTALIGN);
static u16 first_hole, total_len;
struct hole *payload, *thisfrag, *h, *newh;
struct ip_udp_hdr *localip = (struct ip_udp_hdr *)pkt_buff;
uchar *indata = (uchar *)ip;
int offset8, start, len, done = 0;
u16 ip_off = ntohs(ip->ip_off);
/* payload starts after IP header, this fragment is in there */
payload = (struct hole *)(pkt_buff + IP_HDR_SIZE);
offset8 = (ip_off & IP_OFFS);
thisfrag = payload + offset8;
start = offset8 * 8;
len = ntohs(ip->ip_len) - IP_HDR_SIZE;
```
The last line of the previous excerpt from `u-boot/net/net.c` shows
where the underflow to a negative `len` value occurs if `ip_len` is set
to a value strictly lower than 20 (`IP_HDR_SIZE` being 20). Also note
that in the above excerpt the `pkt_buff` buffer has a size of
`CONFIG_NET_MAXDEFRAG` which defaults to 16 KB but can range from 1KB to
64 KB depending on configurations.
```C
/* finally copy this fragment and possibly return whole packet */
memcpy((uchar *)thisfrag, indata + IP_HDR_SIZE, len);
```
In the above excerpt the `memcpy` overflows the destination by
attempting to make a copy of nearly 4 gigabytes in a buffer that's
designed to hold `CONFIG_NET_MAXDEFRAG` bytes at most which leads to a DoS.
### Recommendation
Stop processing of the packet if `ip_len` is lower than 21 (as defined
by the minimum length of a data carrying datagram in the IP
Specification Document:
[RFC791](https://datatracker.ietf.org/doc/html/rfc791) page 34)."
Add a check for ip_len lesser than 28 and stop processing the packet
in this case.
Such a check covers the two reported bugs.
Reported-by: Nicolas Bidron <nicolas.bidron@nccgroup.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
The AArch64 TCR_ELx register is a 64-bit register, and many newer
architecture features use bits in the upper half. So far U-Boot was
igorant of those bits, trying to leave them alone.
However, in an effort to set bit 31 to 1, it failed doing so, because
the compiler sign-extended "1 << 31", so that all bits[63:31] got set.
Older ARMv8.0 cores don't define anything dangerous up there, but newer
architecture revisions do, and setting all those bits will end badly:
=================
$ qemu-system-aarch64 -cpu max ....
U-Boot 2022.07-rc1 (May 09 2022 - 15:21:00 +0100)
DRAM: 1.5 GiB
================= (hangs here)
Defining TCR_ELx_RSVD to "1U << 31" avoids the sign-extension, so all
upper bits stay at a safe 0 value. This means no more surprises when
U-Boot runs on a more capable CPU core.
Reported-by: Balaji Anandapadmanaban <Balaji.Anandapadmanaban@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Peter Collingbourne <pcc@google.com>
Reviewed-by: Peter Collingbourne <pcc@google.com>
If the device fails to probe - for example, when there is no
ethaddr set - then the private data is automatically freed
but the mdiobus remains registered.
Fixes: 1e354cb39314 ("drivers: net: fsl_enetc: register internal MDIO bus")
Signed-off-by: Michael Walle <michael@walle.cc>
Commit b1a14f8a1c2e ("UBIFS: Change ubifsload to not read beyond the
requested size") added optimization to do not read more bytes than it is
really needed. But this commit introduced incorrect handling of the hole at
the end of file. This logic cause U-Boot to crash or lockup when trying to
read from the ubifs filesystem.
When read_block() call returns -ENOENT error (not an error, but the hole)
then dn-> structure is not filled and contain garbage. So using of dn->size
for memcpy() argument cause that U-Boot tries to copy unspecified amount of
bytes from possible unmapped memory. Which randomly cause lockup of P2020
CPU.
Fix this issue by copying UBIFS_BLOCK_SIZE bytes from read buffer when
dn->size is not available. UBIFS_BLOCK_SIZE is the size of the buffer
itself and read_block() fills buffer by zeros when it returns -ENOENT.
This patch fixes ubifsload on P2020.
Fixes: b1a14f8a1c2e ("UBIFS: Change ubifsload to not read beyond the requested size")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
UEFI:
* fix a problem in loading an image from a short-path
* fix building the bootmenu command for CONFIG_EFI_LOADER=n
* correct the bootefi command syntax
* add firmware management protocol to the documentation
Others:
* bootmenu: fix bootmenu title handling
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Merge tag 'efi-2022-07-rc4-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc4-3
UEFI:
* fix a problem in loading an image from a short-path
* fix building the bootmenu command for CONFIG_EFI_LOADER=n
* correct the bootefi command syntax
* add firmware management protocol to the documentation
Others:
* bootmenu: fix bootmenu title handling
Tested-by: Pali Rohár <pali@kernel.org> [n900, for bootmenu working as before]
The commit a3d0aa87acbe ("bootmenu: update bootmenu_entry structure")
changes the bootmenu title type from char to u16(UTF16 string)
to support EFI based system. If EFI_LOADER is not enabled,
printf("%ls") is not supported, so bootmenu does not appear
correctly.
This commit changes the type of menu title from u16(UTF16) to
utf-8 string and EFI strings is conveted into utf-8.
Fixes: a3d0aa87acbe ("bootmenu: update bootmenu_entry structure")
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Tested-by: Pali Rohar <pali@kernel.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The firmware management protocol can be used to manage device firmware.
U-Boot can be configured to provide an implementation.
Document the related functions in the API section.
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This fixes the following warnings:
./lib/efi_loader/efi_firmware.c:283: warning: Function parameter or member 'package_version' not described in 'efi_firmware_fit_get_image_info'
./lib/efi_loader/efi_firmware.c:283: warning: Function parameter or member 'package_version_name' not described in 'efi_firmware_fit_get_image_info'
./lib/efi_loader/efi_firmware.c:369: warning: bad line: firmware image
./lib/efi_loader/efi_firmware.c:395: warning: Function parameter or member 'package_version' not described in 'efi_firmware_raw_get_image_info'
./lib/efi_loader/efi_firmware.c:395: warning: Function parameter or member 'package_version_name' not described in 'efi_firmware_raw_get_image_info'
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This commit fixes the following compile warnings
for the documentation.
./include/charset.h:276: warning: Function parameter or member 'size' not described in 'u16_strlcat'
./include/charset.h:276: warning: Excess function parameter 'count' description in 'u16_strlcat'
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Booting from a short-form device path which starts with the first element
being a File Path Media Device Path failed because it doesn't contain
any valid device with simple file system protocol and efi_dp_find_obj()
in efi_load_image_from_path() will return NULL.
For instance,
/VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/Scsi(0,0)/\helloworld.efi
-> shortened version: /\helloworld.efi
With this patch applied, all the media devices with simple file system
protocol are enumerated and the boot manager attempts to boot temporarily
generated device paths one-by-one.
This new implementation is still a bit incompatible with the UEFI
specification in terms of:
* not creating real boot options
* not try
"If a device does not support the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL, but
supports the EFI_BLOCK_IO_PROTOCOL protocol, then the EFI Boot Service
ConnectController must be called for this device with DriverImageHandle
and RemainingDevicePath set to NULL and the Recursive flag is set to TRUE."
(See section 3.1.2 "Load Option Processing".)
But it still gives us a closer and better solution than the current.
Fixes: commit 9cdf470274ff ("efi_loader: support booting via short-form device-path")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This helper function will be used to determine if the device is
removable media, initially for handling a short-path loading.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
For indicating the address and size of a memory region other commands use a
<addr>[:<size>] syntax. Do the same for bootefi.
Fixes: 2058983689f0 ("cmd: bootefi: restore ability to boot arbitrary blob")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Changing the console timeout to 500 ms without restoring the original value
leads to failures in other tests. As the console timeout change is not
necessary for the text input protocol tests remove it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The commit 2158b0da220c ("bootmenu: add Kconfig option
not to enter U-Boot console") disables to enter U-Boot
console from bootmenu as default, this change affects the
existing bootmenu users.
This commit reverts the default behavior, the bootmenu can
enter U-Boot console same as before.
CMD_BOOTMENU_ENTER_UBOOT_CONSOLE is renamed
BOOTMENU_DISABLE_UBOOT_CONSOLE and depends on
AUTOBOOT_MENU_SHOW.
Fixes: 2158b0da220c ("bootmenu: add Kconfig option not to enter U-Boot console")
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Tested-by: Pali Rohar <pali@kernel.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This documents some additional options which can be used with valgrind, as
well as directions for future work. It also fixes up inline literals to
actually be inline literals (and not italics). The content of this
documentation is primarily adapted from [1].
[1] https://lore.kernel.org/u-boot/57cb4b49-fa30-1194-9ac3-faa53e8033bd@gmail.com/
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The following Python packages are used by U-Boot, too:
* python3-asteval
* python3-subunit
* python3-testtools
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Image created by LTO is not friendly to debugger, let's document this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Mention CONFIG_CC_OPTIMIZE_FOR_DEBUG and LLDB.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
It should be CONFIG_SANDBOX_RAM_SIZE_MB.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
There are no defined instruction sequences in include/valgrind.h for
Risc-V, so CONFIG_VALGRIND will do nothing on this arch (and possibly won't
compile?). Update Kconfig accordingly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
In the bootmenu unit test the console timeout is set to 500 ms.
Other tests rely on the original timeout. Ensure that the original value
is restored.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
alloc_read_gpt_entries() writes differentiated error messages.
The caller is_gpt_valid() should not write an extra possibly wrong message.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
- Fixes for pytest timeout in CI, missing dependency on PCI for the
e1000 driver, fix for CVE-2022-30767 (NFS), TI K3 AM642 DTS bugfix,
MAINTAINERS updates, mksquashfs version check fix.
This driver depends on PCI. Update the Kconfig accordingly.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Testing with mksquasshfs 4.5.1 results in an error
ValueError: could not convert string to float: '4.5.1'
Version 4.10 would be considered to be lower than 4.4.
Fixes: 04c9813e951f ("test/py: rewrite common tools for SquashFS tests")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since commit dffdb1f8eb ("board: ti: am64x: Use fdt functions
for ram and bank init") ddr_init() and dram_bank_init() have
switched to fdtdec for getting the memory configuration from
the am64xx dts files instead of using hardcoded values. This
requires an accessible memory node in SPL as we already have
in k3-am642-r5-evm.dts.
Make the memory node accessible in A53 SPL for both am642-sk
and am642-evm and in am642-sk R5 SPL.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add the rest of the ASPEED drivers that are in tree. Most are obvious,
except for ftgmac100 which matches the register layout used in the
ASPEED SoC.
I am the Linux maintainer for the ASPEED kernel port, and help maintain
the fork of u-boot used for OpenBMC, so add myself as a reviewer so I
can stay informed about u-boot changes.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
This patch mitigates the vulnerability identified via CVE-2019-14196.
The previous patch was bypassed/ineffective, and now the vulnerability
is identified via CVE-2022-30767. The patch removes the sanity check
introduced to mitigate CVE-2019-14196 since it's ineffective.
filefh3_length is changed to unsigned type integer, preventing negative
numbers from being used during comparison with positive values during
size sanity checks.
Signed-off-by: Andrea zi0Black Cappa <zi0Black@protonmail.com>
Reset the console timeout value as some tests may change its default
value during the execution.
This fixes the random case timeout issue seen in the U-Boot CI.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Set kernel_comp_addr_r and kernel_comp_size for compressed kernel.
Adjust existing addresses for ramdisk, so that kernel_comp_addr_r
comes before the ramdisk image, since the decompressed kernel size
is known to us. This way we can allow big ramdisk image to be loaded.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Set kernel_comp_addr_r and kernel_comp_size for compressed kernel.
Adjust existing addresses for ramdisk, so that kernel_comp_addr_r
comes before the ramdisk image, since the decompressed kernel size
is known to us. This way we can allow big ramdisk image to be loaded.
Update unleashed.rst to remove the manual environment configuration
for compressed kernel boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Move kernel_comp_addr_r to an address that comes before the ramdisk
image, since the decompressed kernel size is known to us. This way
we can allow big ramdisk image to be loaded.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Clean up asm/io.h by
- removing commented code
- removing outdated comments
- removing unused definitions (for mem_isa, mem_pci)
This massively improves the readability of the file.
Suggested by commits:
7ab2e47d27c9 ("arm: Clean up asm/io.h")
909d0399a519 ("ARM: asm/io.h: kill off confusing #ifdef __mem_pci block")
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Commit ba1ed5b022c6 ("Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig") clearly
defined that this option is available for SANDBOX (was also for already
removed NDS32). That's why there is no way how this code can be enabled
with current Kconfig layout for riscv.
Based on this removing this code.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The sbi command displays the ID of the implementation of the RISC-V
Supervisor Binary Interface Specification. A new ID for Coffer has recently
been added.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Disable BINMAN_FDT for ae350 boards which don't actually use it.
Fixes: 836eac7c6fe3 ("fdt: Make OF_BOARD a bool option")
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Enable OF_HAS_PRIOR_STAGE for ae350 boards with OF_BOARD
Fixes: 239d22c79520 ("fdt: Enable OF_HAS_PRIOR_STAGE for most boards with OF_BOARD")
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
zynqmp:
- Fix DP PLL configuration for zcu102/zcu106 and SOM
- Fix split mode for starting R5s
- DT fixes
- Remove firmware node for mini configurations
- Wire TEE for multi DTB fit image
xilinx:
- Handle board_get_usable_ram_top(0) properly
phy:
- Extend psgtr timeout
mmc:
- Fix mini configuration which misses zynqmp_pm_is_function_supported()
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Merge tag 'xilinx-for-v2022.07-rc4' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.07-rc4
zynqmp:
- Fix DP PLL configuration for zcu102/zcu106 and SOM
- Fix split mode for starting R5s
- DT fixes
- Remove firmware node for mini configurations
- Wire TEE for multi DTB fit image
xilinx:
- Handle board_get_usable_ram_top(0) properly
phy:
- Extend psgtr timeout
mmc:
- Fix mini configuration which misses zynqmp_pm_is_function_supported()
The bulk of it is (finally!) some DT sync from the kernel. We refrained
from syncing one incompatible change, as this would spoil booting Linux
kernels before v5.13 with U-Boot's DT (via UEFI, for instance).
I test booted Linux v5.18 and v5.4 with that new DT on some boards, and
the headless peripherals (MMC, USB, Ethernet) seemed to work.
The rest are fixes:
- silencing missing clock warnings due to the new pinctrl driver
- fixing "UART0 on PortF", allowing UART access through the SD card pins
- add an F1C100s clock driver, to enable MMC support (SPI comes later)
- some cleanups for CONS_INDEX_n in Kconfig
Tested on BananaPi-M1, Pine64-LTS, Pine-H64, X96-Mate (H616) and
OrangePi-Zero.
These were only ever implied by sunxi platforms, and that usage has
been removed. Current practice is to specify CONFIG_CONS_INDEX in each
board's defconfig.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
ARCH_SUNXI selects DM_SERIAL, so the condition can never be satisfied.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins
(usually used for the SD card) as UART0. Some SoCs use the mux value of
3 for this, while others use 4.
The combination of Kconfig symbols we currently use was not quite right:
we mis-configure the A31, A64, H6 and H616.
Going through the list in the pinctrl driver, there are only a few older
SoCs that use a value of 4, so revert the #ifdef clause, and name those
explicitly, instead of the other way around.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Some devices enumerate various clocks in their DT, and many drivers
just blanketly try to enable all of them. This creates problems
since we only model a few gate clocks, and the clock driver outputs
a warning when a clock is not described:
=========
sunxi_set_gate: (CLK#3) unhandled
=========
Some clocks don't have an enable bit, or are already enabled in a
different way, so we might want to just ignore them.
Add a CCU_CLK_F_DUMMY_GATE flag that indicates that case, and define
a GATE_DUMMY macro that can be used in the clock description array.
Define a few clocks, used by some pinctrl devices, that way to suppress
the runtime warnings.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
The introduction of the DM pinctrl driver made its probe function enable
all clocks enumerated in the DT. This includes the "CLK_BUS_PIO" (and
variations) gate clock. Also CLK_PLL_PERIPH0 is used by the R_CCU device.
So far we didn't describe those clocks in our clock driver.
As we enable them already in the SPL, the devices happen to work, but
the clock driver still complains about not finding those clocks:
=========
sunxi_set_gate: (CLK#58) unhandled
=========
Add the one-liners that are needed to announce the gate bit for those
clocks, to silence that message on the console.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
H6 is from the sun50i family, not sun6i.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Now that the pinmux conflict is handled in the board code (by skipping
setup for the one conflicting MMC controller), the driver does not need
to be entirely disabled based on the UART pinmux.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently, selecting UART0_PORT_F entirely disables MMC support on sunxi
platforms. But this is a bigger hammer then needed. Muxing UART0 to the
pins on port F only causes a conflict with MMC0, so minimize the impact
by specifically skipping MMC0 init. We can continue to use MMC1/2 if
those are enabled.
Let's also remove the preprocessor check while refacting this function.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Use the de10-nano files as templates for the de10-standard board.
The files in qts directory are generated by quartus from the GHRD
design.
Signed-off-by: Humberto Naves <hsnaves@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
- Fix PowerPC NOR booting, important SPI uclass fixes/updates, gic_v2
fix when CPU is not in EL3, fsl_esdhc_spl fix, and squashfs fix for
linking on some architectures, and fix phy_string_for_interface
commit ffb0f6f488b9 ("treewide: Rename PHY_INTERFACE_MODE_NONE to
PHY_INTERFACE_MODE_NA") broke the phy_string_for_interface function.
Fix it.
Fixes ffb0f6f488b9 ("treewide: Rename PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add the tpm2_tis_i2c driver that should support any TPMv2 compliant
I2C chips, such as the NPCT75X chip.
[Ilias rename priv_auto_alloc_size to priv_auto]
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Commit 0980cbba7b3c ("mmc: fsl_esdhc_spl: pre-PBL: implement redundancy
support") changed number of sectors which are read but did not adjusted
error check.
Fix it and check for if correct number of sectors were read.
Fixes: 0980cbba7b3c ("mmc: fsl_esdhc_spl: pre-PBL: implement redundancy support")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This would prevent configuring non-secure regs in case gic security
extensions are not emulated in Qemu.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
In case _spi_get_bus_and_cs()'s parameters drv_name and dev_name are
respectively set to NULL and 0, use spi_get_bus_and_cs() instead.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: "Pali Rohár" <pali@kernel.org>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Anji J <anji.jagarlmudi@nxp.com>
Cc: Biwen Li <biwen.li@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Now, spi_flash_probe_bus_cs() relies on DT for spi speed and mode
and logically calls spi_get_bus_and_cs(). In case spi mode and speed are
not read from DT, make usage of spi_flash_probe() instead.
To sum-up:
- Previous call tree was:
spi_flash_probe() -> spi_flash_probe_bus_cs() -> spi_get_bus_and_cs()
- Current call tree is:
spi_flash_probe() -> _spi_get_bus_and_cs()
spi_flash_probe_bus_cs() -> spi_get_bus_and_cs()
This patch impacts the following :
- cmd/sf.c: if spi mode and/or speed is passed in argument of
do_spi_flash_probe(), call spi_flash_probe() otherwise call
spi_flash_probe_bus_cs().
- drivers/net/fm/fm.c: as by default spi speed and mode was set to
0 and a comment indicates that speed and mode are read from DT,
use spi_flash_probe_bus_cs().
- drivers/net/pfe_eth/pfe_firmware.c: spi speed and mode are not read
from DT by all platforms using this driver, so keep legacy and replace
spi_flash_probe_bus_cs() by spi_flash_probe();
- drivers/net/sni_netsec.c : spi speed and mode are not read from DT,
so replace spi_flash_probe_bus_cs() by spi_flash_probe().
- drivers/usb/gadget/max3420_udc.c: Can't find any platform which make
usage of this driver, nevertheless, keep legacy and replace
spi_get_bus_and_cs() by _spi_get_bus_and_cs().
- env/sf.c: a comment indicates that speed and mode are read
from DT. So use spi_flash_probe_bus_cs().
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: "Pali Rohár" <pali@kernel.org>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Anji J <anji.jagarlmudi@nxp.com>
Cc: Biwen Li <biwen.li@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Move legacy spi_get_bus_and_cs() code to _spi_get_bus_and_cs().
Add new spi_get_bus_and_cs() implementation which rely on DT
for speed and mode and don't need any drv_name nor dev_name
parameters. This will prepare the ground for next patch.
Update all callers to use _spi_get_bus_and_cs() to keep the
same behavior.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: "Pali Rohár" <pali@kernel.org>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Anji J <anji.jagarlmudi@nxp.com>
Cc: Biwen Li <biwen.li@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
mpc85xx NOR binary contains also reset vector and therefore option
CONFIG_MPC85XX_HAVE_RESET_VECTOR must be defined.
When build system uses binman, it takes care of constructing final image
which consist of u-boot-without-reset-vector, DTB and reset-vector.
CONFIG_OF_EMBED does not use binman, there is no external DTB and Makefile
produce directly final u-boot.bin binary.
So in this case mpc85xx reset vector must not be stripped from the final
u-boot.bin binary. Fix it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Commit e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support")
fixed SD card booting on mpc85xx boards but broke NOR booting on these
boards. Reason is that U-Boot build system for NOR images uses binman and
this binman ignores alignment defined in linker script. Instead it has own
config file where is alignment defined.
Fix binman alignment for mpc85xx boards to match what is _now_ defined in
linker script.
This change fixes building of U-Boot for NOR booting on P2020 board.
Fixes: e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support")
Signed-off-by: Pali Rohár <pali@kernel.org>
When compling for x86:
ld.bfd: fs/squashfs/sqfs.o: in function `sqfs_read':
u-boot/fs/squashfs/sqfs.c:1443: undefined reference to `__udivmoddi4'
ld.bfd: u-boot/fs/squashfs/sqfs.c:1521: undefined reference to `__udivmoddi4'
Signed-off-by: Sean Nyekjaer <sean.nyekjaer.ext@siemensgamesa.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Requesting the locality uses the timeout values, so they need
to be set beforehand.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board.
Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD,
SPI NOR and USB 3.0 host.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Add support for reading GPIO pin value when function is output.
With this patch applied, gpio toggle command is working.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Convert the board to DM I2C and DM RTC. This leads to removal of board
side iomuxc configuration, which is now done using pin control driver,
and conversion of board side legacy I2C accessors to DM ones.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
USB controller for AXG is described as meson-axg-usb-ctrl,
see arch/arm/dts/meson-axg.dtsi
Look for that name instead of meson-gxl-usb-ctrl.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220509113618.2891126-1-saproj@gmail.com
The original Allwinner F1C100 .dtsi imported from the Linux kernel tree
used the wrong compatible string for the watchdog timer, so the Allwinner
DM reset driver was not working properly. We worked around this by
disabling the SYSRESET driver, so the hardcoded SPL reset driver took
over.
Now the issue was fixed in the DTs in mainline Linux, and we synced the
fixed .dtsi file into U-Boot, so drop the hack and use the normal U-Boot
proper reset infrastructure.
This reverts commit cfcf1952c11e6ffcbbf88eb63c49edca2acf1d5e.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The initial U-Boot F1C100s port was based on the mainline kernel DT
files, which were quite basic and were missing the essential MMC and
SPI peripherals. While we could work around this in the SPL by
hardcoding the required information, this left U-Boot proper without SD
card or SPI flash support, so actual loading would require FEL boot.
Now the missing DT bits have been submitted and accepted in the kernel
tree, so lets sync back those files into U-Boot to enable MMC and
SPI, plus benefit from some fixes.
This is a verbatim copy of the .dts and .dtsi file from
linux-sunxi/dt-for-5.19[1], which have been part of linux-next for a
while as well.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/log/?h=sunxi/dt-for-5.19
Link: https://lore.kernel.org/linux-arm-kernel/20220317162349.739636-1-andre.przywara@arm.com/
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The f1c100s has a clock tree similar to those of other sunxi parts.
Add support for it.
Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
Signed-off-by: Yifan Gu <me@yifangu.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
[Andre: add PIO and I2C]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Copy the devicetree source for the H6 SoC and all existing boards
from the Linux v5.18-rc1 tag.
To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.
This commit also adds the following new board devicetrees:
- sun50i-h6-pine-h64-model-b.dts
- sun50i-h6-tanix-tx6-mini.dts
This update should not impact any existing U-Boot functionality.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the A64 SoC and all existing boards
from the Linux v5.18-rc1 tag.
To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.
This update should not impact any existing U-Boot functionality.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree for the R40/T3 SoC verbatim from the Linux v5.18-rc1
tag. None of the existing boards had any devicetree updates.
This commit adds the following new board devicetrees:
- sun8i-r40-oka40i-c.dts
- sun8i-t3-cqa3t-bv3.dts
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the V3(s)/S3 SoCs and all existing boards
verbatim from the Linux v5.18-rc1 tag.
This commit also adds the following new board devicetrees:
- sun8i-s3-elimo-initium.dts
- sun8i-v3-sl631-imx179.dts
This update should not impact any existing U-Boot functionality.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the H2+/H3/H5 SoCs and all existing
boards from the Linux v5.18-rc1 tag.
To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.
This commit also adds the following new board devicetree:
- sun8i-h3-nanopi-r1.dts
This update should not impact any existing U-Boot functionality.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the A83T SoC and all existing boards
from the Linux v5.18-rc1 tag.
To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.
As with the other SoCs, updates of note include adding detection GPIO
properties in the USB PHY nodes.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the A80 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.
This update should not impact any existing U-Boot functionality.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the A10s/A13/GR8, A31(s), and A23/A33/R16
SoCs and all existing boards from the Linux v5.18-rc1 tag.
These changes are combined into one commit due to interdependencies:
- The unit addresses were removed from bitbanged I2C buses, which
drives a Kconfig default change. This affects sun5i-a13-utoo-p66.dts
and sun6i-a31-colombus.dts.
- The pinctrl nodes were renamed, including some used by the shared
header sunxi-reference-design-tablet.dtsi.
To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.
This commit renames the file sun8i-r16-nintendo-nes-classic-edition.dts
to sun8i-r16-nintendo-nes-classic.dts to match the Linux tree.
This commit also adds the following new board devicetrees:
- sun5i-a13-licheepi-one.dts
- sun5i-a13-pocketbook-touch-lux-3.dts
- sun5i-gr8-evb.dts
- sun8i-a23-ippo-q8h-v1.2.dts
- sun8i-a23-ippo-q8h-v5.dts
- sun8i-a33-et-q8-v1.6.dts
- sun8i-a33-ippo-q8h-v1.2.dts
- sun8i-r16-nintendo-super-nes-classic.dts
As with the other SoCs, updates of note are conversion of GPIO pull-up
from pinconf to GPIO flags and renaming the detection GPIO properties in
the USB PHY nodes.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the A10 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.
This commit also adds the following new board devicetree:
- sun4i-a10-topwise-a721.dts
While this update should not impact any existing U-Boot functionality,
the changes to the USB PHY detection GPIO properties are needed to
convert that driver to use the DM GPIO framework.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the A20 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.
This commit also adds the following new board devicetrees:
- sun7i-a20-haoyu-marsboard.dts
- sun7i-a20-linutronix-testbox-v2.dts
- sun7i-a20-olinuxino-lime-emmc.dts
This update includes changes to the USB PHY detection GPIO properties
which are needed to convert that driver to use the DM GPIO framework.
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fix Mele M5 U-Boot only DT]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Some devicetree updates make use of newly-exposed clocks and resets.
To support that, copy the binding headers from the Linux v5.18-rc1 tag.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Missing nodes may also be signaled via -ENODATA. We need to check for
that to prevent failing in non-usb3 setups.
Furthermore, dev.phy must be NULL'ed in case usb3-phy was not found.
Fixes: 142d50fbce7c ("usb: dwc3: Add support for usb3-phy PHY configuration")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
- stm32mp15: configure Buck3 voltage per PMIC NVM on Avenger96 board
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Merge tag 'u-boot-stm32-20220520' of https://source.denx.de/u-boot/custodians/u-boot-stm
- spi: fix busy bit check in stm32_qspi driver
- stm32mp15: configure Buck3 voltage per PMIC NVM on Avenger96 board
Before this commit device tree selection could rely solely on
differentiating the iMX6 processor variant Q and DL. After adding two new
carrier boards, the DRC02 and the picoITX, the interchangeability of SoMs
makes this approach infeasible.
It is now required to specify the carrier board (dhcom-drc02,
dhcom-picoitx or dhcom-pdk2) at compile time using
CONFIG_DEFAULT_DEVICETREE. The SoM is determined at runtime as before.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Add a u-boot dtsi for configuring the FEC node of the DH DRC02.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Add a u-boot dtsi for configuring the FEC node of the DH picoITX.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Firstly the FEC can now use the regulator reg_eth_vio from
imx6qdl-dhcom-som.dtsi instead of defining its own.
Secondly the &fec node is moved to the more generic SoM device tree
file, because it can be used by multiple boards.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Use phy address from device tree instead of CONFIG_FEC_MXC_PHYADDR from
board header. This is required, because the DH picoITX and DRC02 boards
require different settings than PDK2. The corresponding 'phy-handle'
device tree properties are already there.
I tested this change on picoITX and DRC02, but on PDK2 it is untested.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Migrate DH picoITX device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Migrate DH DRC02 device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
In the DH electronics iMX6 board file fix the outdated eeprom path by
using a DT label instead.
The label has been newly created for all iMX6QDL DHCOM boards.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Add PCA9450 regulator driver. This is complementary driver for the BUCKn
and LDOn regulators provided by the PCA9450 PMIC driver. Currently the
driver permits reading the settngs and configuring the BUCKn and LDOn
regulators.
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The upstream DT regulators node subnodes are named BUCKn and LDOn,
the downstream DT regulators node subnodes are named buckn and ldon,
add the upstream match.
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Move the preloader_console_init() call after spl_early_init() to avoid
board hang in SPL.
While at it remove explicit in-code console/debug UART pinmuxing (uart1
and its pinmuxing are already marked as u-boot,dm-spl via device tree).
Fixes: 4551e1898769 ("configs: verdin-imx8mm: verdin-imx8mp: enable dm serial")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
There is no reason for disabling I-cache and D-cache
in SPL.
Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.
Signed-off-by: Fabio Estevam <festevam@denx.de>
There is no reason for disabling I-cache and D-cache
in SPL.
Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.
Signed-off-by: Fabio Estevam <festevam@denx.de>
There is no reason for disabling I-cache and D-cache
in SPL.
Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
The Bosch ACC (Air Center Control) Board is based on the i.MX6D.
The device tree is copied from Linux, see [1]. The only difference
compared to the Linux DT is the removal of usbphynop properties. They are
defined in the Linux version of imx6qdl.dtsi, but not in the u-boot
version.
[1] Commit 6192cf8ac082 from
git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
Signed-off-by: Philip Oberfichtner <pro@denx.de>
If the fitImage has some bad block in fit image area, the
offset must be recalulcated. This should be done always.
After implementing it in mxs now is possible to call the function
even for that platform.
Cc: Fabio Estevam <festevam@gmail.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The badblock should be skipped properly in reading and writing.
Fix the logic. The bcb struct is written, skipping the bad block,
so we need to read using the same logic. This was tested create
bad block in the area and then flash it and read it back.
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The specific implementation was having bug. Those bugs are since
the beginning of the implementation. Some manufactures can already
experience this bug in their SPL code. This bug can be more visible on
architecture that has complicated boot process like imx8mn. Older
version of uboot can be affected if the bad block
appear in correspoding of the beginning of u-boot image. In order to
adjust the function we scan from the first erase block.
The problematic part of old code was in this part:
while (is_badblock(mtd, offs, 1)) {
page = page + nand_page_per_block;
/* Check i we've reached the end of flash. */
if (page >= mtd->size >> chip->page_shift) {
free(page_buf);
return -ENOMEM;
}
}
Even we fix it adding increment of the offset of one erase block size
, we don't fix the problem, because the first erase block where the
image start is not checked. The code was tested on an imx8mn where
the boot rom api was not able to skip it. This code is used by other
architecures like imx6 and imx8mm
Cc: Han Xu <han.xu@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Move the hook after nand_scan_tail is called. The hook must be replaced
to the mxs specific one but those must to be assignment later in the
probe function.
With this fix markbad is working again. Before this change:
nand markbad 0xDEC00
NXS NAND: Writing OOB isn't supported
NXS NAND: Writing OOB isn't supported
block 0x000dec00 NOT marked as bad! ERROR 0
Cc: Han Xu <han.xu@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
implement get f/w version api.
print ele f/w version in spl.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Pankaj Gupta <pankaj.gupta@nxp.com>
If probing caam_jr returns failure, the variable "dev" will not be
initialized, so we can't use dev->name for the error print.
Otherwise it will cause crash.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Select the CMD_UNZIP option so that the 'gzwrite' command
can be used to flash wic.gz image into the eMMC.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
When the device tree indicates support for role switching through
the "usb-role-switch" property, take the "role-switch-default-mode"
property into account when deciding which role to put the
controller into.
This makes USB devices work on Apple M1 systems where the device
tree may include a "dr_mode" property that is set to "otg", but
where we need to put the controller into "host" mode to see
devices connected to the type-C ports.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
pinctrl_wdog as u-boot,dm-spl already marked in imx8mm-verdin-u-boot.dtsi,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Move some common changes to imx8mq-u-boot.dtsi, so others could reuse it
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable CONFIG_SPL_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
commit 61cf22505339 ("board: gateworks: gw_ventana: use comomn GSC driver")
moved to the common GSC driver and moved remaining board-specific
functions to eeprom.c. The functions in gsc.c are no longer used and it
was removed from the Makefile but the file itself was not removed.
Remove it now.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The MaxLinear GPY111 PHY is being used on some boards due to part
availability. Add support for this PHY which requires a longer reset
post-delay and RGMII delay configuration.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The uart2 and its pinmux are already marked with u-boot,dm-spl but we
need to move the call to preloader_console_init() after spl_early_init()
to avoid a board hang as dm can't be used until after spl_early_init()
due to the uart driver not enabling the uart clock.
Remove the manual config of the UART pinmux now that it is no longer
needed.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus
does not need to be defined in the various board config includes.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The IMX8MP SoC FEC needs to have the FEC_QUIRK_ENET_MAC defined.
Fixes: commit 2395625209cc ("board: gateworks: venice: add imx8mp-venice-gw740x support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The IMX8M based Venice boards all have device-tree fec nodes that
use proper dt with a phy-handle pointing to a phy with reg assigned
to the proper phy address.
There is no need to keep using the CONFIG_FEC_MXC_PHYADDR hack when
a proper dt is used - remove it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
All i.MX8M needs TZASC ID SWAP set and locked, no need the check to
waste cpu cycles.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
To i.MX8, M core stack is pre-coded in source code, so need to get it
before kicking M core. The stack pointer is stored in the first word of
the first PT_LOAD section __isr_vector. So use a num to index the
section loading.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
I was trying to employ lpddr4_mr_read() to something similar to what
the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM
type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c
differs from the private one used by that board in how it extracts the
byte value, and I was only getting zeroes. Adding a bit of debug
printf'ing gives me
tmp = 0x00ffff00
tmp = 0x00070700
tmp = 0x00000000
tmp = 0x00101000
and indeed I was expecting a (combined) value of 0xff070010 (0xff
being Manufacturer ID for Micron). I can't find any documentation that
says how the values are supposed to be read, but clearly the iot-gate
definition is the right one, both for its use case as well as my
imx8mp-based board.
So lift the private definition of lpddr4_mr_read() from the
imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration
in the ddr.h header where e.g. get_trained_CDD() is already declared.
This has only been compile-tested for the imx8mm-cl-iot-gate
board (since I don't have the hardware), but since I've merely moved
its definition of lpddr4_mr_read(), I'd be surprised if it changed
anything for that board.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The I2C2 has SMBus device SMSC USB2514Bi connected to it, the device is
capable of up to 100 kHz operation. Reduce the bus frequency to 100 kHz
to guarantee this I2C device can work correctly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
When trying to boot via USB on i.MX8MN it is necessary to specify
the U-Boot environment location, otherwise the boot process simply
hangs.
Specify the environment location when booting from USB.
Tested on a imx8mn-evk.
Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-By: Tim Harvey <tharvey@gateworks.com>
RNG Hardware error is reported due to incorrect entropy delay
rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Because mxs_nand_spl driver does not support DM, to use the minimum ECC
layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
Waiting for SR_BUSY bit when receiving a new command is not needed.
SR_BUSY bit is already managed in the previous command treatment.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Currently, SR_TCF flag is checked in case there is data, this criteria
is not correct.
SR_TCF flags is set when programmed number of bytes have been transferred
to the memory device ("bytes" comprised command and data send to the
SPI device).
So even if there is no data, we must check SR_TCF flag.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The Avenger96 board comes in multiple regulator configurations.
- rev.100 or rev.200 have Buck3 preconfigured to 3V3 operation on
boot and contains extra Enpirion EP53A8LQI DCDC converter which
supplies the IO. Reduce Buck3 voltage to 2V9 to not waste power.
- rev.200L have Buck3 preconfigured to 1V8 operation and have no
Enpirion EP53A8LQI DCDC anymore, the IO is supplied from Buck3.
Configure the Buck3 voltage on this board per PMIC NVM settings and
update buck3 voltage limits in DT passed to OS before booting OS to
prevent potential hardware damage.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
BTN_MISC looks like the most reasonable option for this button.
Button is used by firmware to indicate (after reset, power up) that user
wants to do firmware upgrade via firmware update utility.
For bootloader or OS is this just user button which is worth to have it
mapped.
Also button can be used as a wakeup source and pressing it for more time
can generate more chars that's why also adding wakeup-source and autorepeat
properties.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Link: https://lore.kernel.org/r/7f6d627473632c3c3036ec9f6aaa36e00f4615e2.1652262769.git.michal.simek@amd.com
SGMII requires phy to be configured. The support for this has been added to
Linux and U-Boot already that's why also describe the phy via DT. Clock is
coming from si5332 chip (output 1) 125MHz which is only one GT line use on
this board.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8ad8d0c2fc9690cc90f95feddf87b0e94a685a43.1652262769.git.michal.simek@amd.com
This reverts commit 50a6bd000f94832658f42fb01b9aaf9e39a52004.
As zynqmp mini emmc does not rely on firmware, remove firmware related
device tree modes from zynqmp mini emmc dts files.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e69b30d82b0307c563fe72630d9172e53964aeda.1652262769.git.michal.simek@amd.com
OPP table name now should start with "opp-table" and OPP entries
shouldn't contain commas and @ signs in accordance to the new schema
requirement.
The same change was done in Linux by commit c6d4a8977598 ("ARM: tegra:
Rename CPU and EMC OPP table device-tree nodes"), commit ffbe853a3f5a
("ARM: dts: sunxi: Fix OPPs node name") or commit b7072cc5704d ("arm64:
dts: qcom: qcs404: Rename CPU and CPR OPP tables").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a1176349448df35127dbac15c1eeb2229505bae7.1652262769.git.michal.simek@amd.com
This patch fixes the DP audio and video PLL configurations for the zynqmp-sm-k26-revA som.
The Linux DP driver expects the DP to be using the following PLL config:
- DP video PLL should use the VPLL (0x0)
- DP audio PLL should use the RPLL (0x3)
- DP system time clock PLL should use RPLL (0x3)
Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.
Register 0xFD1A007C configures the DP system time clock PLL.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fa7e9abc419c9d7648405d1c62367dbe701d09b8.1652709736.git.michal.simek@amd.com
Observing psgtr pll timeouts with some usb hubs and devices behind it.
Increase timeout to 10ms to take care of it.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220510131234.2650-1-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
In all the ZynqMP boards dts files tx-buswidth is by default set to 1. Due
to this the framework only issues 1-1-1 write commands to the GQSPI driver.
But the GQSPI controller is capable of handling 1-4-4 write commands, so
updated the tx-buswidth to 4 in ZynqMP boards dts files. This would enable
the spi-nor framework to issue 1-4-4 write commands instead of 1-1-1. This
will increase the tx data transfer rate, as now the tx data will be
transferred on four lines instead on single line.
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ad61199f55e5e00f29de6206d9d1872a52a7657e.1652193179.git.michal.simek@amd.com
This patch fixes two issues in the set_r5_reset function.
1. When in split mode, the lpd_amba_rst bit should only be set when
both r5 cpu cores are in reset. Otherwise, if one r5 core is still
running, setting the lpd_amba_rst bit will cause an error for the
running core. The set_r5_reset function has been modified to check
if the other r5 core is still running before setting the lpd_amba_rst
bit.
2. The cpu_disable function was always assuming that the r5 cores
are in split mode when resetting either core 4 or 5. This is
incorrect for lockstep functionality. This patch adds a function
check_r5_mode to handle the cpu_disable function correctly for
the r5 cores by checking the mode and handling the reset appropriately.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d99cbd7f2394ac055ef27457298f554ff0747ba7.1651648344.git.michal.simek@amd.com
This patch fixes the DP audio and video PLL configurations for the
zynqmp-zcu102-revA evaluation board.
The Linux DP driver expects the DP to be using the following PLL config:
- DP video PLL should use the VPLL (0x0)
- DP audio PLL should use the RPLL (0x3)
Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b2eb87758e0cd4844e1754da8c58fce58d9cf683.1651740949.git.michal.simek@amd.com
This patch fixes the DP audio and video PLL configurations
for the zynqmp-zcu106-revA evaluation board.
The Linux DP driver expects the DP to be using the following PLL config:
- DP video PLL should use the VPLL (0x0)
- DP audio PLL should use the RPLL (0x3)
Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/62538b4a04dee28a6fc8ac5b85f8c845a5a76aa4.1651740988.git.michal.simek@amd.com
This patch fixes the DP audio and video PLL configurations for the zynqmp-zcu106-rev1.0 evaluation board.
The Linux DP driver expects the DP to be using the following PLL config:
- DP video PLL should use the VPLL (0x0)
- DP audio PLL should use the RPLL (0x3)
Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ae42ad6185418713a473660c8d15903299af7764.1652192319.git.michal.simek@amd.com
Currently, pinctrl drivers only get probed if pinconf is actually being
used, however on SoC-s like Armada 3720 pinctrl driver is a also the GPIO
driver.
So, if the pinctrl driver doesn't get probed GPIO-s won't get registered
and thus they cannot be used.
This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s
and without them being registered networking won't work as it only has
one SFP slot and the TX disable GPIO is on the SB controller.
So, probe the pinctrl drivers using DM_FLAG_PROBE_AFTER_BIND like LED
uclass does.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
uDPU relies on using fixed-phy for the SFP support, and since the
fixed-phy parsing was moved to the generic driver instead of mvneta
networking stopped working on uDPU with:
uDPU>> dhcp
dm_eth_phy_connect failed
This is due to the conversion commit not enabling fixed-phy support
in defconfig like it did for other boards.
Fixes: 77fcf3cf1251 ("net: mvneta: Convert to use PHY_FIXED for fixed-link")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
UART base address is located in internal registers.
Internal registers for 32-bit mvebu boards in SPL are at address 0xd0000000
and in proper U-Boot at address 0xf1000000.
Fix DEBUG_UART_BASE option for all 32-bit mvebu boards.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Internal registers in SPL are at address 0xd0000000 and in proper U-Boot at
address 0xf1000000. UART base address is located in internal registers.
Fix DEBUG_UART_BASE option to correct value for both SPL and proper U-Boot.
This change fixes hangup of proper U-Boot when it is trying to print
something via debug UART.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Use CONFIG_VAL(DEBUG_UART_BASE) instead of CONFIG_DEBUG_UART_BASE, so
proper config value (CONFIG_DEBUG_UART_BASE or CONFIG_SPL_DEBUG_UART_BASE)
is used based on building target.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
TPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for TPL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Stefan Roese <sr@denx.de>
SPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for SPL.
In some cases base address of UART is different in SPL and proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Moving of internal registers from INTREG_BASE_ADDR_REG to SOC_REGS_PHY_BASE
needs to be done very early, prior calling any function which may touch
internal registers, like debug_uart_init().
So do it earlier in arch_very_early_init() instead of arch_cpu_init().
Movement is done in proper U-Boot, not in SPL. SPL may return to bootrom
and bootrom requires internal registers at (old) expected location.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
When this option is set then ARM _main() function would call
arch_very_early_init() function at the beginning. It would be before
calling any other functions like debug_uart_init() and also before
initializing C runtime environment.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Nothing selects ARMADA_64BIT. Instead the 64-bit SoCs just select ARM64
directly. Remove the unused config item.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
CONFIG_MVEBU_NAND_BOOT, CONFIG_MVEBU_SPI_BOOT, CONFIG_MVEBU_MMC_BOOT and
CONFIG_MVEBU_UBOOT_DFLT_NAME are unused when CONFIG_CMD_MVEBU_BUBT is not
enabled. So hide them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
zynqmp_pm_is_function_supported() which checks feature support on som,
which is implemented in firmware_zynqmp.c driver. As mini configuration
does not use firmware driver, so create a weak function to avoid
compilation error on zynqmp mini configuration.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/c60655a509956b8fc3a81671a7dc51157f3973db.1651048030.git.michal.simek@xilinx.com
This reverts commit 122ca834f2f4a9d70abeece3d1ff200a3556ab24.
Disable CONFIG_ZYNQMP_FIRMWARE config from zynqmp & versal mini emmc
defconfig files, as mini emmc does not use any firmware.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f73a50980d3af894f1e86cfc98742dbdec573760.1651048242.git.michal.simek@xilinx.com
board_get_usable_ram_top() was designed for getting the top most location
for U-Boot allocation that's why function itself supports via total_size
parameter to find out where the right location for U-Boot is.
But function itself is also reused by different (EFI) which is passing
total_size as 0 to find out where the usable ram top is. For this case
doesn't make sense (a waste time) to call any lmb functions.
That's why simply return gd->ram_top.
And gd->ram_top is filled already based on previous call for U-Boot iself.
The same solution is also used by stm32mp by commit 92b611e8b003 ("stm32mp:
correctly handle board_get_usable_ram_top(0)") and commit c8510e397fad
("stm32mp: Fix board_get_usable_ram_top()").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/44470619e74f3e480b70deac24578e3e0d5c907e.1651225945.git.michal.simek@amd.com
- Migrate CONFIG_MTD_CONCAT to Kconfig, use CONFIG_VAL/IS_ENABLED in
more places, rename SPL_LEGACY_IMAGE_SUPPORT to
SPL_LEGACY_IMAGE_FORMAT and update some related dependencies for TI
platforms.
Update the diagnostic message with revised location of document, which
changed in 3e9fddfc4f1 ("doc: Move devicetree control doc to rST")
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Drop CONFIG_NEEDS_MANUAL_RELOC ifdefs in board_init_r() and use
IS_ENABLED() instead. Also, use the MANUAL_RELOC() macro to update the
initcall pointers.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
This converts the following to Kconfig:
CONFIG_MTD_CONCAT
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
There is currently no support for PRE_CONSOLE_BUFFER in SPL, but if
and when that gets implemented, one would almost certainly want to use
a different address and/or size for the buffer (e.g., U-Boot proper
might specify an address in DRAM and a generous buffer, while SPL
would be much more constrained).
So a prerequisite for adding SPL_PRE_CONSOLE_BUFFER is to make the
code use SPL_-specific values. No functional change.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
TI secure devices chain-of-trust depends on FIT image processing,
enable it by default on these devices. This also reduces the delta
between the secure and non-secure defconfig files.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Non-FIT image loading support should be disabled for TI secure
devices as the image handlers for those image types do not follow
our secure boot checks.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Booting of non-FIT images bypass our chain-of-trust boot flow,
these options should not be allowed when high security is set.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This matches what this support is called in the non-SPL case. The postfix
_SUPPORT is redundant as enabling Kconfig options implies support.
With this we can use CONFIG_IS_ENABLED() as needed.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
STM32 programmer improvements
video: support several LTDC HW versions and fix data enable polarity
board: fix stboard error message, consider USB cable connected when boot device is USB
configs: stm32mp1: set console variable for extlinux.conf
configs: stm32mp1: add support for baudrate higher than 115200 for ST-Link
ARM: stm32mp: Fix Silicon version handling and ft_system_setup()
phy: stm32-usbphyc: Add DT phy tuning support
arm: dts: stm32mp15: alignment with v5.18
ram: Conditionally enable ASR
mach-stm32mp: psci: retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend
configs: Use TFTP_TSIZE on DHSOM and STMicroelectronics boards
ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM
pinctrl: stm32: rework GPIO holes management
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Merge tag 'u-boot-stm32-20220510' of https://source.denx.de/u-boot/custodians/u-boot-stm
Add new STM32 MCU boards and Documentation
STM32 programmer improvements
video: support several LTDC HW versions and fix data enable polarity
board: fix stboard error message, consider USB cable connected when boot device is USB
configs: stm32mp1: set console variable for extlinux.conf
configs: stm32mp1: add support for baudrate higher than 115200 for ST-Link
ARM: stm32mp: Fix Silicon version handling and ft_system_setup()
phy: stm32-usbphyc: Add DT phy tuning support
arm: dts: stm32mp15: alignment with v5.18
ram: Conditionally enable ASR
mach-stm32mp: psci: retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend
configs: Use TFTP_TSIZE on DHSOM and STMicroelectronics boards
ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM
pinctrl: stm32: rework GPIO holes management
We should only build support for misc if the appropriate SPL/TPL symbol
is defined. To ease the transition, make SPL/TPL_MISC default to MISC.
This is necessary because many drivers don't specify their dependencies
properly. These defaults can be removed once all drivers depend on the
appropriate config.
Fixes: aaba703fd0 ("spl: misc: Allow misc drivers in SPL and TPL")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add VPL_MISC symbol, handle like SPL/TPL_MISC]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add stm32746g-eval_defconfig for stm32746g evaluation board to
build U-Boot proper.
Full board description can be found here :
https://www.st.com/en/evaluation-tools/stm32746g-eval.html
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
As stm32f46-disco, stm32f769-disco and stm32746g-eval are very similar
except their respective device tree file. These 3 boards uses the same
TARGET_STM32F746_DISCO flag (so same include/configs/stm32f746-disco.h
and same board file board/st/stm32f746-disco/stm32f746-disco.c)
To be able to compile these 3 boards, replace the hard-coded device-tree
name in include/configs/stm32f746-disco.h by CONFIG_DEFAULT_DEVICE_TREE
which is set in each board defconfig file with the correct value.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Replace CONFIG_SUPPORT_SPL by CONFIG_SPL_BUILD to allow
dram_init() execution when using none SPL defconfig
(stm32f746-disco_defconfig).
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The current stm32f769-disco_defconfig file supports SPL, rename it to
stm32f769-disco_spl_defconfig to reflect the supported configuration.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The current stm32f746-disco_defconfig file supports SPL, rename it to
stm32f746-disco_spl_defconfig to reflect the supported configuration.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This allows to concatenate spl and u-boot binaries together.
Previously, both binaries has to be flashed separately at the correct
offset (spl at offset 0 and u-boot at offset 0x8000).
With this patch, only one binary is generated (u-boot-with-spl.bin)
and has to be copied in flash at offset 0 using openocd for example
or simply copied in exported mass storage.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Always consider USB cable is connected when USB boot device is detected.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add support of phy-tuning properties for sm32-usbphyc's phy tuning
aligned with v5.15 kernel bindings.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
On some STM32 SoC's package, GPIO bank may have hole in their GPIO bank
Example:
If GPIO bank have 16 GPIO pins [0-15].
In particular SoC's package case, some GPIO bank can have less GPIO pins:
- [0-10] => 11 pins;
- [2-7] => 6 pins.
Commit dbf928dd2634 ("gpio: stm32f7: Add gpio bank holes management")
proposed a first implementation by not counting GPIO "inside" hole. GPIO
are not displaying correctly using gpio or pinmux command when GPIO holes
are located at the beginning of GPIO bank.
To simplify, consider that all GPIO have 16 GPIO and use the gpio_ranges
struct to indicate if a GPIO is mapped or not. GPIO uclass offers several
GPIO functions ("input", "output", "unused", "unknown" and "func"), use
"unknown" GPIO function to indicate that a GPIO is not mapped.
stm32_offset_to_index() is no more needed and removed.
This must be reflected using the "gpio" command to indicate to user
that a particular GPIO is not mapped (marked as "unknown") as shown below:
Example for a 16 pins GPIO bank with the [2-7] mapping (only 6 pins
mapped):
GPIOI0 : unknown
GPIOI1 : unknown
GPIOI2 : analog
GPIOI3 : analog
GPIOI4 : alt function 0 push-pull pull-down
GPIOI5 : alt function 0 push-pull pull-down
GPIOI6 : alt function 0 push-pull pull-down
GPIOI7 : analog
GPIOI8 : unknown
GPIOI9 : unknown
GPIOI10 : unknown
GPIOI11 : unknown
GPIOI12 : unknown
GPIOI13 : unknown
GPIOI14 : unknown
GPIOI15 : unknown
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
GPIOF_UNKNOWN becomes a valid pin muxing information to indicate
that a pin is not mapped.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
pinmux_mode[] is linked to gpio_function[] defined in gpio-uclass.c
So reuse the same gpio_func_t enum value
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Long TFTP transfers lead to a wall of # characters on UART, which in
the end may slow down the transfer itself. Use CONFIG_TFTP_TSIZE to
print progress in fewer # characters.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The Buck3 on DHCOR is used to supply IO voltage. It can output either 3V3
in the default DHCOR configuration, or 2V9 in case of AV96 DHCOR variant
which has extra Empirion DCDC converter in front of the 1V8 IO supply, or
outright 1V8 in case of 1V8 IO DHCOR without the Empirion DCDC converter.
The 2V9 mode in case of AV96 DHCOR variant is used to reduce unnecessarily
high input voltage to the Empirion DCDC converter, so move it into matching
DTSI to stop confusing users.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Long TFTP transfers lead to a wall of # characters on UART, which in
the end may slow down the transfer itself. Use CONFIG_TFTP_TSIZE to
print progress in fewer # characters.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The DHCOM does ship with KS8851 with 1.5 kiB packet buffer. The DHSOM
may be extended with other MAC options connected to FMC2 bus, like the
DM9000, wih similar limitations. Use default CONFIG_TFTP_BLOCKSIZE of
1468 Bytes instead of 1536 Bytes, which always avoids overflowing the
packet buffers of such limited MACs, which leads to e.g. TFTP timeouts.
This also avoids receiving a short packet fragment at the end of each
TFTP block, which led to reduced performance.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The SoC seems to lose the values of MCUDIVR, PLL3CR, PLL4CR, RCC_MSSCKSELR
during suspend/resume cycle, cache them and reinstate their values on resume.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Enable DRAM ASR, auto self-refresh, conditionally, based on DT PWRCTL
register bits. While ASR does save considerable amount of power at
runtime automatically, it also causes LTDC underruns on large panels.
Let user select whether or not ASR is required or not, generally ASR
should be enabled on portable and battery operated devices.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Device tree alignment with Linux kernel v5.18-rc2:
- ARM: dts: stm32: Add support for the emtrion emSBC-Argon
(only the pincontrol part)
- ARM: dts: stm32: Drop duplicate status okay from DHCOM gpioc node
- ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp151
- ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15
- ARM: dts: stm32: use exti 19 as main interrupt to support RTC wakeup on
stm32mp157
- ARM: dts: stm32: add DMA configuration to UART nodes on stm32mp151
- ARM: dts: stm32: keep uart4 behavior on *
- ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Handle correctly the silicon revision = REV_ID[15:0] of Device Version
and the associated device marking, A to Z on STMicroelectronics STM32MP
SOCs.
This patch prepare the introduction of next STM32MP family,
with STM32MP13x Rev.Z for REV_ID = 1.1.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The function ft_system_setup shouldn't return an error when the
/soc node is absent in the provided device tree but just skip the
updates.
This patch solves an issue when the U-Boot pytest is executed on board.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
On STMicroelectronics boards, the UART can reliably go up to
2000000 bauds when connected to the on-board ST-LINK-V2 for STM32MP15
Unfortunately U-Boot will fall back to 115200 unless higher rates are
declared via CONFIG_SYS_BAUDRATE_TABLE.
This patch add the support of higher baudrates on STMicroelectronics
boards with ST-LINK.
Cc: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Set the environment variable "console", used in extlinux.conf file when it
is generated by YOCTO distribution with:
UBOOT_EXTLINUX_CONSOLE ??= "console=${console},${baudrate}"
With these 2 variables, U-Boot give dynamically the used console and
baudrate in the Linux kernel bootargs.
For the STMicroelectronics boards, the used console is ttySTM0.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add missing \n at the end of the error trace
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Wrong DISPLAY_FLAGS used to set the data enable polarity.
Signed-off-by: Yannick FERTRE <yannick.fertre@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Accept flashlayout without header in alternate 0, to simplify
the support of stm32prog command with dfu-util.
By default the flashlayout file size is the size of the received binary,
provided with the offset in the DFU alternate.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Update the stm32prog command to allow the reception of U-Boot script in
the FlashLayout alternate during the first USB enumeration.
This patch is aligned with the last TF-A behavior: the Flashlayout
is now loaded by U-Boot; it is no more present at STM32_DDR_BASE when
the stm32prog is launched after a serial boot, on UART or on USB.
The received script must be a U-Boot legacy image, no more need to add
a stm32image header.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
When an interruption is received during the first USB enumeration
used to received the FlashLayout, with handle ctrl-c, the second
enumeration is not needed and the result for stm32prog_usb_loop
is false (reset is not needed).
This patch avoids the need of a second ctrl to interrupt the command
stm32prog.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of UUID for FIP parttion, required by Firmware update
support in TF-A:
- UUID TYPE for FIP partition: 19d5df83-11b0-457b-be2c-7559c13142a5
- "fip-a" partition UUID: 4fd84c93-54ef-463f-a7ef-ae25ff887087
- "fip-b" partition UUID: 09c54952-d5bf-45af-acee-335303766fb3
This check is done with a new partition type "FIP" associated
at the FIP UUID.
The A/B partition UUID is detected by the partition name:
"fip-a", "fip-b".
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of new header for the STM32IMAGE version V2
in command stm32prog command for STM32MP13x family.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
When OP-TEE is used, the SMC for BSEC management are not
available and the PTA provisioning for OTP must be used.
U-Boot opens the session to this PTA and use it for OTP
access.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a configuration flag CONFIG_CMD_STM32PROG_OTP to enable the support of
OTP update in stm32prog command.
This new configuration allows to deactivate this feature for security reason
and it is a preliminary step for support of OPT update with the OP-TEE
provisioning TA.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
atsha204 chip is predecessor of atsha204a chip. Current U-Boot driver
atsha204a-i2c.c can use both atsha204 and atsha204a chips because it does
not call specific functions to just one of these chips.
So just add compatible string for atsha204.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
The E4 revision of the AM64 SKEVM embeds a TPS65219 PMIC,
this adds the PMIC node with the required regulators voltages.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The E4 revision of the AM64 SKEVM embeds a TPS65219 PMIC,
this enables the necessary options to load and control the
PMIC regulators.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The TPS65219 I2S PMIC features 3 Buck converters and 4 linear regulators,
2 GPOs, 1 GPIO, and 3 multi-function-pin.
This adds the driver for the Buck converters & linear regulators.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The TPS65219 I2S PMIC features 3 Buck converters and 4 linear regulators,
2 GPOs, 1 GPIO, and 3 multi-function-pin.
This adds the PMIC driver, loading the regulator sub-nodes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
For CONFIG_DM_SERIAL it is required to increase CONFIG_SYS_MALLOC_F_LEN as
default value is not enough for memory hungry CONFIG_DM_SERIAL code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
This enable booting of Debian systems which use raw initrd image (instead
of uInitrd created by mkimage). This change increase size of u-boot.bin
binary by just 64 bytes.
Signed-off-by: Pali Rohár <pali@kernel.org>
On this platform DM_I2C and SPL_DM_I2C enabled.
Remove legacy code.
Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
switch the pin definitions from AM33XX_IOPAD to AM33XX_PADCONF macro
Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
UEFI:
* Fix build errors due to
- using sed with non-standard extension for regular expression
- target architecture not recognized for CROSS_COMPILE=armv7a-*
- CONFIG_EVENT not selected
* add sha384/512 on certificate revocation
Others:
* factor out the user input handling in bootmenu command
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Merge tag 'efi-2022-07-rc3-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc3-2
UEFI:
* Fix build errors due to
- using sed with non-standard extension for regular expression
- target architecture not recognized for CROSS_COMPILE=armv7a-*
- CONFIG_EVENT not selected
* add sha384/512 on certificate revocation
Others:
* factor out the user input handling in bootmenu command
The previous patch adds support for rejecting images when the sha384/512
of an x.509 certificate is present in dbx. Update the sandbox selftests
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Currently we don't support sha384/512 for the X.509 certificate
in dbx. Moreover if we come across such a hash we skip the check
and approve the image, although the image might needs to be rejected.
Rework the code a bit and fix it by adding an array of structs with the
supported GUIDs, len and literal used in the U-Boot crypto APIs instead
of hardcoding the GUID types.
It's worth noting here that efi_hash_regions() can now be reused from
efi_signature_lookup_digest() and add sha348/512 support there as well
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This commit moves the user input handling from cmd/bootmenu.c
to common/menu.c to reuse it from other modules.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes
WARNING: unmet direct dependencies detected for EVENT_DYNAMIC
Depends on [n]: EVENT [=n]
Selected by [y]:
- EFI_LOADER [=y] && OF_LIBFDT [=y] && ...
and the succeeding build breakage.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Building with OpenSSL 3.0 produces warnings like:
../tools/sunxi_toc0.c:846:17: warning: ‘RSA_get0_d’ is deprecated:
Since OpenSSL 3.0 [-Wdeprecated-declarations]
846 | if (root_key && RSA_get0_d(root_key)) {
| ^~
As OpenSSL 3.0 is not available in elder Linux distributions
just silence the warning.
Add missing #include <openssl/bn.h>.
Fixes: e9e87ec47c75 ("tools: mkimage: Add Allwinner TOC0 support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Over the years, several options have not made it into the help message.
Document them. Do the same for the man page.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Use [:space:] instead of \s and \S in regular expression that
determines the sandbox target architecture. Fixes the build
failure on OpenBSD introduced with commit 4e65ca00f3a3
("efi_loader: bootmgr: add booting from removable media").
Fixes: f7691a6d736b ("sandbox: allow cross-compiling sandbox")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This has been deprecated for over 10 years and everything now uses the
plain "phandle" property in preference. There's no need to set
linux,phandle when creating phandles for nodes that do not have one.
dtc changed the default to creating just phandle in version 1.4.5
released in September 2017 with the justification that the new style had
already been supported for 7 years by that point (see dtc commit 0016f8c
("dtc: change default phandles to ePAPR style instead of both")).
Signed-off-by: John Keeping <john@metanate.com>
Adds a sub-command repair to the command gpt
that allow to repair a corrupted gpt table. If
the both gpt table (primary and backup) are
valid, then the command does nothing.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
If a gpt table is corrupted (after a power cut
for example), then the gpt table should repaired.
The function gpt_repair_headers check if at least
one gpt table is valid, and then only write the
corrupted gpt table.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Since commit 16cc5ad0b439 ("power: regulator: add dummy helper")
regulator dummy helper are always available even if DM_REGULATOR
is not set.
DM_REGULATOR flag is no more needed to protect no DM core,
remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
MAX6370 watchdog is available e.g. on Freescale P1/P2 RDB-PC boards.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
- Assorted minor code cleanups.
- Clean-up the reset uclass code slightly and fix some issues with a
lack of handlers for a case in the driver.
- Y2038 RTC fix
drivers/misc/fs_loader.c: In function ‘mount_ubifs’:
drivers/misc/fs_loader.c:46:12: warning: implicit declaration of function ‘ubi_part’ [-Wimplicit-function-declaration]
int ret = ubi_part(mtdpart, NULL);
^~~~~~~~
drivers/misc/fs_loader.c:53:9: warning: implicit declaration of function ‘cmd_ubifs_mount’ [-Wimplicit-function-declaration]
return cmd_ubifs_mount(ubivol);
^~~~~~~~~~~~~~~
drivers/misc/fs_loader.c: In function ‘umount_ubifs’:
drivers/misc/fs_loader.c:58:9: warning: implicit declaration of function ‘cmd_ubifs_umount’ [-Wimplicit-function-declaration]
return cmd_ubifs_umount();
^~~~~~~~~~~~~~~~
Signed-off-by: Pali Rohár <pali@kernel.org>
In case the ops is not implemented, return 0 in the core right away.
This is better than having multiple copies of functions which just
return 0 in each reset driver. Drop all those empty functions.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Local variable out.name lives on the stack and therefore cannot
be returned directly. Move the strdup() call into the function.
(Coverity 352460)
Fixes: 7c33f78983c3 ("clk: scmi: register scmi clocks with CCF")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
tm_mon has a range from 0..11, but the RTC expects 1..12. So we adapt
the month accordingly. This was determined when comparing the driver
with the corresponding linux kernel driver.
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
If argc is not < 3, it must be >= 3.
If argc >= 3, argv[2] cannot be NULL.
Fixes: 9de612ae4ded ("cmd: adc: Add support for storing ADC result in env variable")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We don't have an option -cq but two distinct options -c and -q.
Fixes: e9496ec37440 ("fdt: Add -q option to fdt addr for distro_bootcmd")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We currently overflow due to wrong types used internally in rtc_mktime,
on all platforms, and we return a too small type on 32-bit.
One consumer that directly benefits from this is mktime64. Many others
may still store the result in a wrong type.
While at it, drop the redundant cast of mon in rtc_mktime (obsoleted by
714209832db1).
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
On some image types like i.MX8 and i.MX8M, the verify_header function
is not implemented.
Before this commit, no check on tparams->verify_header was done causing
a segfault if NULL. Now, a proper error message is printed.
Signed-off-by: Nicolas Heemeryck <nicolas.heemeryck@gmail.com>
Currently, in case of arm64 bootloader and U-Boot the stack pointer is
initialized at an offset of NON_SECURE_MSRAM_SIZE from arm64 SPL's text
base address. After jumping to arm64, execution is done out of DDR.
Therefore, having an offset corresponding to the size of MSRAM does not
have any significance.
Instead, initialize the stack pointer after an offset of 4MB from the SPL
text base address. This helps in allocating larger memory for stack.
┌────────────────────┐0x80080000
│ │
│ arm64 SPL │
├────────────────────┤
│ ▲ │
│ │ │
│ STACK │
├────────────────────┤0x80480000
│ Memory for Load │
│ Buffer Allocation │
├────────────────────┤0x80800000
│ │
│ U-Boot Image │
│ │
└────────────────────┘
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
There are many pins in an SoC, and register usage may vary by pins.
This patch introduces a concept of "io type" and "io type group"
to mediatek pinctrl drivers. This can provide different pinconf
handlers implementation (eg: "bias-pull-up/down", "driving" and
"input-enable") for IO pins that belong to different types.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Pinctrl design of some mediatek SoC need to access registers that
distribute in multiple memory base address. this patch introduce new
mechanism in mediatek pinctrl driver to support the chips which have
the new design.
This patch add a member 'base_calc' in pinctrl private data, and changed
original 'base' private data to an array of *iomem.
When 'base_calc' attribute is set, it will requests multiplue regs base
from the DT, if 'base_calc' attribute is not set, it only use legacy way
to request single reg resource from the DT.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
There are many pins in a SoCs, and different pin may belong
to different "io_type", For example: some pins of MT7622 belongs
to "io_type A", the other belongs to "io_type B", and pinctrl "V0"
means handle pinconf via "io_type A" or "io_type B", so SoCs that
contain "io_type A" and "io_type B" pins, use "V0" in pinctrl driver.
This patch separates the implementation of register operations
(e.g: "bias-pull-up/down", "driving" and "input-enable") into
different functions, and lets the original V0/V1
ops to call the new functions.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
With sandbox, U-Boot can be run without a device tree (i.e. no -d or -T
parameter). In this case an empty device tree is created for convenience.
With a recent change this causes an error due to the missing '/binman'
node.
Add this node to avoid the problem, as well as a test that U-Boot can
be run without a device tree.
Fixes: 059df5624b ("arch: Kconfig: imply BINMAN for SANDBOX")
Fixes: https://source.denx.de/u-boot/u-boot/-/issues/11
Signed-off-by: Simon Glass <sjg@chromium.org>
This is useful sometimes when running a specific test. Add support for it
in the existing restart_uboot_with_flags() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Remove Masami Hiramatsu from MAINTAINERS since he will leave
Linaro and his email will be not available anymore.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
SPL_SYS_MALLOC_F_LEN defaults to SYS_MALLOC_F_LEN. 0x10000 is 64 KiB, or
around half of the total OCRAM size. Revert to the default of 0x2000. This
fixes SPL boot.
Fixes: 545eceb520 ("imx8/ls10xx: Use a sane SYS_MALLOC_F_LEN default")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Add clock controller driver for NPCM750
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
* Test
Unit test for 'bootmenu' command
* UEFI
Preparatory patches for implementing a UEFI boot options based menu
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Merge tag 'efi-2022-07-rc2-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc2-2
* Test
Unit test for 'bootmenu' command
* UEFI
Preparatory patches for implementing a UEFI boot options based menu
Macro MVNETA_GMAC_FORCE_LINK_UP can be dropped from value assignment in
fixed link case, since it's value is written into the register later in
the function for link-down-to-link-up case. The value is written as
MVNETA_GMAC_FORCE_LINK_DOWN | MVNETA_GMAC_FORCE_LINK_PASS, and so the
macro definition can also be dropped.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Guard the code handling the fixed PHY case by
CONFIG_IS_ENABLED(PHY_FIXED).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Since this member is checked only at two places drop it and inline it's
usage.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Write PHY address just before enabling HW polling of the PHY.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Stop parsing fixed-link in the MAC driver. Instead support only PHY mode
and let the fixed PHY driver handle the fixed-link case.
Enable CONFIG_PHY_FIXED for mvneta boards that need it: Turris Omnia and
ESPRESSObin.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The CONFIG_* macros are reserved for Kconfig. This was probably done
when this driver was being imported from Linux. Rename the macro.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Drop checking for CONFIG_PHYLIB in mvneta, this is already done in
Kconfig.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Drop unnecessary space in mvneta_adjust_link().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Use the bool type instead of int for status_change variable.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Drop one indentation level in the mvneta_adjust_link() function.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The `ret` variable in mvneta_probe() is unused if DM_GPIO is disabled.
Since the variable is used only once after assigning value, we can
inline the usage and drop the variable.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This MDIO bus is now handled by a proper mvmdio DM driver. Remove it
from mvneta.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
In order to be able to get rid of the non-DM MDIO bus registered in
mvneta driver, start using the DM registered one in Turris MOX board
code.
This also allows us to drop the hack introduced in MOX' -u-boot.dtsi
file.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Add helper to resolve PHY node from it's ofnode via DM MDIO subsystem.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
In order to be able to get rid of the non-DM MDIO bus registered in
mvneta driver, we need to stop using board_network_enable() and instead
use the DM registered MDIO device to configure switch in
last_stage_init().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
We don't need to remember PHY address anymore, because since using DM
MDIO for connecting PHY, the address is parsed by mdio-uclass from
the ofnode.
But the driver uses a special value of the address to signal fixed link
usage.
Drop phyaddr add fixed_link in driver private structure. This simplifies
code a little.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Use the modern DM MDIO API for connecting PHY in the mvneta driver.
This requires enabling MVMDIO driver in several config files.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
In mvneta_adjust_link() we need to set MII_SPEED bit only if PHY reports
the speed at 100Mbps.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Drop .of_to_plat() from the mvneta driver and parse the two properties
in .probe().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch enables the Kconfig symbols needed for full ethernet support
on the NIC23. Additionally board specific setup is done, mostly GPIOs
related to SFP / GPIO configuration. With this, ethernet can be used on
this board. Here an example of a tftp load:
=> tftp ffffffff81000000 big
Using ethernet-mac-nexus@11800e2000000 device
TFTP from server 192.168.1.5; our IP address is 192.168.1.247
Filename 'big'.
Load address: 0xffffffff81000000
Loading: ################################################## 10 MiB
9.7 MiB/s
done
Bytes transferred = 10485760 (a00000 hex)
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables the Kconfig symbols needed for full ethernet support
on the EBB7304. Also the PHY autonegotiation timeout is increased, as
the default 5 seconds are sometime a bit short. With this, ethernet can
be used on this board. Here an example of a tftp load:
=> tftp ffffffff81000000 big
ethernet-mac-nexus@11800e0000000 Waiting for PHY auto negotiation to complete....... done
Using ethernet-mac-nexus@11800e0000000 device
TFTP from server 192.168.1.5; our IP address is 192.168.1.243
Filename 'big'.
Load address: 0xffffffff81000000
Loading: ################################################## 10 MiB
13.2 MiB/s
done
Bytes transferred = 10485760 (a00000 hex)
Signed-off-by: Stefan Roese <sr@denx.de>
This patchs adds the ethernet & MDIO driver for the MIPS Octeon II / III
SoC platform. Please note that these drivers are based on the 2013
U-Boot version from Marvell and make use of the platform supported
helper functions for the ethernet functionality, including stuff like
SFP handling.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Add the Octeon ethernet (BGX) and SFP DT nodes to the NIC23 dts file to
enable ethernet support on this board.
Signed-off-by: Stefan Roese <sr@denx.de>
Add the Octeon ethernet (BGX), SMI and PHY DT nodes to the EBB7304 dts
file to enable ethernet support on this board.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch moves CONFIG_SYS_INIT_SP_OFFSET to a higher address so that
it does not interfere with larger U-Boot images. This was noticed, while
adding network support to the EBB7304 board.
Signed-off-by: Stefan Roese <sr@denx.de>
Call octeon_bootmem_init() earlier in the boot process, so that this
bootmemory infrastructure is already initialized when e.g. the
networking support gets probed.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the newly added C files to the Makefile to enable
compilation. This is done in a separate step, to not introduce build
breakage while adding the single files with potentially missing
externals.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch includes misc changes to already present Octeon MIPS C files
files, which are necessary for the upcoming ethernet support.
The changes are mostly:
- DM GPIO & I2C infrastructure
- Coding style cleanup while reworking of the code
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-range.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-qlm-tables.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko-internal-ports-range.c from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko3-resources.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko3-compat.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko3-queue.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko3.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pki-resources.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pki.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-ipd.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-ilk.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-global-resource.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-fpa-resource.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-fpa.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-fau-compat.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-cmd-queue.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-agl.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-xaui.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-sfp.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-sgmii.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-rgmii.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-pko3.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-pko.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-pki.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-npi.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-loop.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-ipd.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-ilk.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-fpa.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-board.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-bgx.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-agl.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch includes misc changes to already present Octeon MIPS header
files, which are necessary for the upcoming ethernet support.
The changes are mostly:
- DM GPIO & I2C infrastructure
- Coding style cleanup while reworking the headers
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-xcv-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pcsxxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-npei-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-lbk-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-iob-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-igl-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import misc cvmx-helper header files from 2013 U-Boot. They will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
To quote the author:
The virtio PCI drivers forgo a number of consistency checks,
particularly around pointer validation and bounds checking. This series
focuses on the modern driver to add those checks.
The start of the series adds and fixes some basic bounds checks. Later
patches ensure PCI addresses fall within the expected regions rather
than any arbitrary address. This is acheived by introducing range
parameters to a few of the dm_pci_* functions that allow the ranges to
be checked.
The series also adds a few new configs to allow parts of virtio and PCI
to be disabled where the features may be unused and the current
implementations don't have the needed consistencty checks.
The virtio PCI capabilities describe regions of memory that should be
mapped. Map those with dm_pci_map_bar() which will ensure they are valid
PCI regions.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Prepare for calls to `virtio_pci_map_capability()` failing by returning
NULL on error. If this happens, later accesses to the pointers would be
unsafe so cause the probe to fail if such an error occurs.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a mask parameter to control the lookup of the PCI region from which
the mapping can be made.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add mask parameter and reorder length parameter to match the other PCI
address conversion functions. Using PCI_REGION_TYPE as the mask gives
the old behaviour.
It's converted from a macro to an inline function as the length
parameter is now used twice, but should only be calculated once.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When converting addresses, apply a mask to the region flags during
lookup. This allows the caller to specify which flags are important and
which are not, for example to exclude system memory regions.
The behaviour of the function is changed such that they don't
preferentially search for a non-system memory region. However, system
memory regions are added after other regions in decode_regions() leading
to a similar outcome.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Evolve dm_pci_map_bar() to include an offset and length parameter. These
allow a portion of the memory to be mapped and range checks to be
applied.
Passing both the offset and length as zero results in the previous
behaviour and this is used to migrate the previous callers.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add tests for the functions dm_pci_bus_to_phys() and
dm_pci_phys_to_bus() which convert between PCI bus addresses and
physical addresses based on the ranges declared for the PCI controller.
The ranges of bus#1 are used for the tests, adding a translation to one
of the ranges to cover more cases.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When converting between PCI bus and physical addresses, include a length
parameter that can be used to check that the entire range fits within
one of the PCI regions. This prevents an address being returned that
might be only partially valid for the range it is going to be used for.
Where the range check is not wanted, passing a length of 0 will have the
same behaviour as before this change.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When parsing the `ranges` DT node, check that both extremes of the
regions are addressable without overflow. This assumption can then be
safely made when processing the regions.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The flags parameter of dm_pci_map_bar() is used for PCI region flags
rather than memory mapping flags. Fix the type to match that of the
region flags and stop using the regions flags as memory mapping flags.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Read the virtio PCI capability out of the device configuration space to
a struct rather than accessing fields directly from the configuration
space as they are needed. This both makes access to the fields easier
and avoids re-reading fields.
Re-reading fields could result in time-of-check to time-of-use problems,
should the value in the configuration space change. The range check of
the `bar` field and the later call to `dm_pci_read_bar32()` is an
example of where this could happen.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Ensure the virtio PCI capabilities are contained within the bounds of
the device's configuration space. The expected size of the capability is
passed when searching for the capability to enforce this check.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Check that the common config is at least as large as the struct it is
expected to contain. Only then is it safe to cast the pointer and be
safe from out-of-bounds accesses.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Make sure virtio notifications are written within their allocated
buffer.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The device config is optional, so check it was present and mapped before
trying to use the pointer. Bounds violations are an error, not just a
warning, so bail if the checks fail.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The length of the device config was erroneously being taken from the
notify capability. Correct this by finding the length in the device
capability.
Fixes: 550435edf810 ("virtio: pci: Support non-legacy PCI transport device")
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a new config to control whether the driver for legacy virtio PCI
devices is included in the build. VIRTIO_PCI_LEGACY is included by
default when VIRTIO_PCI is selected, but it can also be independently
toggled.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit adds the Kconfig option to disable to enter
the U-Boot console from bootmenu.
If CMD_BOOTMENU_ENTER_UBOOT_CONSOLE is enabled, "U-Boot console"
entry is appeared as the last entry in the bootmenu, then user can
enter U-Boot console.
If CMD_BOOTMENU_ENTER_UBOOT_CONSOLE is disabled, "Quit" entry
is appeared as the last entry instead of "U-Boot console".
When user chooses "Quit" from bootmenu, the following default
commands are invoked.
- "bootefi bootmgr" (if efi bootmgr is enabled)
- "run bootcmd"
If the both commands are executed and returns to the bootmenu,
the bootmenu will appears again.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
This commit adds the UEFI related menu entries
into the bootmenu.
User can select which UEFI "Boot####" option to execute
from bootmenu, then bootmenu sets the "BootNext" UEFI
variable and invoke efi bootmgr. The efi bootmgr
will handle the "BootNext" UEFI variable.
If the "BootNext" UEFI variable is preset and efi bootmgr is enabled,
bootmenu invokes efi bootmgr to handle "BootNext" as first priority.
The UEFI boot entry has the "UEFI BOOTXXXX" prefix as below.
*** U-Boot Boot Menu ***
UEFI BOOT0000 : debian
UEFI BOOT0001 : ubuntu
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
This is a preparation for succeeding addition of uefi boot
and distro boot menu entries into bootmenu.
The bootmenu_entry title is updated to u16 string because
uefi use u16 string. This commit also factors out the function
to prepare the entries generated by "bootmenu_x" U-Boot environment
variable.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Under the current implementation, booting from removable media using
a architecture-specific default image name, say BOOTAA64.EFI, is
supported only in distro_bootcmd script. See the commit 74522c898b35
("efi_loader: Add distro boot script for removable media").
This is, however, half-baked implementation because
1) UEFI specification requires this feature to be implemented as part
of Boot Manager's responsibility:
3 - Boot Manager
3.5.1 Boot via the Simple File Protocol
When booting via the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL, the FilePath will
start with a device path that points to the device that implements the
EFI_SIMPLE_FILE_SYSTEM_PROTOCOL or the EFI_BLOCK_IO_PROTOCOL. The next
part of the FilePath may point to the file name, including
subdirectories, which contain the bootable image. If the file name is
a null device path, the file name must be generated from the rules
defined below.
...
3.5.1.1 Removable Media Boot Behavior
To generate a file name when none is present in the FilePath, the
firmware must append a default file name in the form
\EFI\BOOT\BOOT{machine type short-name}.EFI ...
2) So (1) entails the hehavior that the user's preference of boot media
order should be determined by Boot#### and BootOrder variables.
With this patch, the semantics mentioned above is fully implemented.
For example, if you want to boot the system from USB and SCSI in this
order,
* define Boot0001 which contains only a device path to the USB device
(without any file path/name)
* define Boot0002 which contains only a device path to the SCSI device,
and
* set BootOrder to Boot0001:Boot0002
To avoid build error for sandbox, default file name "BOOTSANDBOX.efi"
is defined even if it is out of scope of UEFI specification.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
On sandbox use binary name corresponding to host architecture.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This function will be used in the next commit where some behavior
of EFI boot manager will be expanded.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
menu_get_choice() needs to handle the case that menu item
is empty. In this case, menu_get_choice() returns -ENOENT.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
To make user aware of the menu entry selection, menu always
appears regardless of the number of entry.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Adjust test/py/tests/test_bootmenu.py
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Provide a unit test for function u16_strlcat().
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Provide u16 string version of strlcat().
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
lib/charset.c is not optional for
EFI_APP || EFI_LOADER || UFS || UT_UNICODE.
These must select CONFIG_CHARSET.
Fixes: 726cd9836db0 ("efi: Make unicode printf available to the app")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The unit test has not been built since CPU_V7 was rename CPU_V7A.
Fixes: acf1500138bb ("arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When resetting the text console the colors have to be set before clearing
the screen. Otherwise the background color may be wrong.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
%s/cammand/command/
%s/sequencies/sequences/
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* correct output for timeout > 99 s
* don't use spaces to advance to the output column
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Based on reading https://www.msys2.org/docs/ci/ and "Other Systems"
rework how we update MSYS2 to the current version. We run it once, to
perform nothing other than being the first run, then we run pacman
twice.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add Nuvoton NPCM BMC Flash Interface Unit(FIU) SPI master
controller driver using SPI-MEM interface.
The FIU supports single, dual or quad communication interface.
The FIU controller driver provides flash access in UMA(User
Mode Access) mode by using an indirect address/data mechanism.
the dts node is followed upstream kernel dts name.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Jagan: fixed the Kconfig, Makefile order]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add Macronix mx25u51245g flash entry, so this can be used on
SoCFPGA devices.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
[Jagan: updated commit head]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add ID for Winbond W25Q128JW device. This is a 128 Mbit QSPI NOR.
Tested on W25Q128JWPIM part.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Vignesh R <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
To quote the author:
U-Boot provides a verified-boot feature based around FIT, but there is
no standard way of implementing it for a board. At present the various
required pieces must be built up separately, to produce a working
implementation. In particular, there is no built-in support for selecting
A/B boot or recovery mode.
This series introduces VPL, a verified program loader phase for U-Boot.
Its purpose is to run the verified-boot process and decide which SPL
binary should be run. It is critical that this decision happens before
SPL runs, since SPL sets up SDRAM and we need to be able to update the
SDRAM-init code in the field.
Adding VPL into the boot flow provides a standard place to implement
verified boot. This series includes the phase itself, some useful Kconfig
options and a sandbox_vpl build for sandbox. No verfied-boot support is
provided in this series.
Most of the patches in this series are fixes and improvements to docs and
various Kconfig conditions for SPL.
Add an initial VPL build for sandbox. This includes the flow:
TPL (with of-platdata) -> VPL -> SPL -> U-Boot
To run it:
./tpl/u-boot-tpl -D
The -D is needed to get the default device tree, which includes the serial
console info.
Add a Makefile check for OF_HOSTFILE which is the option that enables
devicetree control on sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for VPL, a new phase of U-Boot. This runs after TPL. It is
responsible for selecting which SPL binary to run, based on a
verified-boot process.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current logic checks several options to decide whether SPL/TPL need
the U-Boot devicetree to be built. In fact we can check OF_CONTROL, which
is enabled in all cases that matter.
Signed-off-by: Simon Glass <sjg@chromium.org>
This feature is not available in SPL unless common/ and lib/ are built.
Update the Kconfig to avoid build errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
MPP55 is used as a reset connected to the L3 switch chip. This doesn't
matter for u-boot as it doesn't use the L3 switch but it is useful to
be able to toggle the switch in/out of reset for the OS.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This command is useful in U-boot scripts and it is being used by
OpenWrt bootscript for this board [1]. Otherwise shell scripting
commands are enabled by default in cmd/Kconfig.
[1] 852126680e/target/linux/mvebu/image/clearfog.bootscript (L7)
[2] e95afa5675/cmd/Kconfig (L1504)
Fixes: 0299c90f396c5b2971a4bac596339f4b03661c27 ("arm: mvebu: Add
SolidRun ClearFog Armada 38x initial support")
Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The Zyxel NSA310s board has the network chip Marvell Alaska 88E1318S.
Use uclass mvgbe and the compatible driver M88E1310 driver to bring
up Ethernet.
- Use uclass mvgbe to bring up the network. And remove ad-hoc code.
- Remove CONFIG_RESET_PHY_R.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Add phy mode RGMII to kirkwood-nsa310s.dts
- Miscellaneous changes: Move constants to .c file and remove header file
board/zyxel/nsa310s/nsa310s.h, add support for large USB and SATA HDDs,
use BIT macro, add/cleanup comments, and cosmetic changes.
Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220412201820.10291-1-mibodhi@gmail.com/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
For most Kirkwood boards, the PHY page is already set to page 0
(in register 22) before phy_connect is invoked. But some board like
the Zyxel NSA310S (which uses the network chip MV88E1318S), the PHY page
is not set to page 0. There seems to be some bad data remained in
register 22 when the uclass MVGBE about to invoke phy_connect().
This patch enables the uclass MVGBE to always set the PHY page to 0
before phy_connect.
For reference, please see this discussion:
[RFC PATCH v2] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe
and PHY driver for DM Ethernet.
https://lists.denx.de/pipermail/u-boot/2022-April/480946.html
This patch has been tested with the following Kirkwood boards:
NSA310S (88F6702, network chip MV88E1318S)
Sheevaplug (88F6281, network chip MV88E1318)
Pogo V4 (88F6192, network chip 88E1116R)
GF Home(88F6281, network chip 88E1116R)
Dreamplug (88F6281, network chip MV88E1318)
Dell Kace M300 (88F6282, network chip MV88E1318) - out of tree u-boot
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
U-Boot for Turris Omnia is always compiled with MMC, SCSI and USB support,
so always enable macros for booting from these devices.
Signed-off-by: Pali Rohár <pali@kernel.org>
CONFIG_ETHPRIME defines primary ethernet device and env variable $ethact
stores currently active ethernet device.
So there is no point to set ethact= in default environment. Instead set
CONFIG_ETHPRIME properly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
PCIe Mini CEM 2.1 spec added support for USB3.0 mode on MiniPCIe cards.
USB3.0 and PCIe share same pins and only one function can be active at the
same time. PCIe Mini CEM 2.1 spec says that determining function is
platform specific and spec does not define any dedicated pin which could
say if card is USB3.0-based or PCIe-based.
Implement this platform specific decision (USB3.0 vs PCIe) for WWAN
MiniPCIe slot on Turris Omnia via U-Boot env variable "omnia_wwan_slot",
similarly like is implemented forced mode for MiniPCIe/mSATA slot via
"omnia_msata_slot" env variable. Value "usb3" for "omnia_wwan_slot" would
mean to set USB3.0 mode and value "pcie" original PCIe mode.
A385 SoC on Turris Omnia has configurable fifth SerDes line (exported to
MiniPCIe WWAN slot with SIM card) either to USB3.0 or PCIe functionality,
so implementation of this new PCIe Mini CEM 2.1 feature is simple, by just
configuring SerDes to USB 3.0 mode.
Other twos MiniPCIe slots on Turris Omnia do not have this new
functionality as their SerDes lines cannot be switched to USB3.0
functionality.
Note that A385 SoC does not have too many USB3.0 blocks, so activating
USB3.0 in MiniPCIe cause that one external USB3.0 USB-A port would loose
USB3.0 functionality and would be downgraded just to USB2.0.
By default this MiniPCIe WWAN slot is in PCIe mode, like before.
To set this MiniPCIe WWAN slot to USB3.0 mode, call U-Boot commands:
=> setenv omnia_wwan_slot usb3
=> saveenv
=> reset
Signed-off-by: Pali Rohár <pali@kernel.org>
Show error message when DT file does not contain sata or pcie node which
should be explicitly disabled. This can happen when U-Boot code for finding
those nodes is incomplete or when those DT nodes are in different
unexpected location. In any case it is needed to know if DT not was not
explicitly disabled as it could mean that combo slots where setup
incorrectly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Move code for disabling sata and pcie DT nodes to own functions, so this
code can be called from other places in follow up patches.
Signed-off-by: Pali Rohár <pali@kernel.org>
Some PCIe-based MiniPCIe cards are broken and they do not ground PIN 43
which is required by PCIe mini CEM specs. Such broken cards are incorrectly
detected as mSATA cards because SATA specs requires that PIN 43 on mSATA
cards has to be disconnected.
PIN 43 on Turris Omnia is used only for MiniPCIe/mSATA card detection by
software in U-Boot SPL. Allow to override that U-Boot SPL detection by a
new "omnia_msata_slot" env variable (to value "pcie" or "sata") so broken
MiniPCIe cards can be used in combo mSATA/MiniPCIe slot too.
As configuration of PCIe vs SATA functionality is done in U-Boot SPL,
it is required to change env variable in permanent storage and reset the
board to take effect.
To force PCIe mode for broken MiniPCIe cards, call U-Boot commands:
=> setenv omnia_msata_slot pcie
=> saveenv
=> reset
Signed-off-by: Pali Rohár <pali@kernel.org>
By default use primary serdes map with PCIe function in combined
miniPCIe/mSATA slot. When SATA is detected change serdes map variable at
runtime.
Signed-off-by: Pali Rohár <pali@kernel.org>
BootROM maps SPI Flash to fixed address 0xD4000000 and this mapping is
active also when BootROM is executing binary kwbimage headers, which
includes also U-Boot SPL.
Therefore no initialization code is required to access SPI Flags from
U-Boot SPL. In proper U-Boot it is remapped to other location.
So in mvebu implementation of env_sf_get_env_addr() function returns
0xD4000000 when running in SPL and NULL when in proper U-Boot.
This change would allow to use U-Boot ENV in U-Boot SPL. Normally it is not
possible to read ENV because it is too big and U-Boot SPL does not have
such big malloc() pool to real all ENV variables.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
In some cases it makes sense to use env_sf_init_addr() also in SPL mode.
Allow it for boards by providing custom implementation of weak function
env_sf_get_env_addr(). When this function returns NULL it signals that
address is invalid, like config option CONFIG_ENV_ADDR.
There is no change in default behavior or in config options.
Signed-off-by: Pali Rohár <pali@kernel.org>
UEFI:
* fix UEFI booting after integration of UEFI sub-system with driver model
* avoid random return values from devpath_is_partition()
* minor code clean ups
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Merge tag 'efi-2022-07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc2
UEFI:
* fix UEFI booting after integration of UEFI sub-system with driver model
* avoid random return values from devpath_is_partition()
* minor code clean ups
To quote the author:
I've been experimenting with ASAN on sandbox and turned up a few issues
that are fixed in this series.
Basic ASAN was easy to turn on, but integrating with dlmalloc was
messier and fairly intrusive. Even when I had it working, there was only
a small redzone between allocations which limits the usefulness.
I saw another series on the list by Sean Anderson to enable valgrind
which was finding a different set of issues, though there was one
overlap that Sean is fixing with
"[PATCH] IOMUX: Fix access past end of console_devices".
With these issues fixed, I was able to run the dm tests without any ASAN
issues. There are a couple of leaks reported at the end, but that's for
another day.
Use-after-free shouldn't be used, even in tests. It's bad practice and
makes the test brittle.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This tests calls regmap_read() which takes a uint pointer as an output
parameter. The test was passing a pointer to a u16 which resulted in an
overflow when the output was written. Fix this by following the
regmap_read() API and passing a uint pointer instead.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Data is written for each channel but is only tracked as having one
channel written. This resulted in a buffer overflow and corruption of
the allocator's metadata which caused further problems when the buffer
was later freed. This could be observed with sandbox unit tests.
Resolve the overflow by tracking the writes for each channel.
Fixes: f987177db9 ("dm: sound: Use the correct number of channels for sound")
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The buffer is 512 bytes but read requests can be 800 bytes. Limit the
request to the size of the buffer.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When copying the string in copy_to_unicode(), check for the null
terminator in each position, not just at the start, to avoid reading
beyond the end of the string.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are expecte to be bars 0 through 5, but the last of these was
missing leading to an read beyond the buffer. Add the missing element
with zero values.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When do_acpi_dump() converts the table name to upper case, pass the
actual size of the output buffer so that the null terminator doesn't get
written beyond the end of the buffer.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The '--args' parameter to gdb comes before the binary that the debugger
will be attached to rather than after the binary and before the
arguments. Fix that in the docs.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
efi_init_early() creates an event hook for block device probing.
It has to be called before any block device is probed.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
While GPT partition is mandated in UEFI specification, CONFIG_PARTITION is
seen optional under the current implementation.
So modify efi_disk_rw_blocks() to allow accepting UCLASS_BLK devices.
Fixes: commit d97e98c887ed ("efi_loader: disk: use udevice instead of blk_desc")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
If the path consists only of an end node, it does not refer to a partition.
Avoid returning a random value from the stack in this case.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The log functions print file name, line number, and function name if
selected via the log command or customizing. Don't print the function
name twice.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The UT reinitializes the pin controller state, get LED2 udevice
to trigger its probe and configure the pin controller pin state
as it is expected by the test.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
The GPIO LED driver no longer considers the top level node an LED,
because it is not an LED. With this bug fixed, the LED enumeration
has changed. Update the test accordingly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
This function is empty, drop it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The top level DT node of gpio-leds is not a LED itself, bind NOP uclass
driver to it, and bind different LED uclass driver to its subnodes which
represent the actual LEDs. This simplifies the probe() implementation
and fixes the bogus top-level not-an-LED in 'led list' command output:
```
=> led list
led Error -121 <--- This is removed/fixed by this patch
green:user0 off
```
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Since 2d1deaf88ed ("led: gpio: Drop duplicate OF "label" property parsing"),
all LED nodes have some sort of label. Use device_is_compatible(..."leds-gpio")
to determine whether this is a top-level node, since it is only the top
level node which is compatible with "leds-gpio", the GPIO LEDs subnodes
are not.
Fixes: 2d1deaf88ed ("led: gpio: Drop duplicate OF "label" property parsing")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Calling device_probe() from uclass .post_bind() callback has all kinds
of odd side-effects, e.g. device instances not being available just yet.
Make use of the DM_FLAG_PROBE_AFTER_BIND instead, mark device instances
which need to be probe()d in order to configure the LED default state
with this flag and let the DM core do the device_probe() at the right
time instead.
Fixes: 72675b063b6 ("led: Configure LED default-state on boot")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Introduce DM_FLAG_PROBE_AFTER_BIND flag, which can be set by driver or
uclass in .bind(), to indicate such driver instance should be probe()d
once binding of all devices is complete.
This is useful in case the driver determines that hardware initialization
is mandatory on boot, and such initialization happens only in probe().
This also solves the inability to call device_probe() from .bind().
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
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Merge tag 'u-boot-at91-2022.07-b' of https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 features for the 2022.07 cycle:
This feature set includes the new driver for the AT91 reset controller,
a new board called sam9x60 curiosity, and several other fixes and
clean-ups (sama7g5ek qspi clock, impedance; remove unused code,
introduce Kconfig symbols for SPL timers)
It looks quite weird that for non PPC platforms cpu driver for MPC83xx can
be selected. That's why define proper dependency.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Manish Tomar's email bounces. Remove it, and reassign the config he was
maintaining to the primary maintainer for the board.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Upstream Linux kernel uses for mpc8548-based PCIe controllers compatible
string "fsl,mpc8548-pcie". So change U-Boot fsl PCIe driver and all DTS
files to use "fsl,mpc8548-pcie" instead of "fsl,pcie-mpc8548" to be
compatible with Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Linux P2020 USB kernel driver uses compatible string fsl-usb2-dr-v1.6 and
needs more DT properties. Copy P2020 usb@22000 properties from upstream
Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
interrupts property for spi@7000 node is needed for compatibility with
Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Device tree include file p2020-post.dtsi should be included after the board
device tree file and overrides settings of the board. So it should not
disable some node as board cannot enable it via normal way (it has to
enable it after inclusion of p2020-post.dtsi file).
Fix it by removal of explicit disable in p2020-post.dtsi file and then
remove explicit post-post enable in all P2020 board device tree files.
Currently no P2020 board has spi@7000 node disabled.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Linux kernel eSDHC driver for P2020 requires additional compatible string
fsl,p2020-esdhc and interrupts property. Add them to p2020-post.dtsi file
to make U-Boot board DTS files compatible for Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Import pq3-etsec1-timer-0.dtsi device tree include file from upstream Linux
kernel for P2020. This allows U-Boot to use P2020 device tree files from
upstream Linux kernel which reference ptp_clock@24e00 device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Import pq3-gpio-0.dtsi device tree include file from upstream Linux kernel
for P2020. This allows U-Boot to use P2020 device tree files from upstream
Linux kernel which reference gpio-controller@fc00 device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Replace hardcoded i2c hex values for NOR banks by named SW macros in
map_lowernorbank/map_uppernorbank env commands.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Replace hardcoded boot i2c bus num and address by existing macros when
generating env for CONFIG_EXTRA_ENV_SETTINGS.
Same macros are used in U-Boot board code when reading information from
boot i2c data.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Do not stringify env $vscfw_addr two times (once implicitly via string
operator "" and second time explicitly via __stringify() macro) and allow
to compile U-Boot without CONFIG_VSC7385_ENET (when __VSCFW_ADDR was not
defined and so macro name was stringified into CONFIG_EXTRA_ENV_SETTINGS).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Whole section about USB/eLBC configuration seems to be P1020 specific. So
add ifdefs to not compile it on other platforms (e.g. P2020).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Like for first 1G SDRAM map, do not enable Caching-inhibited nor Guarded
attribute for second 1G SDRAM mapping. Whole 2G SDRAM should use caches and
also allow speculative loading (by not setting Guarded attribute).
Also enable Memory Coherency attribute for second 1G SDRAM map. In commit
316f0d0f8f3c ("powerpc: mpc85xx: Fix static TLB table for SDRAM") it was
enabled for all SDRAM maps on all other boards, just missed this one case.
As a last thing, first 1G SDRAM map has wrong comment, so adjust it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When MPC85xx_PMUXCR_SDHC_WP is set then SDHC controller automatically makes
inserted SD card readonly if GPIO[9] is active.
In some design GPIO[9] pin does not have to be connected to SD card
write-protect pin and can be used as GPIO.
So do not set MPC85xx_PMUXCR_SDHC_WP bit when GPIO[9] is not used for
SDHC_WP functionality.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
As written in comment, P2020 has two possible SD switch configurations.
Extend code to detect both of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Like in all other checks in checkboard() function, do not hang on error.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
It is too confusing if sections are defined in non-ascending order.
Also linker has to go backward and then again forward when generating final
binary.
To make future changes easier, define all linker sections in ascending
order.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Linker knows exact size of the image, so there is no need to use
CONFIG_SYS_MONITOR_LEN macro (which should be upper limit).
Remove usage of CONFIG_SYS_MONITOR_LEN macro to simplify setup.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
.interp section is not available in output ELF binary and SIZEOF_HEADERS is
needed at all.
There is no change in generated u-boot.bin binary.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
mpc85xx SPL NAND linker script u-boot-nand_spl.lds is not used since
Jun 2014 commit 0234446fd171 ("nand_spl: remove MPC8536DS support").
Remove it.
Signed-off-by: Pali Rohár <pali@kernel.org>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Currently CONFIG_OF_SEPARATE is completely broken and U-Boot for some
mpc85xx board (e.g. P2020) has to be compiled with CONFIG_OF_EMBED.
Otherwise it crashes during early init.
When debug console is enabled and all debug logging options are turned on
then U-Boot on P2020 with CONFIG_OF_SEPARATE prints following error:
No valid device tree binary found at 110dc300
initcall sequence 110d3560 failed at call 1109535c (err=-1)
### ERROR ### Please RESET the board ###
Problem is with appended DTB. When CONFIG_SYS_MPC85XX_NO_RESETVEC is set
U-Boot binary image without DTB ends immediately after the .u_boot_list
section. At this position is defined _end symbol at which U-Boot expects
start of the appended DTB.
Problem is that after .u_boot_list section are in linker script defined
another sections with 256 byte long padding which are completely empty.
During conversion of U-Boot ELF binary to RAW binary u-boot-nodtb.bin,
objcopy removes trailing zero padding and therefore DTB is appended at
wrong position.
Changing alignment from 256 bytes to 4 bytes fixes this issue. And appended
DTB is finally at he correct position. With this fix U-Boot on P2020 with
CONFIG_OF_SEPARATE option starts working again.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
For compatibility with Linux kernel DTS files and also with other U-Boot
powerpc DTS files, rename esdhc@2e000 node to sdhc@2e000 in p1020-post.dtsi
and p2020-post.dtsi include files.
Linux kernel DTS files which include these dtsi files, expect that esdhc
node has name sdhc@2e000 and do not work with other node names.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This node is required for NAND and NOR support. Node is taken from the
upstream Linux kernel DTS file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
QorIQ pre-PBL BootROM scans first 24 SD card sectors (each with fixed 512
bytes length) for boot signature. Implement same redundancy behavior in
fsl_esdhc_spl driver to allow loading proper U-Boot when boot sector is not
the first one.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
According to Linux kernel DT schema nand-controller.yaml, using DT property
nand-ecc-algo=bch is the correct way for specifying BCH as ECC algorithm.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Initialize ECC configuration after nand_scan_ident() call and only in case
nand_scan_ident() have not done it. nand_scan_ident() fills ECC
configuration from device tree.
Fixes usage of NAND_ECC_SOFT_BCH when it is specified in device tree.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This allows boards to specify NAND settings via standard DT properties.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Import pq3-duart-0.dtsi device tree include file from upstream Linux kernel
for P2020. This allows U-Boot to use P2020 device tree files from upstream
Linux kernel which reference serial0 or serial1 devices.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
P2020 DTS files in upstream Linux kernel use fsl/p2020si-pre.dtsi and
fsl/p2020si-post.dtsi include device tree files.
Add symlinks for these include device tree files into U-Boot powerpc
directory and points them to U-Boot inline device tree files p2020.dtsi and
p2020-post.dtsi.
This allows to use P2020 DTS files from upstream Linux kernel in U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When env support is disabled then usage of env_init() or env_relocate()
generates linker errors. So do not compile env_init() or env_relocate()
in SPL code when env support is disabled in SPL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When env support is disabled then usage of env_get_f() generates linker
errors. So do not compile env_get_f() when env support is disabled (for
example when disabled only in SPL).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When env support is disabled then usage of env_get() generates linker
errors. So do not compile env_get() when env support is disabled (for
example when disabled only in SPL).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When CONFIG_LOGLEVEL is set to LOGL_DEBUG or higher then linker throws
error about undefined symbol mmc_mode_name(). So compile mmc_mode_name()
also when CONFIG_LOGLEVEL is set to LOGL_DEBUG or higher.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
If env is stored on SD card then U-Boot SPL automatically calls mmc_init()
before it is going to load proper U-Boot from SD card.
If env is not stored on SD card then U-Boot SPL fails to read proper U-Boot
from SD card due to missing mmc_init() call.
So add missing mmc_init() call into fsl_esdhc_spl's mmc_boot() function.
It fixes booting from SD card on P2020 boards without env support in SPL.
mmc_init() returns early if card was already initialized, so there is no
issue with calling this function more times.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In pre-PBL header is stored size of code which BootROM copies from SD card
to L2/SRAM. This size has upper limit of L2 cache size. In most cases this
is size of U-Boot SPL or size of L2 cache.
Therefore this size in pre-PBL header cannot be used for determining size
of proper U-Boot.
So always use CONFIG_SYS_MMC_U_BOOT_SIZE for determining size of proper
U-Boot which stored on SD card.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Pre-PBL BootROMs (MPC8536E, MPC8569E, P2020, P1011, P1012, P1013, P1020,
P1021, P1022) require custom BOOT signature on sector 0 and MBR/DBR
signature is not required at all.
So add check for BOOT signature and remove check for MBR/DBR.
This allows U-Boot SPL to load proper U-Boot on pre-PBL BootROMs platforms
also from SD cards which do not have MBR/DBR signature on sector 0.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The real entry point is _start_e500. There is no _start symbol at all. So
rename _start_e500 to _start for convension that _start symbol is used as
entry point.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
_start symbol contains only 32-bit data number 0x27051956 despite it is
marked as text section. This magic number is IH_MAGIC which is used for
marking uboot image header.
mpc85xx start.S code does not define valid uboot image header, so IH_MAGIC
number in _start symbol is useless there.
Moreover this _start symbol is not used at all. Entry point is at symbol
_start_e500.
So because this _start symbol is not used for anything, completely remove
it with IH_MAGIC number. After _start symbol was _start_cont symbol, so
replace all relative address calculations by _start_cont.
Signed-off-by: Pali Rohár <pali@kernel.org>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
NXP/Freescale Layerscape CPUs support high-speed serial interfaces (SERDES)
that can be configured for the application. Interfaces not used by the
application can be set to protocol 0 to turn them off and save power, but
U-Boot would emit a warning that 0 was invalid for a SERDES protocol on
boot. Replace the warning text with a notice that the SERDES is disabled.
Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
For now, this only provides reset and poweroff functions.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
There is an user-selectable SYS_HAS_ARMV8_SECURE_BASE, which has the
same meaning but is just for the ls1043ardb board. As no in-tree config
uses this, drop it and replace it with something more sophiticated:
ARMV8_PSCI_RELOCATE. This option will then enable the ARMV8_SECURE_BASE
option which is used as the base to relocate the PSCI code (or any code
in the secure region, but that is only PSCI). A SoC (or board) can now
opt-in into having such a secure region by enabling
SYS_HAS_ARMV8_SECURE_BASE. Enable it for the LS1043A SoC, where it was
possible to relocate the PSCI code before as well as on the LS1028A SoC
where there will be PSCI support soon.
Additionally, make ARMV8_PSCI and SEC_FIRMWARE_ARMV8_PSCI exclusive.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
If we are running in EL2 skip PSCI implementation setup. This avoids an
exception if CONFIG_ARMV8_PSCI is set, but u-boot is started by TF-A.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
There are two different implementations to do a secure monitor call:
smc_call() and arm_smccc_smc(). The former is defined in fwcall.c and
seems to be an ad-hoc implementation. The latter is imported from linux.
smc_call() is also only available if CONFIG_ARMV8_PSCI is not defined.
This makes it impossible to have both PSCI calls and PSCI implementation
in one u-boot build. The layerscape SoC code decide at runtime via
check_psci() if there is a PSCI support. Therefore, this is a
prerequisite patch to add PSCI implementation support for the layerscape
SoCs.
Note, for the TFA part, this is only compile time tested with
(ls1028ardb_tfa_defconfig).
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
psci_update_dt() is also required if CONFIG_ARMV8_PSCI is set, that is,
if u-boot is the PSCI provider.
Guard the check which is intended to call into the PSCI implementation
in the secure firmware, by the proper macro SEC_FIRMWARE_ARMV8_PSCI.
Mark the function as weak because - unfortunately - there is already
a stub of the same function in arch/arm/mach-rmobile/psci-r8a779a0.c
which does not the same as the common one.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The impedance of the QSPI PCB lines on the sama7g5ek is 50 Ohms.
Align the output impedance of the QSPI0 HSIOs by setting a medium drive
strength which corresponds to an impedance of 56 Ohms when VDD is in the
3.0V - 3.6V range. The high drive strength setting corresponds to an
output impedance of 42 Ohms on the QSPI0 HSIOs.
This is just a fine tunning. The memory that we have populated on sama7g5ek
works fine even with high drive strength, but it's better to adjust it and
use medium instead, in case some other flashes with higher frequencies are
tested.
Suggested-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
QSPI1 used the clock of QSPI0, fix it.
Fixes: 5eecc37bb1 ("ARM: dts: at91: sama7g5: Add QSPI0 and OSPI1 nodes")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Use the spi_mem_default_supports_op() core helper in order to take into
account the buswidth specified by the user in device tree.
Fixes: 24c8ff4684 ("spi: Add Atmel QuadSPI driver")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
With the commit that moves the BOOTCOMMAND to Kconfig:
970bf8603b ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
some stray ifdefs have been left in the header files which
are now useless.
Clean up the include files to remove these lines.
Fixes: 970bf8603b ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This commit allows the ATMEL_PIT_TIMER driver to be unselected in SPL and be
selected in u-boot proper. The SPL can use a different timer.
By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL
decreases by 0.3 KBytes.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This commit allows the ATMEL_TCB driver to be unselected in SPL and be
selected in u-boot proper. The SPL can use a different timer.
By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL
decreases by 1 KByte.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This commit removes the default reset driver for armv7, since
it is no longer needed due to the presence of the SYSRESET driver.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
This commit adds a condition to the Makefile so that whenever the SYSRESET
option is chosen in the configuration, the default reset driver is ignored.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
As removal of nds32 has been ack'd for the Linux kernel, remove support
here as well.
Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
To quote the author:
The bootflow feature provide a built-in way for U-Boot to automatically
boot an Operating System without custom scripting and other customisation.
This is called 'standard boot' since it provides a standard way for
U-Boot to boot a distro, without scripting.
It introduces the following concepts:
- bootdev - a device which can hold a distro
- bootmeth - a method to scan a bootdev to find bootflows (owned by
U-Boot)
- bootflow - a description of how to boot (owned by the distro)
This series provides an implementation of these, enabled to scan for
bootflows from MMC, USB and Ethernet. It supports the existing distro
boot as well as the EFI loader flow (bootefi/bootmgr). It works
similiarly to the existing script-based approach, but is native to
U-Boot.
With this we can boot on a Raspberry Pi 3 with just one command:
bootflow scan -lb
which means to scan, listing (-l) each bootflow and trying to boot each
one (-b). The final patch shows this.
With a standard way to identify boot devices, booting become easier. It
also should be possible to support U-Boot scripts, for backwards
compatibility only.
...
The design is described in these two documents:
https://drive.google.com/file/d/1ggW0KJpUOR__vBkj3l61L2dav4ZkNC12/view?usp=sharinghttps://drive.google.com/file/d/1kTrflO9vvGlKp-ZH_jlgb9TY3WYG6FF9/view?usp=sharing
'make tests' fails on Ubuntu 22.04 with:
binman: ./tools/binman/binman:12: DeprecationWarning:
The distutils package is deprecated and slated for removal in Python 3.12.
Use setuptools or check PEP 632 for potential alternatives
from distutils.sysconfig import get_python_lib
./tools/binman/binman:12: DeprecationWarning:
The distutils.sysconfig module is deprecated, use sysconfig instead
from distutils.sysconfig import get_python_lib
<unittest.result.TestResult run=428 errors=0 failures=4>
AssertionError: 0 != 468
As we don't use Ubuntu 16.04 for our CI anymore drop the import.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
I ended up learning most of binman internals while trying to add a few
features to it, and I recently started reviewing binman series that
would not affect me personally. I'll keep working on it and try to do
more reviews.
Add myself as a maintainer for binman.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Acked-by: Tom Rini <trini@konsulko.com>
Binman interfaces allow attempts to replace any entry in the image with
arbitrary data. When trying to replace sections, the changes in the
section entry's data are not propagated to its child entries. This,
combined with how sections rebuild their contents from its children,
eventually causes the replaced contents to be silently overwritten by
rebuilt contents equivalent to the original data.
Add a simple test for replacing a section that is currently failing due
to this behaviour, and mark it as an expected failure. Also, raise an
error when replacing a section instead of silently pretending it was
replaced.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
A previous patch fixes binman to correctly extract FIT subentries. This
makes it easier to test replacing these entries as we can write tests
using an existing helper function that relies on extracting the replaced
entry.
Add tests that replace leaf entries in FIT subsections with data of
various sizes. Replacing the subsections or the whole FIT section does
not work yet due to the section contents being re-built from unreplaced
subentries' data.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When reading images from a file, each entry's data is read from its
parent section as specified in the Entry.Create() call that created it.
The FIT entry type has been creating its subentries under its parent
(their grandparent), as creating them under the FIT entry resulted in an
error until FIT was converted into a proper section.
FIT subentries have their offsets relative to the FIT section, and
reading those offsets in the parent section results in wrong data. The
subentries rightfully belong under the FIT entries, so create them
there. Add tests checking that we can extract the correct data for a FIT
entry and its subentries.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Binman FIT entry nodes describe their subentries in an 'images' subnode,
same as how they would be written for the mkimage executable. The entry
type initially manually managed its subentries keyed by their node paths
relative to its base node. It was later converted to a proper section
while still keeping the same keys for subentries.
These subentry keys of sections are used as path fragments, so they must
not contain the path separator character '/'. Otherwise, they won't be
addressable by binman extract/replace commands. Change these keys from
the '/images/foo' forms to the subentry node names. Extend the simple
FIT tests to check for this.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
When an image has the 'allow-repack' property, binman includes the
original offset and size properties from the image description in the
fdtmap. These are later used as the packing constraints when replacing
entries in an image, so other unconstrained entries can be freely
positioned.
Replacing an entry in an image without 'allow-repack' (and therefore the
original offsets) follows the same logic and results in entries being
merely concatenated. Instead, skip resetting the calculated offsets and
sizes to the missing originals for these images so that every entry is
constrained to its existing offset/size.
Add tests that replace an entry with smaller or equal-sized data, in an
image that doesn't allow repacking. Attempting to do so with bigger-size
data is already an error that is already being tested.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Binman entries can use other executables to compute their data, usually
in their ObtainContents() methods. Subclasses of Entry_section would use
bintools in their BuildSectionData() method instead, which is called
from several places including their Pack().
These binary tools are resolved correctly while building an image from a
device-tree description so that they can be used from these methods.
However, this is not being done when replacing entries in an image,
which can result in an error as the Pack() methods attempt to use them.
Collect and resolve entries' bintools also when replacing entries to fix
Pack() errors. Add a way to mock bintool usage in the testing entry type
and tests that check bintools are being resolved for such an entry.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Binman can embed a copy of the image description into the images it
builds as a fdtmap entry, but it omits the /binman/<image-name> prefix
from the node paths while doing so. When reading an already-built image
file, entries are reconstructed using this fdtmap and their associated
nodes still lack that prefix.
Some entries like fit and vblock create intermediate files whose names
are based on an entry unique name. This name is constructed from their
node's path by concatenating the parents with dots up to the binman
node, e.g. /binman/image/foo/bar becomes 'image.foo.bar'.
However, we don't have this /binman/image prefix when replacing entries
in such an image. The /foo/bar entry we read when doing so erroneously
has the unique name of '/.foo.bar', causing permission errors when the
entry attempts to create files based on that.
Fix the unique-name generation by stopping at the '/' node like how it
stops at the binman node. As the unique names are used as filenames, add
tests that check if they're safe to use as filenames.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We would like to use bootstd by default when EFI boot manager is not
enabled. But so far bootstd does not support all the of distro-boot
fetures. So for now, add an option to select this.
Signed-off-by: Simon Glass <sjg@chromium.org>
We need to create a disk image with a partition table and a DOS-format
filesystem containing a few files. Provide a fallback binary for CI since
it does not seem able to detect the loopback partitions.
Add this to a dm_init test so that it happens when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a set of combined tests for the bootdev, bootflow and bootmeth
commands, along with associated functionality.
Expand the sandbox console-recording limit so that these can work.
These tests rely on a filesystem script which is not yet added to the
Python tests. It is included here as a shell script.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootdev driver for USB host. It can use the distro boot mechanism to
locate a file, or any other available bootmeth.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootmeth driver which handles distro boot from a disk via a U-Boot
script, so we can boot a bootflow using this commonly used mechanism. This
is required by Armbian, for example.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is helpful to be able to try out bootstd on sandbox, using host files.
This is easier than using a block device, which must have a filesystem,
partition table, etc.
Add a new driver which provides this feature. For now it is not used in
tests, but it is likely to be useful.
Add notes in the devicetree also, but don't disturb the tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootmeth driver which handles EFI boot manager, using EFI_LOADER.
In effect, this provides the same functionality as the 'bootefi bootmgr'
command and shares the same code. But the interface into it is via a
bootmeth, so it does not require any special scripts, etc.
For now this requires the 'bootefi' command be enabled. Future work may
tidy this up so that it can be used without CONFIG_CMDLINE being enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some boot methods don't act on a single bootdev but instead do their own
thing. An example is EFI bootmgr which scan various devices using its own
logic. Add a bootdev to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootmeth driver which handles EFI boot, using EFI_LOADER.
In effect, this provides the same functionality as the 'bootefi' command
and shares the same code. But the interface into it is via a bootmeth,
so it does not require any special scripts, etc.
For now this requires the 'bootefi' command be enabled. Future work may
tidy this up so that it can be used without CONFIG_CMDLINE being enabled.
There was much discussion about whether this is needed, but it seems
that it is, at least for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootmeth driver which handles distro boot from a network device, so
we can boot a bootflow using this commonly used mechanism.
In effect, this provides the same functionality as the 'pxe' command
and shares the same code. But the interface into it is via a bootmeth.
For now this requires the 'pxe' command be enabled. Future work may tidy
this up so that it can be used without CONFIG_CMDLINE being enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootdev driver for MMC. It mostly just calls the bootdev helper
function.
Add a function to obtain the block device for an MMC controller.
Fix up the comment for mmc_get_blk_desc() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootmeth driver which handles distro boot from a disk, so we can
boot a bootflow using this commonly used mechanism.
In effect, this provides the same functionality as the 'sysboot' command
and shares the same code. But the interface into it is via a bootmeth.
For now this requires the 'pxe' command be enabled. Future work may tidy
this up so that it can be used without CONFIG_CMDLINE being enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a 'bootdev' command to handle listing and selection of bootdevs.
Disable standard boot for a few boards which otherwise run out of space.
Signed-off-by: Simon Glass <sjg@chromium.org>
A bootmeth is a method of locating an operating system. For now, just
add the uclass itself. Drivers for particular bootmeths are added later.
If no bootmeths devices are included in the devicetree, create them
automatically. This avoids the need for boilerplate in the devicetree
files.
Signed-off-by: Simon Glass <sjg@chromium.org>
A 'bootdev' is a device which can be used to boot an operating system.
It is a child of the media device (e.g. MMC) which handles reading files
from that device, such as a bootflow file.
Add a uclass for bootdev and the various helpers needed to make it
work. Also add a binding file, empty for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
The 'bootstd' device provides the central information about U-Boot
standard boot.
Add a uclass for bootstd and the various helpers needed to make it
work. Also add a binding file.
Signed-off-by: Simon Glass <sjg@chromium.org>
A bootflow encapsulates the process used to boot an operating system.
It typically has a control file (such as extlinux.conf) and information
about which 'bootdev' it came from.
Add the header file for this first, since it is needed by all other
files.
Signed-off-by: Simon Glass <sjg@chromium.org>
When sandbox is used with hostfs we won't have a block device, but still
must set up the filesystem type before any filesystem operation, such as
loading a file. Add a function to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The bootflow tests need to use an MMC with an associated backing file
containing a filesystem. Update the fastboot tests to cope with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases two devices are related and the only way to tell is to
check that the names partially patch. Add a way to check this without
needing to create a new string for the comparison.
Fix the comment for device_find_child_by_namelen() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
It seems that namelen is more common in U-Boot. Rename this function to
fit in better. Also fix a bug where it breaks the operation of
uclass_get_by_name() and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reported-by: Tim Harvey <tharvey@gateworks.com>
At present it is not possible to find out which part of the string is the
number part and which is before it. Add a new variant which provides this
feature, so we can separate the two in the caller.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this has a minor bug in that it reads the byte before the
start of the string, if it is empty. Also it doesn't handle a
non-numeric prefix which is only one character long.
Fix these bugs with a reworked implementation. Add a test for the second
case. The first one is hard to test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tweak a few comments to kep sphinx happy, in case we want to include this
file one day.
Also fix the 'exxamine' typo.
Patch-notes:
This uses:
sed -i 's/@param \(\S*\)\s*/@\1: /' include/vsprintf.h
to convert the @param to the new format.
Signed-off-by: Simon Glass <sjg@chromium.org>
Prepare to use ADC channel 1 to check the hardware revision of the board:
- add u-boot dts include with saradc node
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220424082159.757622-6-adeep@lexina.in
Add support for the SARADC variant found on the AXG SoCs family.
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220424082159.757622-5-adeep@lexina.in
Update the clk-g12a-ao driver from "axg" to "g12a"
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220424082159.757622-3-adeep@lexina.in
Add minimal driver AO clocks on meson AXG family. Only ADC related clocks
are supported.
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220424082159.757622-2-adeep@lexina.in
There is a Kconfig for this erratum, but it is ignored for armv8.
Respect it.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
On Layerscape platforms, the DTB is loaded from boot filesystem,
per the fdt_addr description in doc/README.distro, it must be
removed.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This is a follow-up patch for my "disk: don't compile in partition
support for spl/tpl if not really necessary".
"part" command is useful only if, at least, one of partition table types
is selected. So it should have a dependency on PARTITIONS which is now
automatically selected if one of partition table types is enabled.
With this change, *_defconfig which explicitly selects CMD_PART but
has no partition table types enabled should also be fixed.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Documentation:
* Document image size parameter of bootefi command
UEFI:
* avoid building partition support in SPL/TPL where not required
* improve integration of EFI subsystem and driver model
* restore ability to boot arbitrary blob
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Merge tag 'efi-2022-07-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc1-3
Documentation:
* Document image size parameter of bootefi command
UEFI:
* avoid building partition support in SPL/TPL where not required
* improve integration of EFI subsystem and driver model
* restore ability to boot arbitrary blob
In most of all cases, we can avoid using blk_desc which is expected
to be private to udevice(UCLASS_BLK), that is, the data should not
be manipulated outside the device driver unless really needed.
Now efi_disk's internally use dev_read/write() interfaces
if CONFIG_PARTITIONS is enabled.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
In include/blk.h, Simon suggested:
===>
/*
* These functions should take struct udevice instead of struct blk_desc,
* but this is convenient for migration to driver model. Add a 'd' prefix
* to the function operations, so that blk_read(), etc. can be reserved for
* functions with the correct arguments.
*/
unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
lbaint_t blkcnt, void *buffer);
unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
lbaint_t blkcnt, const void *buffer);
unsigned long blk_derase(struct blk_desc *block_dev, lbaint_t start,
lbaint_t blkcnt);
<===
So new interfaces are provided with this patch.
They are expected to be used everywhere in U-Boot at the end.
The exceptions are block device drivers, partition drivers and efi_disk
which should know details of blk_desc structure.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
When we create an efi_disk device with an UEFI application using driver
binding protocol, the 'efi_driver' framework tries to create
a corresponding block device(UCLASS_BLK/IF_TYPE_EFI). This will lead to
calling a PROBE callback, efi_disk_probe().
In this case, however, we don't need to create another "efi_disk" device
as we already have this device instance.
So we should avoid recursively invoke further processing in the callback
function.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function is expected to be called, in particular from dm's pre_remove
hook, when associated block devices no longer exist.
Add efi_disk_remove() function.
This function removes an efi_disk object for a raw disk device (UCLASS_BLK)
and related objects for its partitions (UCLASS_PARTITION).
So this function is expected to be called through driver model's "remove"
interface every time a raw disk device is to be disconnected.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
When we create an efi_disk device with an UEFI application using driver
binding protocol, the 'efi_driver' framework tries to create
a corresponding block device(UCLASS_BLK/IF_TYPE_EFI). This will lead to
calling a PROBE callback, efi_disk_probe().
In this case, however, we don't need to create another "efi_disk" device
as we already have this device instance.
So we should avoid recursively invoke further processing in the callback
function.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add efi_disk_probe() function.
This function creates an efi_disk object for a raw disk device (UCLASS_BLK)
and additional objects for related partitions (UCLASS_PARTITION).
So this function is expected to be called through driver model's "probe"
interface every time one raw disk device is detected and activated.
We assume that partition devices (UCLASS_PARTITION) have been created
when this function is invoked.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In the next commit, CONFIG_EFI_SETUP_EARLY will become mandated
in order to support dynamic enumeration of efi_disk objects.
This can, however, be problematic particularly in case of file-based
variable storage (efi_variable.c, default).
Non-volatile variables are to be restored from EFI system partition
by efi_init_variables() in efi_init_obj_list(). When efi_init_obj_list()
is called in board_init_r(), we don't know yet what disk devices
we have since none of device probing commands (say, scsi rescan) has not
been executed at that stage.
So in this commit, a preparatory change is made; efi_init_obj_list() is
broken into the two functions;
* efi_init_early(), and
* new efi_init_obj_list()
Only efi_init_early() will be called in board_init_r(), which allows
us to execute any of device probing commands, either though "preboot"
variable or normal command line, before calling efi_init_obj_list() which
is to be invoked at the first execution of an efi-related command
(or at efi_launch_capsules()) as used to be.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Now that all the block device drivers have enable a probe hook, we will
call part_create_block_devices() to enumerate all the partitions and
create associated udevices when a block device is detected.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
NOTE: probably we have to update config dependencies,
in particular, SPL/TPL_PRINTF?
With this new function, UCLASS_PARTITION devices will be created as
child nodes of UCLASS_BLK device.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
The new test covers all tag-related interfaces.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some basic stuff about tag support is explained under
doc/devlop/driver-model.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
ENOMEM is a more common error code for memory starvation.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
U-Boot menu framework(common/menu.c) returns 1 if it is successful,
returns negative value if it fails.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Under the current Kconfigs, disk/part.c will be compiled in even if none of
partition table types are enabled. This will lead to the size growth of SPL
/TPL code.
With this patch, CONFIG_PARTITIONS is selected only if, at least, one of
CONFIG_*_PARTITION is enabled.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Now we can build efi_loader with block device support (CONFIG_BLK) and
without CONFIG_PARTITIONS.
So change Makefile.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In the current implementation, partition table support (either GPT or DOS)
is not mandatory. So CONFIG_PARTITION_UUIDS should not be enabled
(selected) unconditionally.
Fixes: commit 17f8cda505e3 ("efi_loader: set partition GUID in device path for SIG_TYPE_GUID")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since host_get_dev_errr() is defined in drivers/block/sandbox.c,
the associated function prototype should be in a more appropriate
header file.
Fixes: commit 4101f6879256 ("dm: Drop the block_dev_desc_t typedef")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Some defconfig enables CMD_PART even if none of any partition table
types (CONFIG_*_PARTITION) are enabled.
This will lead to the size growth in SPL/TPL code since disk/part.c
will be compiled in any way.
We will change disk/Kconfig later so that CONFIG_PARTITIONS is only
enabled when, at least, one of CONFIG_*_PARTITION is enabled.
To make the build work (in particular, "part" command) correctly,
a few functions should be defined as void functions in case of
!CONFIG_PARTITIONS.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Since CONFIG_[SPL|TPL]_PARTITIONS were introduced, part.h has not been
updated. Due to this, while the build won't fail, some functionality may
possibly break as some partition-related functions are nullified even
though some partition table types are enabled for SPL/TPL.
Fixes: commit 88ca8e26958b ("disk: Add an option for partitions in SPL")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Some errno numbers are used in defining inline functions.
So "errno.h" should be explicitly included to avoid possible build errors.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
A image_size parameter has been added to the bootefi parameter.
Describe all parameters.
Correct how the description of how the device-path in the loaded
image protocol is determined.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Up until commit 5f59518a7b1ae ("efi_loader: setting boot device"), we
could boot an arbitrary blob with bootefi. Indeed, efi_run_image() even
has a special case for missing device paths indicating a payload that
was directly loaded via JTAG, for example.
Restore the ability to inject a UEFI payload into memory and `bootefi`
it. If the address passed isn't the last PE-COFF loaded, then we'll
wipe out the pre-existing DP/Image information and let efi_run_image()
synthesize a memory device path.
An image size is required if we're booting an arbitrary payload, and
the FDT argument has been changed to accept `-`. The size could be
deduced from the image header, but it's required anyways as an explicit
acknowledgment that one's trying to boot an arbitrary payload rather
than accidentally using the wrong address in the single-addr form.
Fixes: 5f59518a7b1a ("efi_loader: setting boot device")
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
- Add "-q" to fdt addr and use it in distro_bootcmd to make the user
experience less scary reading in normal try/fail cases.
- Let the adc update an environment variable like many other commands do
- Fix TPL SEPARATE_BSS check when locating DTB
- Allow ":" in PXE file names again
- Two Apple M1 fixes
Unless you have a spare Apple Silicon machine, getting access to
the serial port on Apple Silicon machines requires special
hardware. Given that most machines come with a built-in screen
the framebuffer is likely to be the most convenient output device
for most users. While U-Boot will output to both serial and
framebuffer, OSes might not. Therefore set stdout-path to point
at /chosen/framebuffer when a keyboard is connected to the machine.
This behaviour can be overridden by setting the "stdout" variable
in the U-Boot environment. I addition to that keep the serial
console as the default when running under the m1n1 hypervisor.
The m1n1 hypervisor virtualizes the serial port such that it
can be easily accessed from any other machine with a USB port.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Janne Grunau <j@jannau.net>
Tested-by: Janne Grunau <j@jannau.net>
Enable CONFIG_NO_FB_CLEAR to preserve the Asahi logo. Since that
logo is drawn on a black background also enable
CONFIG_SYS_WHITE_ON_BLACK such that text printed by U-Boot is still
visible.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
- U-boot's PXE flow supports prefixing your bootfile name with an
IP address to fetch from a server other than the DHCP server,
e.g. `hostIPaddr:bootfilename`:
a93907c43f
- However, this breaks bootfile paths which contain a colon, e.g.
`f0:ad:4e:10:1b:87/7/pxelinux.cfg/default`
- This patch checks whether the `hostIPaddr` prefix is a valid
IP address before overriding the serverIP otherwise the whole
bootfile path is preserved
Signed-off-by: Lyle Franklin <lylejfranklin@gmail.com>
distro_bootcmd uses this construct a few times to test $fdt_addr_r,
and fall back on $fdtcontroladdr if not set/invalid:
if fdt addr ${fdt_addr_r}; then
...
else
...
fi
If the `fdt addr` test fails, it prints the following message on the
console, suggesting there is an error when there is not:
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
To remove this potentially confusing error message, this patch adds -q
as a 'quiet' option for fdt addr, and uses this flag in
config_distro_bootcmd.h
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Add the ability to save ADC conversion result in an environment
variable. This is useful for further arbitrary processing by the
U-Boot scripts.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Commit 690af71850149bf242502f688eca80fb302d1f76 changed this condition
from an explicit
IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)
to
CONFIG_IS_ENABLED(SEPARATE_BSS)
The documentation for CONFIG_IS_ENABLED() in include/linux/kconfig.h
implies that we will get the correct behaviour, but the actual behaviour
differs such that this condition is now always false.
This stopped TPL being able to load the device tree blob at least on the
ROCKPro64 board (RK3399 SoC), since the wrong device tree location was
chosen.
The issues causing this behaviour with CONFIG_IS_ENABLED() are:
1. The documentation implies that CONFIG_SPL_BUILD =>
CONFIG_SPL_<option> is considered before the TPL equivalent.
Actually, the TPL options have higher priority - see definition of
_CONFIG_PREFIX.
2. The documentation implies a fallthrough, eg. if CONFIG_SPL_BUILD is
defined but the CONFIG_SPL_<option> is not, then it will proceed to
check if CONFIG_TPL_BUILD
Actually, if CONFIG_TPL_BUILD is defined, then it stops there
and CONFIG_SPL_BUILD is not considered - see definition of
_CONFIG_PREFIX.
During TPL build, at least for the ROCKPro64, both CONFIG_TPL_BUILD
and CONFIG_SPL_BUILD are defined, but because of the above, only TPL
options are considered. Since there is no CONFIG_TPL_SEPARATE_BSS,
this fails.
Fixes: 690af71850 ("fdt: Correct condition for SEPARATE_BSS")
Signed-off-by: Andrew Abbott <andrew@mirx.dev>
If dev_count_phandle_with_args returns 0 or another error, then pd will never
have been initialized by power_domain_get_by_index. Avoid comparing against
pd.dev in this situation.
Fixes: 3e4fcfa4bc ("power-domain: fix hang in endless loop on i.MX8")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
When usb3-phy label is found, PHY driver is called and serdes line is
initialized. This is preparation for serdes/psgtr driver to configure GT
lines based on description in DT.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Allow to disable PHY driver in SPL because it checks the CONFIG_SPL_PHY
variable for SPL builds.
The same change was done for usb by commit fd09c205fc57 ("usb:
s/CONFIG_DM_USB/CONFIG_IS_ENABLED(DM_USB)/").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add watchdog controller driver for NPCM7xx/npcm8xx
the wdt design of npcm750 and npcm845 is the same.
so the driver can work on npcm750 and npcm845.
about npcm845 wdt dtsi i will followed kernel dts name
to use nuvoton,npcm750-wdt.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds simple documentation about common properties for watchdog
in the device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Stefan Roese <sr@denx.de>
- Fix SPL_SYS_MALLOC_SIMPLE and non-SPL_FRAMEWORK boards (a large number
of PowerPC platforms)
- Remove duplication of crc16 functionality
- Migrate COUNTER_FREQUENCY to CONFIG_COUNTER_FREQUENCY and have it in
Kconfig
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enough space to load kernel images bigger than 32MB change the
variables to a feasible value.
The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".
The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In arch/arm/mach-imx/imx8m/soc.c there's an implementation of
board_fix_fdt() introduced by commit 35bb60787b88. Remove the
redundant one to avoid failed to build from source when enabling
CONFIG_OF_BOARD_FIXUP.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Since COUNTER_FREQUENCY is obselete, so set cntfrq_el0 if
CONFIG_COUNTER_FREQUENCY is valid
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Set CONFIG_COUNTER_FREQUENCY according to COUNTER_FREQUENCY in
config header file.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
[trini: Re-run migration]
Set default COUNTER_FREQUENCY according to config header file
under include/configs/
i.MX6UL/ULL/7D/8QM/8QXP all has system counter frequency run at 8MHz,
so set default value for them.
SUNXI/EXYNOS/ROCKCHIP_RK3128/ROCKCHIP_RK3288/ROCKCHIP_RK322X/ROCKCHIP_RK3036
at 24MHz. ARCH_LX2160A at 25MHz
ARCH_ZYNQMP at 100MHz
Since versal has CONFIG_COUNTER_FREQUENCY, so use it. And
COUNTER_FREQUENCY will be dropped.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
ATSHA204A uses bit-reversed checksum of standard CRC-16 with polynomial
x^16 + x^15 + x^2 + 1.
This ATSHA204A specific checksum can be calculated just by using common
U-Boot functions bitrev16() and crc16().
So replace custom driver CRC-16 implementation by common U-Boot functions.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Implementation in linux/crc16.h provides standard CRC-16 algorithm with
polynomial x^16 + x^15 + x^2 + 1. Use it and remove duplicate ext4 CRC-16
specific code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
File fs/ubifs/crc16.h is standard linux's crc16.h include file. So move it
from fs/ubifs to include/linux where are also other linux include files.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
U-Boot CRC-16 implementation uses polynomial x^16 + x^12 + x^5 + 1 which is
not standard CRC-16 algorithm, but it is known as CRC-16-CCITT. Rename file
crc16.c to crc16-ccitt.c to reduce confusion.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
On P2020 board is SPL malloc simple always failing with error and loops:
SD boot...
alloc space exhausted
Bad trap at PC: f8f8b5f0, SR: 21200, vector=d00
NIP: 00000000 XER: 00000000 LR: 00000000 REGS: f8f8b5f0 TRAP: 20000000 DAR: 00000000
MSR: 00021200 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00
GPR00: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
GPR08: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
GPR24: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
Call backtrace:
Exception in kernel pc f8f8b5f0 signal 0
Inspection showed that gd->malloc_limit is zero. And it is because
generally SPL_FRAMEWORK initialize SPL's gd->malloc_limit. But when
SPL_FRAMEWORK is not enabled then in most cases nobody initialize
gd->malloc_limit and so SPL malloc simple does not work.
So disable SPL_SYS_MALLOC_SIMPLE by default when SPL_FRAMEWORK is not
enabled. SPL_SYS_MALLOC_SIMPLE can be disabled only by setting
SPL_SYS_MALLOC_F_LEN to zero. So do it.
This change fixes SPL error "alloc space exhausted" on P2020 board.
Signed-off-by: Pali Rohár <pali@kernel.org>
- For the environment, add a arch_env_get_location hook and make use of
it on some NXP platforms (so that boards can override SoCs).
- Remove some unused squashfs code from SPL
- Resync am335x beaglebone related DTS files
- Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used
Fix wrong environment.h and remove DECLARE_GLOBAL_DATA_PTR
Fixes: 30e39ac7c9 (imx: imx7 Support for Manufacturing Protection)
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Update the Kconfig and Makefile to allow build for iMX8M and
restrict the build only in u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
The imx8mn_evk target have been converted to use binman.
With the binman approach the ATF load address is described via
devicetree, so remove the now unneeded instruction of exporting
ATF_LOAD_ADDR.
Signed-off-by: Fabio Estevam <festevam@denx.de>
There is no reason for disabling I-cache and D-cache
in SPL.
Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Enable DM_SERIAL for both U_Boot and the SPL. The uart4 and its pinmux
are already marked with u-boot,dm-spl but we need to move the call to
preloader_console_init() after spl_init() to avoid a board hang
as dm can't be used until after spl_init().
Remove the manual config of the UART pinmux now that it is no longer
needed.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Add support for OF-LIST to common imx8mp-u-boot.dtsi so that it can
be used with boards that have multiple DTB's.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
move the preloader_console_init() call after spl_init() to
avoid board hang
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
move the preloader_console_init() call after spl_early_init() to
avoid board hang
Signed-off-by: Peng Fan <peng.fan@nxp.com>
CONFIG_MMCROOT is only used to set mmcroot, no need a dedicated macro.
Script as below
"
for i in `ls include/configs/*.h`
do
mmcroot=`sed -n '/define.*MMCROOT/ p' $i | awk -F\" '{ print $2;}'`
if [ ! -n "$mmcroot" ]; then
continue
fi
sed -i '/define.*MMCROOT/ d' $i
sed -i 's,\" CONFIG_MMCROOT \",'$mmcroot',g' $i
done
"
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
The Sancloud BeagleBone Enhanced Extended WiFi (BBE Extended WiFi) has
its own devicetree file and the board can be identified by the 2nd
letter of the config string within the common EEPROM.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
The Sancloud BeagleBone Enhanced Lite (BBE Lite) has its own devicetree
file and the board can be identified by the 2nd letter of the config
string within the common EEPROM.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Sync BeagleBone dts files & TPS dtsi files with Linux v5.17 and include
the SanCloud BBE Extended WiFi dts added in v5.18-rc1. Also pull in
changes to am33xx-l4.dtsi needed to support the BeagleBone Blue.
The change to use the cpsw switch driver (commit c477358e66a3 in Linux)
is excluded from the sync as u-boot does not recognise the new
compatible string.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Implement arch_env_get_location() instead of env_get_location(), so that
the env_get_location() can be implemented on board level and override the
arch_env_get_location() architecture defaults.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Adam Ford <aford173@gmail.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tommaso Merciai <tomm.merciai@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
Implement arch_env_get_location() instead of env_get_location(), so that
the env_get_location() can be implemented on board level and override the
arch_env_get_location() architecture defaults.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Adam Ford <aford173@gmail.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tommaso Merciai <tomm.merciai@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
Currently there is only one way to override desired environment location,
by implementing env_get_location(). This is increasingly being conflated
both on board level and architecture level, which leads to a problem on
boards where this function is already implemented on architecture level,
since those boards have no way to override this environment location on
board level anymore.
Implement arch_env_get_location() function which is architecture specific
and should only ever be implemented in architecture code. This function
has lower priority than env_get_location(), which should only ever be
implemented in board code, and which overrides the arch_env_get_location()
architecture environment selection.
This way, architecture can define its default environment chooser, while
board can now override it as needed at all times.
There is no functional change, since env_get_location() simply returns
arch_env_get_location(), and arch_env_get_location() implements the
current env_get_location() default content.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Adam Ford <aford173@gmail.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tommaso Merciai <tomm.merciai@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-By: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The 4 GiB boundary is at 0xffffffff+1 , not at 0x80000000, fix this.
The PHYS_SDRAM of i.MX8M is at 0x40000000 , so to restrict ram_top
below 4 GiB, the ram_top has to be set to 0xffffffff as it is not
an offset from the start of PHYS_SDRAM, but rather a physical address
marking the topmost allowed DRAM address.
Fixes: e27bddff4b9 ("imx8m: Restrict usable memory to space below 4G boundary")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
This GPIO is actually an input "Q7_3V3_PCIE_WAKE#_IN" not an output, so
remove the misleaading and incorrect definition.
Cc: Tim Harvey <tharvey@gateworks.com> (re: pci: imx: use vpcie-supply if defined by device-tree)
Signed-off-by: Ian Ray <ian.ray@ge.com>
There are no users of the imx6_pcie_toggle_power and imx6_pcie_toggle_reset
weak overrides and as these functions are able to be handled now via dt
properties lets remove these.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
If vpcie-supply is defined by device-tree use that if
CONFIG_PCIE_IMX_POWER_GPIO is not defined.
Note that after this the following boards which define
CONFIG_PCIE_IMX_POWER_GPIO in their board header file as well as their
device-tree should be able to remove CONFIG_PCIE_IMX_PERST_GPIO without
consequence:
- mx6sabresd
- mx6sxsabresd
- novena
Note that the ge_bx50v3 board uses CONFIG_PCIE_IMX_POWER_GPIO and does
not have vpcie-supply defined in it's pcie node in the dt thus removing
CONFIG_PCIE_IMX_POWER_GPIO globally can't be done until that board adds
vpcie-supply.
Cc: Ian Ray <ian.ray@ge.com> (maintainer:GE BX50V3 BOARD)
Cc: Sebastian Reichel <sebastian.reichel@collabora.com> (maintainer:GE BX50V3 BOARD)
Cc: Fabio Estevam <festevam@gmail.com> (maintainer:MX6SABRESD BOARD)
Cc: Marek Vasut <marex@denx.de> (maintainer:NOVENA BOARD)
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The Globalscale Technologies Sheevaplug board has the network chip
Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310
driver to bring up Ethernet.
- Remove CONFIG_RESET_PHY_R symbol from all board files
- Use uclass mvgbe to bring up the network. And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/sheevaplug/sheevaplug.h, use BIT macro, and add/cleanup
comments.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
The Colibri PXA270 has been end-of-life since quite a while and would
require more and more maintenance (e.g. DM conversions).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)
Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Gateworks produces many products from a single PCB with subloaded
components. Add an additional two levels of dtb name matching so that
for example a GW7400-A matches the dtb name of gw74xx.dtb
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Use the common GSC driver.
This allows us to do some additional cleanup:
- use the GSC driver functions
- move waiting for the EEPROM to the SPL int (it will always be ready
after this)
- move eeprom functions into eeprom file and elimate GSC_I2C_BUS
- eliminate some redundant EEPROM reads (the EEPROM must be read in
SPL before relocation, in SPL after relocation, and in U-Boot init.
All subsequent uses can use the global structure)
- remove unnecessary header files and alphabatize includes
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy
due to part availability. Add support for it:
- increase post-reset time to 300ms per datasheet
- add tx-delay/rx-delay config
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add gpio hog support for board-specific gpio lines:
- put hogs in u-boot.dtsi so as to keep the regular dts files
in sync with the kernel. The hogs will not be put in the kernel
as that makes them un-usable by userspace as well as
re-initializes them to dt defaults overriding changes which may
have been done by bootloader commands.
- specify gpio names and initial config
- enable GPIO_HOG
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Use the common GSC driver.
This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Enable USB support for host controller and various USB ethernet
devices.
Example usage of USB Mass Storage (UMS) support:
u-boot=> mmc list
FSL_SDHC: 0
FSL_SDHC: 1
FSL_SDHC: 2 (eMMC)
u-boot=> ums 0 mmc 2
UMS: LUN 0, dev mmc 2, hwpart 0, sector 0x0, count 0xe30000
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Use PREBOOT as well. This allows a customer to just set fdt_board as
on any other module to customize the device tree for his carrier
board.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Drop optional support for the ancient Apalis iMX6 V1.0 hardware which
had the UART wired as DCE rather than DTE.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This fixes the following crash when run on a Colibri iMX7S aka solo:
Colibri iMX7 # usb start
starting USB...
Bus usb@30b10000: USB EHCI 1.00
Bus usb@30b20000:
The i.MX 7Solo has only one single USB OTG1 but no USB host port. Trying
to initialize the nonexisting port just crashes.
While at it also drop board_usb_phy_mode() which is also no longer used
in the driver model age.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
In case a customer wants to set fdtfile currently preboot overrides it
always with preboot just before the bootdelay. Use test -n to check
if fdtfile is already set and only set it if nothing got touched manually
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
For recovery purpose allow booting via SDP over USB as well.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add missing support of FIT-images and enable a verbosity for
this feature.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Drop legacy nfsboot script in favor of distroboot DHCP boot.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Use the same name of DHCP Distroboot script as in regular eMMC case.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
As video support is very specific depending on the exact display
customisation we decided to disable video support for all out modules
by default.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Drop Apalis iMX8X platform as it never left sample state and is no
longer supported.
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add DT bindings for a subset of GPCv2 which handles USB and PCIe PDs,
HSIOMIX PD controller and missing USB PD properties. This is required
to bring up the DWC3 USB controller up.
This is based on linux next and patches which are still pending
review, but which are likely going to be part of Linux 5.19:
b2d67d7bdf74 ("arm64: dts: imx8mp: disable usb3_phy1")
290918c72a29 ("arm64: dts: imx8mp: Add memory for USB3 glue layer to usb3 nodes")
https://www.spinics.net/lists/arm-kernel/msg958501.html
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The i.MX8MP glue needs to be configured based on a couple of DT
properties, implement .glue_configure callback to parse those DT
properties and configure the glue accordingly.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Angus Ainslie <angus@akkea.ca>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Rename the select_dr_mode callback to glue_configure, the callback is
used for more than enforcing controller mode even on the TI chips, so
change the name to a more generic one. No functional change.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Angus Ainslie <angus@akkea.ca>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible
for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe
in the correct order. Currently supported is the USB 3.0 part which
can be tested, PCIe support should be easy to add.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Add i.MX8MP power domain handling into the driver. This is based on the
Linux GPCv2 driver state which is soon to be in Linux next.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Implement power_domain_get_by_name() convenience function which parses
DT property 'power-domain-names' and looks up power domain by matching
name.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Simon Glass <sjg@chromium.org>
This driver is the only SMCCC dependency in iMX8M U-Boot port. Rework
the driver based on Linux GPCv2 driver to directly control the GPCv2
block instead of using SMCCC calls. This way, U-Boot can operate the
i.MX8M power domains without depending on anything else.
This is losely based on Linux GPCv2 driver. The GPU, VPU, MIPI power
domains are not supported to save space, since they are not useful in
the bootloader. The only domains kept are ones for HSIO, PCIe, USB.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-defconfig
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The arch/arm/include/asm/arch-imx8m/power-domain.h is not included
anywhere except in drivers/power/domain/imx8m-power-domain.c, just
inline the content and drop the header. No functional change.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-defconfig
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
In case the power domain node structure is gpc@303a0000/pgc/power-domain@N,
do not bind power domain driver to the 'pgc' node, but rather descend into
it and only bind power domain drivers to power-domain@N subnodes. This way
we do not waste one useless driver instance associated with 'pgc' node.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-defconfig
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
In case the ops is not implemented, return 0 in the core right away.
This is better than having multiple copies of functions which just
return 0 in each power domain driver. Drop all those empty functions.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Simon Glass <sjg@chromium.org>
The div loop uses reassign and reuse parent_rate, which causes
the parent rate reference to be wrong after the first loop, the
resulting clock becomes incorrect for div != 1.
Fixes: 829e06bf4175 ("imx8ulp: clock: Add MIPI DSI clock and DCNano clock")
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
DT node name should be generic, therefore rename atsha204a@64 to crypto@64.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Turris Omnia uses first MAC address from OTP for second ethernet interface.
Second MAC address for third interface and third MAC address for first
interface.
Other Turris routers do not have this rotate by one mapping. So add
function parameter for specifying id of the first ethernet interface.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Atsha device is used prior relocation and at this early stage BSS does not
have to be ready yet. So do not cache Atsha device in BSS.
Fixes support for other Turris routers.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
OTP code is not Atsha generic but also it is not Omnia specific. It is
common for all Turris routers which use Atsha cryptochip for storing OTP.
So move this common Turris specific Atsha OTP code from Turris Omnia into
separate file. It will be used also by other Turris routers.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Implement write support for Security OTP values via mailbox API commands
MBOX_CMD_OTP_WRITE_32B and MBOX_CMD_OTP_WRITE.
Write support for North and South Bridge OTPs are not implemented as these
OTPs are already burned in factory with some data.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
U-Boot SPL is on 32-bit mvebu executed by the BootROM. And BootROM expects
that U-Boot SPL returns execution back to the BootROM. Vectors during
execution of U-Boot SPL should not be changed as BootROM does not expect it
and uses its own vectors. So do not overwrite vectors in SPL build.
Signed-off-by: Pali Rohár <pali@kernel.org>
fstat()'s st_size works only for regular files. lseek() with SEEK_END works
also for block or MTD devices. This replacement allows kwboot to load
kwbimage from /dev/mtd0 for booting another device over /dev/ttyS0.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse
is used for secure boot and each line is 64 bits long + 1 lock bit. LD
eFuse lines are 256 bits long + 1 lock bit. LD 0 line is reserved for
Marvell Internal Use and LD 1 line is for General Purpose Data. U-Boot
already contains HD eFuse reading and programming support.
This patch implements LD eFuse reading support. LD 0 line is mapped to
U-Boot fuse bank 64 and LD 1 line to fuse bank 65.
LD 0 Marvell Internal Use line seems that was burned in factory with some
data and can be read by U-Boot fuse command:
=> fuse read 64 0 9
LD 1 General Purpose Data line is by default empty and can be read by
U-Boot fuse command:
=> fuse read 65 0 9
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Update the current uDPU defconfig with following changes:
* Disable CONFIG_SPI_BOOT, its not needed for booting and the device boots
from eMMC anyway.
* Disable CONFIG_SYS_CONSOLE_INFO_QUIET, there is no need to diverge from
other boards by not priting the console device
* Enable CONFIG_CMD_MTD in order to allow use of the MTD tool
* Disable CONFIG_CMD_MTDPARTS, with MTD now being able to parse partitions
from DTS there is no need for it, the default MTDPARTS were incorrect
anyway
* Enable CONFIG_MMC_HS200_SUPPORT, the eMMC used support both HS200 and
HS400 modes, so enable at least HS200 because Xenon driver does not
support HS400 currently
* Replace CONFIG_SPI_FLASH_BAR with CONFIG_SPI_FLASH_SFDP_SUPPORT
Utilize SFDP parsing instead of relying on the extended address registers
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
uDPU is a bit of a specific device in that it does not have any copper
ports nor any ethernet PHY-s but 2 SFP ports.
This is an issue since MVNETA requires a PHY phandle or a fixed-link to
be defined under its node.
Since U-boot has no SFP support this is reasonable in order to know how
to configure the MAC.
However this also means that networking does not work on uDPU at all
currently, and fails with:
uDPU>> dhcp
Could not get PHY for neta@30000: addr 0
phy_connect failed
Could not get PHY for neta@40000: addr 1
phy_connect failed
So, to provide working networking using only SFP-s let add the fixed-link
at 1G which is much more common than 2.5G SFP-s as well as disable the
TX_DISABLE pins like done on Armada 7040 and 8040 platforms.
Since uDPU is not using any of the GPIO-s on the SB controller for any
purpose other than GPIO, a call to the pinctrl must be made in order for
it to get probed and thus register the SB GPIO bank, otherwise SB GPIO-s
are not registered at all.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Add support for handling SFP TX disable for MVNETA in the same fashion as
to what MVPP2 is doing in order to enable using SFP-s.
This allows using ethernet on SFP only boards.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
It is not possible for the A53 core (on which U-Boot is running) to read it
directly. For this purpose Marvell defined mbox API for sending OTP
commands between CM3 and A53 cores.
Implement these Marvell fuse reading mbox commands via U-Boot fuse API.
Banks 0-43 are used for accessing Security OTP (44 rows with 67 bits via 44
banks and words 0-2).
Note that of the 67 bits, the 3 upper bits are: 1 lock bit and 2
auxiliary bits (meant for testing during the manufacture of the SOC, as
I understand it).
Also note that the lock bit and the auxiliary bits are not readable
via Marvell commands.
With CZ.NIC's commands the lock bit is readable.
Write support is not implemented yet.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Allow to specify input parameters, define all available mbox commands
supported by CZ.NIC's secure firmware and also Marvell's fuse.bin firmware
and fix parsing response from Marvell OTP commands.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Generic A3720 mbox code is currently in Turris Mox specific board file
board/CZ.NIC/turris_mox/mox_sp.c. Move it to board independent arch file
arch/arm/mach-mvebu/armada3700/mbox.c.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Allow to read OTP bits via U-Boot fuse command on all Armada 3720 boards.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Implement reading NB and SB fuses of Armada 37xx SOC via U-Boot fuse API.
Banks 0-43 are reserved for accessing Security OTP (not implemented yet).
Bank 44 is used for accessing North Bridge OTP (69 bits via words 0-2).
Bank 45 is used for accessing South Bridge OTP (97 bits via words 0-3).
Write support is not implemented yet because it looks like that both North
and South Bridge OTPs are already burned in factory with some data. The
meaning of some bits of North Bridge is documented in WTMI source code.
The meaning of bits in South Bridge is unknown.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
When storing the UBoot Environment in for example EXT4,
the U-Boot build is broken for several reasons:
1. armada-385-turris-omnia-u-boot.dtsi will not allow
CONFIG_ENV_OFFSET and CONFIG_ENV_SIZE to be undefined
2. armada-37xx/board.c ft_board_setup function does not
exist if CONFIG_ENV_IS_IN_SPI_FLASH is not defined
This commit changes these files so that selecting a
different location for the environment is possible.
Signed-off-by: Rogier Stam <rogier@unrailed.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
There are two tools for sending images over UART to Marvell SoCs: kwboot
and mrvl_uart.sh. kwboot received lot of new features and improvements in
last few months. There is no need to maintain two tools in U-Boot, so
remove old mrvl_uart.sh tool.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
- Two TI K3 updates, update SYS_MALLOC_F_LEN default to be 0x2000 and
move TI am33xx to use that as well, fix DT relocation with multiple
DRAM banks, and add a gpio read sub-command.
As explained in commit 4af2a33ee5b9 ("cmd: gpio: Make `gpio input`
return pin value again") the `gpio input` is used in scripts to obtain
the value of a pin, despite the fact that CMD_RET_FAILURE is
indistinguishable from a valid pin value.
To be able to detect failures and properly use the value of a GPIO in
scripts we introduce the `gpio read` command that sets the variable
`name` to the value of the pin. Return code of the `gpio read` command
can be used to check for CMD_RET_SUCCESS or CMD_RET_FAILURE.
CONFIG_CMD_GPIO_READ is used to enable the `gpio read` command.
Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
Allow device tree to provide ti,ddr-freq0 to be used as the initial DDR
frequency that is set for lpddr4 before initialization of the
controller. Make this optional and continue to use PLL bypass frequency
as is done currently if ti,ddr-freq0 is not provided.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The current implementation of boot_relocate_fdt() places DT at the
highest usable DRAM address, which is calculated as:
env_get_bootm_low() + env_get_bootm_mapsize()
which by default becomes gd->ram_base + gd->ram_size.
Systems like i.MX53 can have multiple DRAM banks with gap between them,
e.g. have DRAM at 0x70000000-0x8fffffff and 0xb0000000-0xcfffffff , so
for them the calculated highest DRAM address is 0xafffffff, which is
exactly in the gap and thus not usable.
Fix this by iterating over all DRAM banks and tracking the remaining
amount of the total mapping size obtained from env_get_bootm_mapsize().
Limit the maximum LMB area size to each bank, to avoid using nonexistent
DRAM.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
The k3-ddrss driver wants to configure the DDRSS_V2A_CTL_REG to reflect
the maximum possible SDRAM of 2 GB for AM64x (instead of the register's
default that says 8 GB, which the AM64x DDR controller wouldn't support).
The offset 0x20 was correct, but the register name DDRSS_V2A_R1_MAT_REG
was that of the next register at offset 0x24.
Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
- Migrate CONFIG_SYS_MEM_TOP_HIDE to Kconfig, IOMUX bugfix, 2 BTRFS
bugfixes, update .gitignore and .mailmap files, aspeed GPIO bugfix,
image-fit and squashfs code cleanups, enable EXT4 and ISO partitions on
DeveloperBox.
- populate u-boot,bootconf under /chosen, see
https://github.com/devicetree-org/dt-schema/pull/71 for corresponding
change
Currently there is no btrfs support in SPL. But macro CONFIG_FS_BTRFS is
defined also when building SPL. When both FS_BTRFS and SPL are enabled
then build process throw compile error.
Fix check for btrfs code in fstypes[] to allow compiling FS_BTRFS only in
proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fix following two compile errors on big endian systems:
CC fs/btrfs/btrfs.o
In file included from include/linux/byteorder/big_endian.h:107,
from ./arch/powerpc/include/asm/byteorder.h:82,
from ./arch/powerpc/include/asm/bitops.h:8,
from include/linux/bitops.h:152,
from include/uuid.h:9,
from fs/btrfs/btrfs.c:10:
fs/btrfs/conv-funcs.h: In function ‘btrfs_key_to_disk’:
include/linux/byteorder/generic.h:90:21: error: ‘__cpu_to_le16’ undeclared (first use in this function); did you mean ‘__cpu_to_le16p’?
#define cpu_to_le16 __cpu_to_le16
^~~~~~~~~~~~~
fs/btrfs/conv-funcs.h:79:10: note: in expansion of macro ‘cpu_to_le16’
__u16: cpu_to_le16, \
^~~~~~~~~~~
CC fs/btrfs/compression.o
In file included from ./arch/powerpc/include/asm/unaligned.h:9,
from fs/btrfs/compression.c:16:
include/linux/unaligned/access_ok.h:6:19: error: redefinition of ‘get_unaligned_le16’
static inline u16 get_unaligned_le16(const void *p)
^~~~~~~~~~~~~~~~~~
In file included from fs/btrfs/ctree.h:16,
from fs/btrfs/btrfs.h:12,
from fs/btrfs/compression.c:8:
include/linux/unaligned/le_byteshift.h:40:19: note: previous definition of ‘get_unaligned_le16’ was here
static inline u16 get_unaligned_le16(const void *p)
^~~~~~~~~~~~~~~~~~
Include file asm/unaligned.h contains arch specific macros and functions
for unaligned access as opposite to linux/unaligned le_byteshift.h which
contains macros and functions specific to little endian systems only.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Qu Wenruo <wqu@suse.com>
We should only access console_devices[file][i] once we have checked that i
< cd_count[file]. Otherwise, we will access uninitialized memory at the end
of the loop. console_devices[file][i] should not be NULL, but putting the
assignment in the loop condition allows us to ensure that i is checked
beforehand. This isn't a bug, but it does make valgrind stop complaining.
Fixes: 400797cad3 ("IOMUX: Split out for_each_console_dev() helper macro")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Andrew Scull <ascull@google.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* free() checks if its argument is NULL. Remove duplicate checks.
* Remove duplicate free(ovcopy).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The offset of the current read back register is the value of the gpio pin,
not the value written for the gpio output.
This patch fix it to avoid the other gpio output value controlled by the
same register being set incorrectly.
Fixes: 7ad889b0f37a ("gpio: Add Aspeed GPIO driver")
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Since this box is SystemReady compliant enable ISO_PARTITION which is
needed to start some installers (e.g Fedora). While at it enable EXT4
as well which is a common filesystem for targets
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Xilinx has been acquired by AMD that's why emails should be also updated.
The patch is updating .mailmap file and also MAINTAINERS files as was done
by commit 5cd1ecb99490 ("ppc: qemu: Update MAINTAINERS for correct email
address").
The rest of my emails are not going to change.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
It can be useful for the OS (Linux) to know which configuration has
been chosen by U-Boot when launching a FIT image.
Store the name of the FIT configuration node used in a new string
property called 'u-boot,bootconf' in the '/chosen' node in device tree.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
When every member of a linker list is aligned by the compiler, we can no
longer rely on the sizeof of the struct to determine the number of
entries.
For example, if the struct size is 0x90 but every entry is aligned to 0xa0
by the compiler, the linker list entries takes more space in memory and
the calculation of the number of entries is incorrect. For example, we may
see 0x12 entries when there are only 0x11.
This is a real problem. There may be a general solution, although I cannot
currently think of one. So far it only bites with OF_PLATDATA_RT which
creates a pointer to each entry of the 'struct udevice' linker_list. This
does not happen without that option, so it only affects SPL.
Work around it by manually calculating the aligned size of struct udevice,
then using that for the n_ent calculation.
Note: the alignment fix to linker list was here:
0b2fa98aa5e linker_lists: Fix alignment issue
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if devres is enabled in U-Boot proper it is enabled in SPL.
We don't normally want it there, so disable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Angus Ainslie <angus@akkea.ca>
Use this larger boundary to ensure that linker lists at least start on the
maximum possible alignment boundary. See also the CONFIG_LINKER_LIST_ALIGN
setting, but that is host-arch-specific, so it seems better to use the
largest value for every host architecture.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present fputc() is used before the console is available, then write()
is used. These are not compatible. Since fputc() buffers internally it is
better to use the write(), so that a partial line is immediately
displayed.
This has a slight effect on performance, but we are already using write()
for the vast majority of the output with no obvious impacts.
Signed-off-by: Simon Glass <sjg@chromium.org>
The rk3288/RK3399 DT synced from Linux contains some different
compatible strings in the mipi node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi and rk3399.dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3288 DT synced from Linux contains some different
properties in the edp node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
A number of rk3229/rk3288 DT files are synced from Linux.
Add a maintainer to look after them and to help with
review and testing.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Google Veyron rk3288 DT files are synced from Linux.
Add a maintainer to look after them and to help with
review and testing.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The DT node name pattern in mmc-controller.yaml for mmc
is "^mmc(@.*)?$". The Rockchip mmc nodes have been synced
with Linux, so update the boot_devices constants as well.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to sync rk3288.dtsi from Linux it needed to
move all u-boot specific properties in separate dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3288
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Keep SCLK_MAC_PLL in use for rk3288 clock driver.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3288
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Change location to be more in line with other SoCs.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to sync rk322x.dtsi from Linux, move all
U-boot specific properties in separate dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3228
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3228
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add rk3066 Rikomagic MK808 to the list of
mainline supported Rockchip boards.
Include instructions for creating and programming
images to NAND and SD card.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There are several PX30/RK3326 boards in use without
mentioning in rockchip.rst. Add boards and examples.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
With more text coming to the rockchip.rst document,
give it a restyle first.
Changed:
sort build examples alphabetically
add git clone example
fix bash examples
fix phrases (grammer)
fix typos
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit adds the default configuration file and
relevant description for a MK808 board.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM. Add rk3066a-mk808.dts. Move U-boot specific
things in a rk3066a-mk808-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Add rk3066a.dtsi. Move U-boot specific
things in a rk3066a-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Move the include for rk3xxx-u-boot.dtsi to rk3188-u-boot.dtsi
to stay in line with U-boot dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The file rk3xxx-u-boot.dtsi was original only for rk3188 and SPL.
With rk3066 added some nodes are also needed in TPL,
so change them to u-boot,dm-pre-reloc
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add driver supporting pin multiplexing on rk3066 platform.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the clock driver for the rk3066 platform.
Derived from the rk3288 and rk3188 driver it
supports only a bare minimum to bring up the system
to reduce the TPL size for:
SDRAM clock configuration.
The boot devices NAND, EMMC, SDMMC, SPI.
A UART for the debug messages (fixed) at 115200n8.
A SARADC for the recovery button.
A TIMER for the delays (fixed).
There's support for two possible frequencies,
the safe 600MHz which will work with default pmic settings and
will be set to get away from the 24MHz default and
the maximum of 1.416Ghz, which boards can set if they
were able to get pmic support for it.
After the clock tree is set during the TPL probe
there's no parent update support.
In OF_REAL mode the drivers ns16550.c and dw-apb-timer.c
obtain the (fixed) clk_get_rate from the clock driver
instead of platdata.
The rk3066 cru node has a number of assigned-clocks properties
that call the .set_rate() function. Add them to the list so that
they return a 0 instead of -ENOENT.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
grf is needed by various drivers for rk3066 soc.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3066
sync the power domain dt-binding header.
This is the state as of v5.12 in Linux.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The serial_rockchip.c driver converts platdata to the data structure
used in the ns16550.c file and then calls the function
ns16550_serial_probe().
When compiled with OF_REAL the serial_rockchip.c driver returns
now -ENODEV when probed and does no harm.
The config ROCKCHIP_SERIAL is currently depends on SPL_OF_PLATDATA.
Allow serial port use for both SPL and TPL by removing this
dependency and SPL_BUILD restriction.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip serial driver depends on an enabled NS16550 driver,
so add select SYS_NS16550 to config ROCKCHIP_SERIAL.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When a defconfig for rk3288 is compiled it gives the warning:
rockchip_rk3288_uart: Missing .compatible in
./drivers/serial/serial_rockchip.c
: WARNING: the driver rockchip_rk3288_uart
was not found in the driver list
Fix by renaming U_BOOT_DRIVER name of serial_rockchip.c
to rockchip_uart. Add rk3288 serial support with
a DM_DRIVER_ALIAS define.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip uart DT nodes have "snps,dw-apb-uart" as
fall back string. The driver ns16550.c has CONFIG_IS_ENABLED(OF_REAL)
as condition to of_match and does not copy dtplat data.
For TPL/SPL the driver serial_rockchip.c
is used. Move driver alias to correct driver.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The ns16550.c driver has the following conditions for .of_match:
CONFIG_IS_ENABLED(OF_REAL)
For Rockchip SoCs with TPL/SPL and platform data that need serial
support the serial_rockchip.c driver was made. It copies this data
and then calls ns16550_serial_probe(). With the addition of yet an other
SoC type this driver is in need for a little restyle.
Simplify struct rockchip_uart_plat and add extra SoCs with
DM_DRIVER_ALIAS(). Return -ENODEV when the ns16550.c driver
probe function is available.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip SoCs rk3066/rk3188 have MMC DT nodes
with as compatible string "rockchip,rk2928-dw-mshc".
Add OF_PLATDATA support to the existing driver with
help of a DM_DRIVER_ALIAS.
This type needs a permanent enabled fifo.
The other Rockchip SoCs always have the property
"u-boot,spl-fifo-mode" in the MMC DT nodes,
because MMC to SRAM can't do DMA.
Make this property a requirement for MMC OF_PLATDATA
structures. The property "fifo-mode" must be added
for all other compile modes.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The document rockchip-dw-mshc.yaml decribes a maximum of 4 clocks.
In the rockchip_dw_mmc driver the clock name in use was "fixed"
to "ciu" with index 1, but later reverted back to index 0.
The clock drivers can handle both, but the calling driver
should submit correct data as a standard practice.
Fix the "ciu" clock index by setting it back to 1.
clock-names:
minItems: 2
items:
- const: biu
- const: ciu
- const: ciu-drive
- const: ciu-sample
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The line with .of_to_plat in the U_BOOT_DRIVER structure
of dw-apb-timer.c is not aligned with the rest.
Add an extra TAB to fix the whitespace.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip rk3066 SoC has 3 dw-apb-timer nodes.
U-boot is compiled with OF_PLATDATA TPL/SPL options,
so add OF_PLATDATA support for the dw-apb-timer.
Also change driver name to be able to compile with
U-boot scripts. No reset OF_PLATDATA support was added,
because the rk3066 nodes don't need/have them.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Not all Rockchip SoC models use the ARM arch timer.
Call the function timer_init() only when
CONFIG_SYS_ARCH_TIMER is available.
Use the call condition IS_ENABLED to increase
build coverage and make the code easier to read.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently there's no exception in TPL. Make this more
generic and compile the code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently only rk3188 has an exception in SPL. Make this more
generic and compile code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Include SCSI in the list of boot targets if CONFIG_CMD_SCSI is
enabled.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the HCLK_OTG, HCLK_SFC, and SCLK_SFC clocks to px30_clk_enable.
Without this change U-Boot reports an error of "Enable
clock-controller@ff2b0000 failed" on boot when using the SFC or USB in
U-Boot.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add missing include for dm/device_compat.h. Without this include the
SFC driver fails to compile because dev_err and dev_dbg are not
defined.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Mirroring commit 97ab802aa36f ("adc: meson-saradc: add support for
getting reference voltage value") for meson-saradc, this adds support
for getting the "vref-supply" regulator and register it as the ADC's
reference voltage regulator, so clients can translate sampled ADC values
to voltage.
Signed-off-by: Peter Cai <peter@typeblog.net>
Reviewed-by: John Keeping <john@metanate.com>
Tested-by: John Keeping <john@metanate.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
A pointer can not be negative. Use macro IS_ERR_OR_NULL() for checking.
Signed-off-by: Haolin Li <li.haolin@qq.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
- DM9000 DM support
- tftp server bug fix
- mdio ofnode support functions
- Various phy fixes and improvements.
[trini: Fixup merge conflicts in drivers/net/phy/ethernet_id.c
drivers/net/phy/phy.c include/phy.h]
To make addressing the problem of migrated symbols being present in
board config header files, update the CI test to them print what symbols
are causing it to fail. Also report all failures in the tree, rather
than stopping at the first failing file.
Signed-off-by: Tom Rini <trini@konsulko.com>
- Apple M1 Ultra support, TI power domain fix, atsha204a big endian
support, LED cleanups and support for default-state, increase malloc
pool on sandbox, ubifs bugfix, further serial cleanup / semihost
support, fix a few cases around enabling/disabling FS support in SPL,
clean up duplication of table_compute_checksum()
Update the capsule update functionality related documentation to
refect the additional definitions that need to be made per platform
for supporting the capsule update feature.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
While building a capsule, the GUID value of that specific image is to
be passed through the --guid command option to the mkeficapsule
tool instead of using one of --raw or --fit options, where the GUID
value passed through the command line option is the image GUID.
This renders the EFI_FIRMWARE_IMAGE_TYPE_UBOOT_FIT_GUID and
EFI_FIRMWARE_IMAGE_TYPE_UBOOT_RAW_GUID values superfluous. Remove the
--raw and --fit command line options as well. Also modify the
mkeficapsule man page to reflect this change.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The capsule update code has been modified for getting the image GUID
values from the platform code. With this, each image now has a unique
GUID value. With this change, there is no longer a need for defining
GUIDs for FIT and raw images. Remove these GUID values.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The current UEFI capsule updation code uses two GUID values, one for
FIT images, and one for raw images across platforms. This logic is
being changed to have GUID values per image, per platform. Change the
tests for the capsule update code to reflect this change. The GUID
values now used are the ones specific to the sandbox platform -- one
for the u-boot image, and another for the u-boot environment image.
Install the FMP instance for raw images on the sandbox variant for
testing the capsule update code. Install the FMP instance for the FIT
images on the sandbox64 and sandbox_flattree variant for testing
capsule update for FIT images. This is being done by splitting the
capsule update script for FIT and raw images.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Currently, there are a bunch of boards which enable the UEFI capsule
update feature. The actual update of the firmware images is done
through the dfu framework which uses the dfu_alt_info environment
variable for getting information on the update, like device, partition
number/address etc. The dfu framework allows the variable to be set
through the set_dfu_alt_info function defined by the platform, or if
the function is not defined, it gets the variable from the
environment. Using the value set in the environment is not very
robust, since the variable can be modified from the u-boot command
line and this can cause an incorrect update.
To prevent this from happening, define the set_dfu_alt_info function
when the capsule update feature is enabled. A weak function is defined
which sets the dfu_alt_info environment variable by getting the string
for the variable from the platform.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
The current capsule update code compares the image GUID value in the
capsule header with the image GUID value obtained from the
GetImageInfo function of the Firmware Management Protocol(FMP). This
comparison is done to ascertain if the FMP's SetImage function can be
called for the update. Make this checking more robust by comparing the
image_index value passed through the capsule with that returned by the
FMP's GetImageInfo function. This protects against the scenario of the
firmware being updated in a wrong partition/location on the storage
device if an incorrect value has been passed through the capsule,
since the image_index is used to determine the location of the update
on the storage device.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Currently, the image descriptor array that has been passed to the
GetImageInfo function of the Firmware Management Protocol(FMP) gets
populated through the data stored with the dfu framework. The
dfu data is not restricted to contain information only of the images
updatable through the capsule update mechanism, but it also contains
information on other images. The image descriptor array is also parsed
by the ESRT generation code, and thus the ESRT table contains entries
for other images that are not being handled by the FMP for the capsule
updates. Fix this by populating the image descriptor array from the
structure initialised in the board file.
The other issue fixed is assignment of a separate GUID for all images
in the image descriptor array. The UEFI specification mandates that
all entries in the ESRT table should have a unique GUID value as part
of the FwClass member of the EFI_SYSTEM_RESOURCE_ENTRY. Currently, all
images are assigned a single GUID value, either an FIT GUID or a raw
image GUID. This is fixed by obtaining the GUID values from the
efi_fw_images array defined per platform.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Add a structure which defines the information that is needed for
executing capsule updates on a platform. Some information in the
structure like the dfu string is used for making the update process
more robust while some information like the per platform image GUIDs
is used for fixing issues. Initialise this structure in the board
file, and use the information for the capsule updates.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Currently there is no UBIFS support in SPL. But macro CONFIG_CMD_UBIFS is
defined also when building SPL. when both CMD_UBIFS and SPL are enabled
then build process throw compile error.
Fix check for ubifs code in fstypes[] to allow compiling CMD_UBIFS only in
proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
It seems like there was some merge error when first cleaning up and
sharing this function. We have both an inline version of the function
in include/tables_csum.h and a non-inline version in lib/tables_csum.c.
Rework things so that we only have the non-inline version (due to number
of calls, we should not inline this).
Fixes: 1befb38b8682 ("x86: Move table csum into separate file")
Fixes: 2b445e4d3194 ("x86: Move table csum into separate header")
Cc: Alexander Graf <agraf@csgraf.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This adds an implementation of puts for DM. The implementation is not as
clean as for the non-DM puts because we have to handle non-nul-terminated
string. We also handle short writes (though these are probably very
unusual).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds a test to ensure that puts is equivalent to putc called in a
loop. We don't verify the contents of the message to avoid having to
record console output a second time (though that could be added in the
future). The globals are initialized to non-zero values to avoid a
warning; in particular, the character count is off-by-one (but we always
make relative measurements).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This implements puts for sandbox. It is fairly straightforward, except
that we break out the shared color printing functionality into its own
function.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
A string like "test\n" would be broken up into the following sequence of
prints by _serial_puts:
puts("test\n")
putc('\r')
Although functionally this is the same as \r\n, it is not the standard
sequence and caused tests to fail. Fix this by excluding the '\n' from
the initial print. The above string will now be broken up like
puts("test")
puts("\r\n")
Since we may now need to call ops->puts twice (with the associated retry
logic), break that part of the function off into a helper.
Fixes: 7a76347189 ("serial: dm: Add support for puts")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Attaching a UBI partition may take a while, since scanning the memory is
required.
It thus makes sense to avoid a detach/scan/attach cycle when the right
partition is already attached, and let the calling process call 'detach'
beforehand if it needs it.
This commit checks for the currently attached UBI partition, and skips
reattaching if not needed, showing an information.
Signed-off-by: Alexandre Besnard <alexandre.besnard@softathome.com>
In case the DT LED subnode contains "default-state" property set to
either "on" or "off", probe the LED driver and configure the LED state
automatically.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
[trini: Update the relevant test now that we have support]
Signed-off-by: Tom Rini <trini@konsulko.com>
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Tom Rini <trini@konsulko.com>
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Tom Rini <trini@konsulko.com>
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Every driver in drivers/led/ currently does some form of "label" OF
property parsing in its bind() callback. Move this label parsing to
LED core, since this "label" OF property is a generic property. This
permits code deduplication in subseuqent patches.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Callers of function atsha204a_crc16() expect to return value in host cpu
endianity. So remove cpu_to_le16() conversion.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
It is possible for power domain IDs to be great than 31. If this
happens, the PTCMD and PTSTAT registers must overflow into adjacent
corresponding PTCMD_H and PTSTAT_H registers for each. Update the driver
to account for this.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The M1 Ultra consists of two M1 Max dies. The second die's I/O is at
a consistent offset of 0x2000000000.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Increase the malloc pool on sandbox in order to avoid spurious errors
such as:
___________________ test_ut[ut_dm_dm_test_video_comp_bmp32] ____________________
test/py/tests/test_ut.py:43: in test_ut
assert output.endswith('Failures: 0')
E AssertionError: assert False
E + where False = <built-in method endswith of str object at 0x7f5de85efb20>('Failures: 0')
E + where <built-in method endswith of str object at 0x7f5de85efb20> = 'Test: dm_test_video_comp_bmp32: video.c\r\r\nSDL renderer does not exist\r\r\ntest/dm/video.c:86, compress_frame_buff..._test_video_comp_bmp32(): 2024 == compress_frame_buffer(uts, dev): Expected 0x7e8 (2024), got 0x1 (1)\r\r\nFailures: 2'.endswith
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Drop legacy #define CONFIG_DRIVER_DM9000 from board include/configs/
and enable the same in Kconfig configs/ .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add Kconfig entry for the DM9000 MAC.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Add support for U-Boot DM and DT probing.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Instead of reading out the entire FIFO and possibly overwriting U-Boot
memory, read out one packet per recv call, pass it to U-Boot network
stack, and repeat.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Split network handling functions into non-DM specific parts and
common code in preparation for conversion to DM.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Pass private data into IO accessors and use the base addresses of
IO and DATA window from the private data instead of using the hard
coded macros DM9000_IO/DM9000_DATA. Currently both the DM9000_IO
and DM9000_DATA are assigned to the respecive private data fields
for the non-DM case backward compatibility.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Dispose of dm9000.h because none of the function prototypes declared in
it are called anywhere in the codebase. Staticize dm9000_read_srom_word()
because it is now called only from within the dm9000 driver. Drop
dm9000_write_srom_word() because it is no longer used.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Allocate driver private data dynamically in its init function and drop
the static driver private data variable. Pass the dynamic private data
throughout the driver. This is done in preparation for DM conversion.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Rename board_info structure to dm9000_priv to make it clear what this
structure really contains, the driver private data. No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reorder the driver functions to get rid of forward declarations.
Staticize whatever is possible. No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Fix checkpatch errors and warnings. No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Remove volatile keyword usage from arrays, they are not really volatile
in any way, so this keyword is misused here. No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Rework DM9000_DMP_PACKET() into dm9000_dump_packet() function,
this brings better type checking. No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Drop unused function dump_regs() because it is unused.
No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Rename variables to lowercase to be consistent with coding style.
No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Use standard debug() macro to print debug messages instead of
reinventing driver-specific macro again. No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Make accessor names lowercase to be consistent with coding style.
No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Change type of private struct member mdio_base from void * to
phys_addr_t. This allows us to drop 2 casts.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The GW7903 is based on the i.MX 8M Mini SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- microSD socket with voltage select support
- Gateworks System Controller
- M.2 A-E Socket with USB2.0 and PCIe
- MiniPCIe Socket with PCIe, USB2.0, and SIM
- IMX8M FEC
- RS232/RS485/RS422 serial transceiver
- LIS2DE12 3-axis accelerometer
- front panel LED's
- off-board isolated digital I/O
- Wide range DC power input
- 802.3at PoE
- PMIC
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Fix registration of 24M and 32k clock, those got applied or rebased
incorrectly, so fill in the correct code.
Fixes: 7a2c3be95a5 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
This is the only place where i.MX8M code does SMCCC call, remove it.
The output has little value as it prints some part of commit ID, and
worse, if there is no SMC handler installed, the code outright hangs
or crashes the system.
By removing this one instance of SMCCC call, U-Boot no longer depends
on SMC handlers and can boot without hanging in any case. If there is
a need to dump this commit ID, use CMD_SMC instead and do 'smc' call
from U-Boot shell or scripts instead of hard-coding SMCCC dependency
into architecture code. This particular code can be replaced by:
=> smc 0xc2000003 0 0 0 0 0 0
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Enable instruction cache early on to speed up the boot process on i.MX8M.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Some globals where not properly initialized causing timeouts
as data packets where not immediately acknowledged.
Fixes: cc6b87ecaa96 ("net: tftp: Add client support for RFC 7440")
Signed-off-by: Arjan Minzinga Zijlstra <arjan.minzingazijlstra@fox-it.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The IMX_FEC_BASE value is not used when CONFIG_DM_ETH is configured. So this
value can be removed.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enought space to load kernel images bigger than 32MB change the
variables to a feasible value.
The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".
The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Add new board based on the Toradex Verdin iMX8M Mini SoM, the MX8Menlo.
The board is a compatible replacement for i.MX53 M53Menlo and features
USB, multiple UARTs, ethernet, LEDs, SD and eMMC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The Linux kernel moved dt-bindings/pinctrl/pins-imxrt to the device tree
This patch move it in U-Boot as well.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
In Linux IMX and IMXRT use the device tree to hold the anatop address.
The anatop is used in clock drivers as it controls the internal PLLs
This will move the macro from asm/arch-imxrt to the device tree.
This presumably should also be done with the other IMX boards as well.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Add compatible string for i.MX8MP, which permits i.MX8MP to use
HS400ES mode, just like all the other i.MX8M.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Haibo Chen <haibo.chen@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The FlexSPI NOR boot offset does not require any special handling,
the image_offset is correct in either case (0x1000 for FlexSPI NOR
and 0x8000 for SD/eMMC) and the offset of u-boot.itb from the start
of flash.bin is always 0x58000 on MX8MN/MX8MP, which matches the
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000 in case
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300, which is always the
case on MX8MN/MX8MP.
The CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR is really overloaded in
case of the MX8MN/MX8MP, but fixing that needs additional plumbing.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The i.MX8M Mini and i.MX8M Plus flexspi IPs are compatible with one
another, however the linux kernel DT uses separate compatible string
for each SoC. Add the missing i.MX8MP compatible into this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.
Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
The GW7902-C revision adds an ADC for the VDD_5P0 voltage rail.
Add register definitions for it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Update the 'boot_net' script to load the fdt with the kernel.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
rcar3_salvator-x u-boot.img is very close to the 0x100000 size limit.
Enable linked time optimization (LTO).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add support for Data Modul i.MX8M Mini eDM SBC board. This is an
evaluation board for various custom display units. Currently
supported are serial console, ethernet, eMMC, SD, SPI NOR,
USB host and USB OTG.
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Add redundand environment support as it is required
by SWUpdate.
While at it, also adjust the CONFIG_ENV_OFFSET to a more appropriate
larger offset as done on other i.MX8M defconfigs.
Signed-off-by: Fabio Estevam <festevam@denx.de>
The serial number is located at offset 0x14 of the EEPROM
under i2c0 bus at address 0x54.
To print the serial number in Linux:
SERNUM=$(cat /proc/device-tree/serial-number)
echo $SERNUM
Signed-off-by: Fabio Estevam <festevam@denx.de>
Currently, the DDR type is retrieved by iteracting inside an array
of possible DDR types.
This may take saveral attempts, which slows the overall U-Boot process
and does not provide a good user experience:
U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000)
DDRINFO: Cfg attempt: [ 1/6 ]
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(T): mr5-8 [ 0x5000010 ]
resetting ...
U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000)
DDRINFO: Cfg attempt: [ 2/6 ]
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(T): mr5-8 [ 0x1061010 ]
resetting ...
U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000)
DDRINFO: Cfg attempt: [ 3/6 ]
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(T): mr5-8 [ 0xff000010 ]
Normal Boot
WDT: Not starting
Trying to boot from MMC2
NOTICE: BL31: v2.5(release):v2.5
NOTICE: BL31: Built : 07:12:44, Jan 24 2022
Improve the boot time by retrieving the correct DDR information from
the EEPROM:
U-Boot SPL 2022.04-rc4-00045-g6d02bc40d58c (Mar 19 2022 - 08:22:29 -0300)
DDRINFO(D): Kingston 4096G
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(E): mr5-8 [ 0xff000010 ]
Normal Boot
WDT: Started watchdog@30280000 with servicing (60s timeout)
Trying to boot from MMC2
NOTICE: BL31: v2.5(release):v2.5
NOTICE: BL31: Built : 22:28:11, Mar 15 2022
Based on the original code from Compulab's U-Boot.
Tested on a imx8mm-cl-iot-gate board populated with 4GB of RAM.
Signed-off-by: Fabio Estevam <festevam@denx.de>
imx8mm-cl-iot-gate supports multiple DDR sizes and models.
The DDR type can be retrieved from the EEPROM, so add SPL code
that can be used to get the DDR information.
Based on the original code from Compulab's U-Boot.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Add driver for the NXP TJA1100 and TJA1101 PHYs. These PHYs are special
BroadRReach 100BaseT1 PHYs used in automotive.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This macro currently supports only one parameter. Based on Linux iopoll,
let's extend read_poll_timeout common API to allow multiple variable
parameters.
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
This driver supports NXP C45 TJA11XX PHYs, but there're also other NXP
TJA11XX PHYs. Let's rename functions in this driver to be c45 variant
specific, so further drivers can be introduced adding support for NXP
TJA11XX PHYs.
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Add init_nand_clk to enable gpmi nand clock. Since i.MX8M not use CCF,
so we still use legacy mode to configure the clock.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The power/bd71837.h should no longer be included, since V1.1 SoM
uses only the PCA9450 PMIC and the BD71837 support was removed.
Drop the header too.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Separe dm implementation from non dm implementation of pwm-imx
driver using CONFIG_DM_PWM
Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Move pwm_imx_get_parms, pwm_id_to_reg functions into pwm-imx.c
and drop off pwm-imx-util.c
Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Set the BYPASS ID SWAP bit (GPR10 bit 1).
The ID SWAP function randomly make TZASC grant non-secure access to
secure memory. TZASC ID SWAP should be bypassed by setting the bit
TZASC_ID_SWAP_BYPASS(bit 1) in IOMUX_GPR10 register.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Turns out on certain carrier boards (e.g. Iris V2) and under certain
circumstances (e.g. after a software reset) the SD card may have been
left in a strange state which later failed as follows:
Colibri iMX6ULL # mmc dev 0
Card did not respond to voltage select! : -110
Fix this as follows:
- Re-name the signaling voltage rail regulator from vmmc to vqmmc.
- Fix the name of the GPIO property to gpios.
- Specify 4-bit bus width, no write-protect capability and no 1.8
volt signaling voltage capability.
- Fix the clock vs. command pull-up vs. push-pull configuration.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Now that it is possible to use regulator-fixed-clock make use
of it. This makes U-Boot detect the PHY on first cold-boot.
This commit also adjusts the code in setup_fec and follows
how it is done in mx6ullevk.c
This commit also slows down the boot-process by about 150ms
as it now waits for the regulator-fixed-clock voltage that
drives the PHY to go up.
If you rely on very fast boot-speeds and don't need ethernet
for your boot-process you can safely revert the changes on
imx6ull-colibri.dtsi
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This commit adds the possibility to choose the compatible
"regulator-fixed-clock" in devicetree.
This is a special case of regulator-fixed where a clock has to
be used to switch the regulator on and off.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Toradex uses the variable variant to distinguish between modules with
eMMC, NAND with wifi and NAND without wifi.
This variable is set on every boot. Set this variable also if we have a
NAND module without wifi to prevent issues.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
U-Boot should never save the environment unasked.
This also avoids storing broken fdt_module to flash.
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
U-Boot should never save the environment unasked.
This also avoids storing broken ftd_file to eMMC.
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Since we envision using overlays for display interfaces, the video=
settings within vidargs are obsolete. Remove these settings from the
U-Boot.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
All the other NAND-based boards have tdxargs specified for setting
manual kernel command-line arguments.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Explicitly use the atf-bl31 type for the bl31.bin atf-blob. This uses
the path from the BL31 environment variable, if defined.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Rename board_early_init_f() to board_early_init(), since this function
has nothing to do with actual board_early_init_f() as used throughout
U-Boot. The board_early_init() is function local to this board used to
configure UART and WDT pinmux. Wrap init_uart_clk() into this function
so that early UART init would be all in one place. Turn the function
into __weak one, so it could be overridden in case custom carrier board
uses different UART or needs custom IOMUX settings.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The EFI memory init uses gd->ram_top for conventional memory. In
current implementation, the ram_top is below optee address. This cause
grub failed to allocation memory for initrd.
The change updates DDR bank setup functions to place the u-boot at top
DDR in 4GB space.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Need to drop phy-reset-gpios before booting linux, this property
is legacy property and replaced with reset-gpios.
If provide both, kernel would failed to request the same gpio twice
and cause fec not work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The extcon is an decrepted property and not used by upstream Linux and
NXP 5.10 kernel, so we remove it before kicking linux in case it is in
dts. Otherwise distro kernel will not able to have usb function.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Beside the fused modules on iMX8MP Lite, this part has also fused
GPU3D/2D, LVDS and MIPI DSI.
So we have to disable them for kernel and also disable MIPI DSI
in u-boot DTS for splash screen at runtime.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Wait 1ms before issuing the first MRS command to write DDR3 Mode
registers.
There is a requirement to wait a minimum time before issuing command to
the DDR3 device, according to the JEDEC standard this time is 500us
(after RESET_n is de-asserted until CKE becomes active) + tXPR (Reset
CKE Exit time, maximum value 360ns).
It seems that for some reason this is not enforced by the MMDC
controller.
Without this change we experienced random memory initialization failures
with about 2% boot failure rate on specific problematic boards, after
this change we were able to do more than 10.000 power-cycle without a
single failure.
Fixes: fe0f7f7842e1 ("mx6: add mmdc configuration for MX6Q/MX6DL")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
The current DDR write level calibration routine always overwrite
the ralat/walat fields to their maximum value, just save
the existing values at the beginning of the calibration routine
and restore it at the end.
In case the delay is estimated by the user to be more than one cycle the
walat should be configured according to that, this is not
automatically done. From the i.MX6 RM:
The user should read the results of the associated delay-line at
MPWLDECTRL#[WL_DL_ABS_OFFSET#] and in case the user estimates that the
reasonable delay may be above 1 cycle then the user should indicate it at
MPWLDECTRL#[WL_CYC_DEL#]. Moreover the user should indicate it in
MDMISC[WALAT] field. For example, if the result of the write leveling calibration
is 100/256 parts of a cycle, but the user estimates that the delay is above 2 cycles
then MPWLDECTRL#[WL_CYC_DEL#] should be configured to 2, so the total
delay will be 2 and 100/256 parts of a cycle
Probably it would just possible to not overwrite the mdmisc register in
the first place, since this is not present in the write_level_calib() example
in NXP AN4467 nor in the i.MX6 RM (44.11.6.1 Hardware Write Leveling
Calibration).
Fixes: d339f16911c7 ("arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
- According to S400 API, the fuse bank 25 (Testconfig2) is able to
access. Add it into driver's mapping table.
- According to FSB words list, the reserved 48 words are ahead of
the bank 5 and bank 6. Fix the wrong position.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable multiple storages for u-boot env:
MMC or SPI flash or NOWHERE for usb
so u-boot can runtime select the storage flash according to boot device.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The TEE memory should be reserved when TEE is present, so need
to runtime update dram bank and memory information according to
tee present or not.
Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable wdog_ad interrupt being triggered by CMC1 to CM33 to let CM33
know A35 reset and reinitialize rpmsg.
Clear wdog_ad and AD_PERIPH reset interrupt after A35 up, otherwise
M33 will always receive interrupt.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
If M33 handshake is successful, TPM and DSI panel MUX setting is
done by M33, no need to set them.
If handshake is failed or M33 is not booted, continue the TPM
and DSI panel MUX setting
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Update DDR PHY settings to support LPDDR4 mode only by adjusting
DQ VREF ctrl, ODT and pads drive strength.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Found the lposc fuse loading having impact to cpu idle in kernel.
Without the loading in dual boot mode, kernel will hang after idle
for a while.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Assign the LPAV owner to RTD, and assign LPAV masters and peripherals
to APD. So except the masters and peripherals, other resources
(like DDR, cgc2, pcc5) in LPAV won't be reset during reboot and suspend.
No needs to initialize DDR again after reboot.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since latest S400 firmware has supported to read OEM SRK Hash, add
it to the driver's table
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable MU0_B clk by default. When M33 image is loaded by Jlink,
the previous method not enable MU0_B clk and not able to communicate
with M33, so let's enable it by default.
And we not put it under kernel dts, because it conflicts with i.MX8QM
suspend/resume logic which requires large change.
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When reset with dual boot mode, the LPAV domain won't power down
due to its master is not assigned to APD. So the NICLPAV keeps the
last setting to use PLL4PFD1. So before SPL initialize the PLL4,
we need to switch NICLPAV to FRO192, otherwise system will hang.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When M33 is LPAV owner in dual boot, DDR, PCC5, CGC2 won't be reset
during APD reset. So no need to init DDR again after reboot, but need to
reconfigure the PLL4 PFD/PFDDIV/LPAV NIC etc, because kernel may
change or disable some of them.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add a new ddr script, defconfig for ND
Configure the clock for ND mode
changing A35 to 960MHz for OD mode
Update NIC CLK for the various modes
Introduce clock_init_early/late, late is used after pmic voltage
setting, early is used in the very early stage for upower mu, lpuart and
etc.
Note: NIC runs at 324MHz, 442MHz has some random kernel hang issue with
cpuidle enabled now.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This workaround is not needed on i.MX8ULP proto-1B EVK as board has
fixed the problem. Because we don't support proto-1A any longer,
remove the PMIC settings.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add i3c controller clock enable/disable function for imx8ulp.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add functions to check if M33 image is booted and handshake with M33
image via MU. A core notifies M33 to start init by FCR F0, then wait
M33 init done signal by checking FSR F0.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The COUNTER_FREQUENCY is missed in 8ulp configs, it will cause SPL
and u-boot not set the cntfrq_el0. For u-boot, this is ok, because
ATF has set it. But for SPL, it will lead delay and get_timer
not working.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add initial support for i.MX8MP USB PHY, i.MX8MP USB is similar to
the i.MX8MQ, except for clock and power domain design customization.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Add clock tables required to bring up DWC3 USB, USB PHY and HSIOMIX domain.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Some printf() have strings that doesn't terminate with end of line
and make the output hard to read.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Re-factor the imx8m[nmpq] rate tables into the common pll1416x clock
driver.
43cdaa1567ad3 ("clk: imx8mm: Move 1443X/1416X PLL clock structure to common place")
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon
This is a DM clock driver based off the imx8mm u-boot driver and the linux
kernel driver.
All of the PLLs and clocks are initialized so the subsystems below are
functional and tested.
1) USB host and peripheral
2) ECSPI
3) UART
4) I2C all busses
5) USDHC for eMMC support
6) USB storage
7) GPIO
8) DRAM
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Acked-by: Sean Anderson <seanga2@gmail.com>
The mxs_nand_spl driver can support to read from page unaligned offset,
so don't need to set bl_len to ask spl_load_simple_fit to handle
the page unaligned access.
Actually spl_load_simple_fit has two parts of reading:
spl_simple_fit_read and spl_load_fit_image.
The spl_load_fit_image can handle the page unaligned offset,
but the spl_simple_fit_read can't do it. spl_simple_fit_read requires
the FIT location at page aligned offset.
Hence, remove the nand_get_mtd overwrite function from mxs_nand_spl
to use page unaligned read by driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Tim Harvey <tharvey@gateworks.com> #gw_ventana
Introduce pwm_dm_imx_get_parms, dm version of pwm_imx_get_parms.
This function get clock rate using clk dm api
Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Get and enable ipg/per pwms clocks using dm api into imx_pwm_of_to_plat
and imx_pwm_probe driver function
Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Decode ECSPI boot device in env_get_location() from i.MX8M ROMAPI tables.
This is necessary to correctly identify env is in SPI NOR when the system
boots from SPI NOR attached to ECSPI.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Because the Beacon imx8mn board uses device tree
for MMC/SD and Ethernet, there is no need to have some of the
config options. It's handled by the device tree.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Because the Beacon imx8mm board uses device tree
for MMC/SD and Ethernet, there is no need to have some of the
config options. It's handled by the device tree.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Disable SPL exception vector which causes issue to ROM patch execution
when SPL calling ROM API.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Conversion to DM_SERIAL is mandatory.
Select DM_SERIAL and add a imx6q-tbs2910-u-boot.dtsi file
that describes the nodes that require dm-pre-reloc, which allows
the DM model to configure the UART pinctrl early.
Remove the now unneeded board UART initialization.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Soeren Moch <smoch@web.de>
With DM_SERIAL selected, it is no longer needed board code to
initialize the UART.
Describe the nodes that require dm-pre-reloc, which allows
the DM model to configure the UART pinctrl early.
Remove the now unneeded board UART initialization.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Add a driver for the Gateworks System Controller used on Gateworks boards
which provides a boot watchdog, power control, temperature monitor,
and voltage ADCs.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
DM is not used for the SPL and a generic DT is used in the SPL
which requires no fixups. Remove the call in the SPL and move the function
into the U-Boot code.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Since DM_SERIAL is used for U-Boot we no longer need legacy UART code in
common.c shared by the SPL and U-Boot. Move the legacy UART config to
the non-DM SPL.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
convert to DM_I2C for U-Boot while leaving SPL legacy I2C:
- Move I2C config from common to SPL
- Move PMIC config from common to SPL (no need to re-configure pmic)
- add DM_I2C support to eeprom/gsc functions shared by SPL and U-Boot
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Configure binman ATF blob entry type to use the path from the BL31
environment variable, if defined.
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
U-Boot complains that CONFIG_SERIAL is not converted to CONFIG_DM_SERIAL
and gives a deadline before possibly removing the board. Migrate to
DM_SERIAL to fulfill the request.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Add entry for 3732 MT/s mode of operation of the LPDDR4, in
which case the DDR PLL has to be configured in 933 MHz mode.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Add settings for operating PLL at 933 MHz. This setting is useful in
case the LPDDR4 DRAM should operate at 1866 MHz or 3733 MT/s.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Add DT compatible string for PCA9450C PMIC. This is a variant of the
PCA9450 PMIC with 6 A dual-phase buck regulator and 3 A buck regulator,
and is software-wise compatible with the PCA9450B. This variant of the
PCA9450 is designed for use as companion PMIC for i.MX8MP.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The correct compatible string for i.MX8MP variant of DWC EQoS MAC
is "nxp,imx8mp-dwmac-eqos", use it. Drop the two current users of
the current wrong compatible string to avoid breaking them.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The Ethernet controller and PHY use the device tree info to
configure themselves, so it's not necessary to manually do it
in the board file. This permits the removal of a bunch of headers
as well.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
To be in sync with the linux devicetree add the disable-smarteee
property.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK
To be in sync with the linux devicetree change the 'phy-reset-gpios' in
the fec node to 'reset-gpios' in the phy node. The PHY reset will be
done by the eth-phy-uclass driver while probing the PHY. This is ok
since it is done before probing the fec.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK
Reviewed-by: Fabio Estevam <festevam@gmail.com>
With the correct settings described in the device-tree the PHY settings
in the board init are no longer required. The values are taken from the
linux device tree.
The PHY latency settings are derived from the phy-mode property and the
voltage seetings are done via the regulator.
Suggested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK
Reviewed-by: Fabio Estevam <festevam@gmail.com>
In cpu_to_be32_array() and be32_to_cpu_array() we should not compare an int
counter to a size_t parameter. Correct the type of the counter. This
exists in upstream as b4c80629c5c9 ("include/linux/byteorder/generic.h:
fix index variables").
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
removed sec_init() call from board files.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
device tree imported from linux kernel.
c500bee1c5b2 (tag: v5.14-rc4) Linux 5.14-rc4
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162
platforms are enabled with JR driver model.
removed sec_init() call from board files.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
i.MX8(QM/QXP) - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
i.MX8(QM/QXP) - updated device tree for supporting DM in SPL.
disabled use of JR1 in SPL and uboot, as JR1 is reserved
for SECO FW.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
added crypto node in device tree.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
i.MX7D - added support for JR driver model.
removed sec_init() call, sec is initialized based on
job ring information processed from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
i.MX6,i.MX6SX,i.MX6UL - added support for JR driver model.
removed sec_init() call, sec is initialized based on
job ring information processed from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Because we don't use SPL_DM on mx6sabresd and mx6sabreauto, so it is
unnecessary to have SPL DTB related configs and SPL_OF_CONTROL enabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
i.MX8MM/MN/MP/MQ - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
added device tree support for job ring driver.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If enable SPL_DM without SPL_OF_CONTROL,
build errors "undefined reference to fdt_get_resource",
is coming in function `caam_jr_probe'.
Added SPL_OF_CONTROL to remove the error.
Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
We need to know where the typedef of 'ofnode' comes from.
Fixes: c86a4de8df61 ("mtd: Add flash_node in struct mtd_info")
Signed-off-by: Tom Rini <trini@konsulko.com>
Backport commit 1cb51a15b576 ("ubifs: Fix journal replay wrt. xattr
nodes") from the Linux Kernel, which has the following Signed-off-by
line:
Signed-off-by: Richard Weinberger <richard@nod.at>
For U-Boot, after comapring with the upstream commit:
Signed-off-by: Tom Rini <trini@konsulko.com>
Hardware-accelerated hash functions require that the input and output
buffers be aligned to the minimum DMA alignment. memalign.h helpfully
provides a macro just for this purpose. It doesn't exist on the host,
but we don't need to be aligned there either.
Fixes: 5dfb521386 ("[new uImage] New uImage low-level API")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the commit bfaa51dd4adf ("cmd: add serial console support
for the cls command") the cls command is not enough to clear the
video display when ANSI console is activated.
This patch clears the video device with the video_clear() API
before to display the bitmap used for the PXE background.
This patch avoids to display the LOGO, activated by default with
commit 7a8555d87136 ("video: Show the U-Boot logo by default").
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In case mtd_info's dev field is not populated (raw nand's case),
use the flash_node new field which reference the DT flash node where
can be found "partitions" node with "fixed-partitions" compatible.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Farhan Ali <farhan.ali@broadcom.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
Currently, add_mtd_partitions_of() can be used only if dev field of
mtd_info struct is populated. It's the case, for example, for a spi nor
flash, which has a DT compatible "jedec,spi-nor" and an associated
device. mtd->dev is populated in spi_nor_scan().
But in case of a raw nand node, mtd_info's dev field can't be populated
as flash node has no compatible, so no associated device.
add_mtd_partitions_of() can't be used to parse "partitions" subnode.
To remove this constraint, add an ofnode field in mtd_info struct
which reference the DT flash node. This new field is populated by
nand_scan_tail(). This new field will be used by add_mtd_partitions_of()
to parse the flash node for "partitions" defined in DT.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Farhan Ali <farhan.ali@broadcom.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
When probing the LEDs, a default brightness is set based on settings
from the U-Boot device tree, i.e. the 'default-brightness' property
of the LED nodes. If that property is not present, the default
maximum brightness is set.
This should make sure the LED controller's registers affecting the
brightness are correctly initialized and should give a consistent
behaviour.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
This was implemented in order to get dual-slot bootloader
partitions on the BeagleBone Black, whose MLO boots from
the first bootable partition: MLO chainloads u-boot in the
same way.
Signed-off-by: Jérôme Carretero <cJ-uboot@zougloub.eu>
Reviewed-by: Tom Rini <trini@konsulko.com>
Set digest_size SHA384 and SHA512 algorithms in pkcs7 and x509,
(not set by ported linux code, but needed by __UBOOT__ part).
EFI_CAPSULE_AUTHENTICATE doesn't select these algos but required for
correctness if certificates contain sha384WithRSAEncryption or
sha512WithRSAEncryption OIDs.
Signed-off-by: Dhananjay Phadke <dphadke@linux.microsoft.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add a driver which allows to use of LEDs connected
to PWM (Linux compatible).
MAINTAINERS: add i.vozvakhov as a maintainer of leds-pwm
C(required during new functionality adding).
Signed-off-by: Ivan Vozvakhov <i.vozvakhov@corp.mail.ru>
Modify function to support any salt length instead of max
length only. Function now detects salt length by parsing
the content of db buffer. Note that it works with (but is
not limited to) zero-length, digest-length and max-length
Signed-off-by: SESA644425 <gioja.hermann@non.se.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Prior to introduction of modifications in rsassa_pss functions
related to padding verification, doing a pass to reduce memory
consumption of function by replacing memory copies of parts of
const buffer by pointers to the original buffer (masked_db and
h are subparts of msg buffer which is declared const, salt is a
subpart of db which is a working buffer, unmodified after being
filled). New pointers scope is limited to the function where
they are declared (not returned to caller by any mean), zeroing
risk of memory fault related to the change.
Signed-off-by: SESA644425 <gioja.hermann@non.se.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Prior to introduction of modifications in rsassa_pss functions
related to padding verification, doing a pass to update
const-correctness in targeted functions to comply with
coding-rules and avoid const-cast
Signed-off-by: SESA644425 <gioja.hermann@non.se.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
incorrect.
Without this delays in R5 SPL are 10x off.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
When the RNG device is secured with OP-TEE, it is only accessible with
the HWRNG TA, the CONFIG_RNG_OPTEE is needed for STM32MP15 targets
with OP-TEE support.
The probe of this RNG driver fails when the TA is not available in OP-TEE
and the previous driver can be used, as CONFIG_RNG_STM32MP1 is activated
and when the associated node is activated in the device tree with:
&rng1 {
status = "okay";
};
When the RNG is used in OP-TEE, this node should be deactivated in
the Linux and U-Boot device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In U-Boot, the discovery of TA based on its UUID on the TEE bus is
not supported.
This patch only binds the driver associated to the new supported
OP-TEE TA = TA_HWRNG when this driver is enable.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add driver for OP-TEE based Random Number Generator on ARM SoCs
where hardware entropy sources are not accessible to normal world
and the RNG service is provided by a HWRNG Trusted Application (TA).
This driver is based on the linux driver: char/hw_random/optee-rng.c
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
To quote the author:
This series adds support for running valgrind against U-Boot's internal
malloc. This allows for much more useful reports to be generated.
Some example output of valgrind run against u-boot/master with this
branch applied may be found at [1]. Note that valgrind gives up around
acpi. This feature still needs a lot of work on suppressions/hints to
filter out the noise properly.
[1] 2a2f99108e/gistfile1.txt
This documents how to get more detailed results from valgrind made possible
by the last two commits.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This annotates malloc and friends so that valgrind can track the heap. To
do this, we need to follow a few rules:
* Call VALGRIND_MALLOCLIKE_BLOCK whenever we malloc something
* Call VALGRIND_FREELIKE_BLOCK whenever we free something (generally after
we have done our bookkeeping)
* Call VALGRIND_RESIZEINPLACE_BLOCK whenever we change the size of an
allocation. We don't record the original request size of a block, and
neither does valgrind. For this reason, we pretend that the old size of
the allocation was for 0 bytes. This marks the whole allocaton as
undefined, so in order to mark all bits correctly, we must make the whole
new allocation defined with VALGRIND_MAKE_MEM_DEFINED. This may cause us
to miss some invalid reads, but there is no way to detect these without
recording the original size of the allocation.
In addition to the above, dlmalloc itself tends to make a lot of accesses
which we know are safe, but which would be unsafe outside of dlmalloc. For
this reason, we provide a suppression file which ignores errors ocurring in
dlmalloc.c
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Valgrind uses magic code sequences to define an ABI that the client may use
to request behavior from the host. In particular, this may be used to
inform valgrind about custom allocators, such as the one used in U-Boot.
This adds headers defining these sequences to U-Boot. It also adds a config
option to disable emission of these sequences entirely, in the (likely)
event that the user does not wish to use valgrind. Note that this option is
called NVALGRIND upstream, but was renamed (and inverted) to
CONFIG_VALGRIND. Aside from this and the conversion of a few instances of
VALGRIND_DO_CLIENT_REQUEST_EXPR to STMT, these headers are unmodified.
These headers were copied from valgrind 3.16.1-4 as distributed in Arch
Linux. They are licensed with the bzip2 1.16 license. This appears to be a
BSD license with some clauses from Zlib.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
i.MX8MQ use SYS_MALLOC_F_LEN 0x2000, not 0x10000. The OCRAM_S only has
32KB memory, use 0x10000 will make SPL not bootable.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Documentation:
* Describe how enable DM_SERIAL for a board
UEFI
* Preparatory patches for better integration of DM and UEFI
* Use sysreset after capsule updates instead of do_reset
* Allow to disable persisting non-volatile variables
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Merge tag 'efi-2022-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc1
Documentation:
* Describe how enable DM_SERIAL for a board
UEFI
* Preparatory patches for better integration of DM and UEFI
* Use sysreset after capsule updates instead of do_reset
* Allow to disable persisting non-volatile variables
This reverts commit 8d61237edbf6314a701cf78da2c5893a73ff5438.
This commit broke environment on literally every board I have access
to, with this revert in place, environment works as it should again.
The problem I observe with this patch is that saved environment in
either SPI NOR or eMMC is never used, the system always falls back
to default environment. The 'saveenv' command does succeed, but then
after reset, the default env is again used.
Furthermore, the commit introduced duplicate code in env_init(), this:
"
if (!prio) {
gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = ENV_INVALID;
return 0;
}
if (ret == -ENOENT) {
gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = ENV_INVALID;
return 0;
}
"
Furthermore, the commit is missing DCO SoB line.
Also note that upstream does not support UltraZed EG board, so
this might have been a patch pulled from downstream which did
depend on some other downstream behavior.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Felix.Vietmeyer@jila.colorado.edu <felix.vietmeyer@jila.colorado.edu>
Cc: Tom Rini <trini@konsulko.com>
When gpio_request_by_name allocates a gpio output it by default will
de-assert the gpio which for phy-reset will take the PHY out of reset.
As this occurs before eth_phy_reset is called to assert the reset
line it can cause undesired affects if reset timings are not properly
met.
Configure the gpio with GPIOD_IS_OUT_ACTIVE so that reset is kept active
(reset asserted) to avoid this.
Cc: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
When gpio_request_by_name allocates a gpio output it by default will
de-assert the gpio which for phy-reset will take the PHY out of reset.
As this occurs before fec_gpio_reset is called to assert the reset
line it can cause undesired affects if reset timings are not properly
met.
Configure the gpio with GPIOD_IS_OUT_ACTIVE so that reset is kept active
(reset asserted) to avoid this.
Cc: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Currently we require PHY interface mode to be known when
finding/creating the PHY - the functions
* phy_connect_phy_id()
* phy_device_create()
* create_phy_by_mask()
* search_for_existing_phy()
* get_phy_device_by_mask()
* phy_find_by_mask()
all require the interface parameter, but the only thing done with it is
that it is assigned to phydev->interface.
This makes it impossible to find a PHY device without overwriting the
set mode.
Since the interface mode is not used during .probe() and should be used
at first in .config(), drop the interface parameter from these
functions. Make the default value of phydev->interface (in
phy_device_create()) to be PHY_INTERFACE_MODE_NA. Move the interface
parameter to phy_connect_dev(), where it should be.
Change all occurrences treewide. In occurrences where we don't call
phy_connect_dev() for some reason (they only configure the PHY without
connecting it to an ethernet controller), set
phydev->interface = value from phy_find_by_mask call.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
The bcmgenet and sun8i_emac drivers call phy_connect(), which finds /
creates the PHY and also connects it to the eth device via
phy_connect_dev(), then set some phydev members (bcmgenet only), and
then call phy_connect_dev() explicitly again.
Drop the second phy_connect_dev(), since it is unnecesary.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Use phydev->is_c45 instead of is_10g_interface(phydev->interface) to
determine whether clause 45 protocol should be used.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
We want to be able to have phydev->interface uninitialized during
->probe(). We should assume that phydev->interface is initialized only
before ->config().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Move PHY_INTERFACE_MODE_NA to the beginning of the enum definition to
make it have zero value. This makes it possible (although not
encouraged) to test for invalid/nonexistent interface mode with !val
instead of val == PHY_INTERFACE_MODE_NA.
The comment near the definition says "Must be last", because when the
constant was introduced in commit 5f184715ecd3 ("Create PHY Lib for
U-Boot"), it was used as the maximum value when interating over the
constants. But this is no longer true - we use PHY_INTERFACE_MODE_MAX
for that now, and so we can move it.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Rename constant PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA to make
it compatible with Linux' naming.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Rename constant PHY_INTERFACE_MODE_COUNT to PHY_INTERFACE_MODE_MAX to
make it compatible with Linux' naming.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Add helpers ofnode_read_phy_mode() and dev_read_phy_mode() to parse the
"phy-mode" / "phy-connection-type" property. Add corresponding UT test.
Use them treewide.
This allows us to inline the phy_get_interface_by_name() into
ofnode_read_phy_mode(), since the former is not used anymore.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
The "phy-interface-type" property should be "phy-connection-type".
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Use the new dm_mdio_read/write/reset() wrappers treewide, instead of
always getting and dereferencing MDIO operations structure pointer.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Add wrappers dm_mdio_read(), dm_mdio_write() and dm_mdio_reset() for
DM MDIO's .read(), .write() and .reset() operations.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Add helpers ofnode_get_phy_node() and dev_get_phy_node() and use it in
net/mdio-uclass.c function dm_eth_connect_phy_handle(). Also add
corresponding UT test.
This is useful because other part's of U-Boot may want to get PHY ofnode
without connecting a PHY.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the ARRAY_SIZE() macro instead of hardcoding sizes of arrays in
macros.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
These global variables should both have type
static const char * const
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
The type of the return value of phy_read() and phy_read_mmd() is int.
Change the variable to not be unsigned so that we not get into an
unsigned compared against 0.
Signed-off-by: Haolin Li <li.haolin@qq.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
A DM_ETH driver may use phy_connect() towards a PHY address on an MDIO
bus which is not specified in the device tree, as evidenced by:
pfe_eth_probe
-> pfe_phy_configure
-> phy_connect
When this happens, the PHY will have an invalid OF node.
When ar803x_config() runs, it silently fails at ar803x_of_init(), and
therefore, fails to run the rest of the initialization.
This makes MII_BMCR contain what it had after BMCR_RESET (0x8000) has
been written into it by phy_reset(). Since BMCR_RESET is volatile and
self-clearing, the MII_BMCR ends up having a value of 0x0. The further
configuration of this register, which is supposed to be handled by
genphy_config_aneg() lower in ar803x_config(), never gets a chance to
run due to this early error from ar803x_of_init().
As a result of having MII_BMCR as 0, the following symptom appears:
=> setenv ethact pfe_eth0
=> setenv ipaddr 10.0.0.1
=> ping 10.0.0.2
pfe_eth0 Waiting for PHY auto negotiation to complete......... TIMEOUT !
Could not initialize PHY pfe_eth0
Manually writing 0x1140 into register 0 of the PHY makes the connection
work, but it is rather desirable that the port works without any manual
intervention.
Fixes: fe6293a80959 ("phy: atheros: add device tree bindings and config")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
A DM_ETH driver may use phy_connect() towards a PHY address on an MDIO
bus which is not specified in the device tree, as evidenced by:
pfe_eth_probe
-> pfe_phy_configure
-> phy_connect
When this happens, the PHY will have an invalid OF node.
The dp83867_config() method has extra initialization steps which are
bypassed when the PHY lacks an OF node, which is undesirable because it
will lead to broken networking. Allow the rest of the code to run.
Fixes: 085445ca4104 ("net: phy: ti: Allow the driver to be more configurable")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
With dm-tag feature, any U-Boot subsystem is allowed to associate
arbitrary number of data with a particular udevice. This can been
see as expanding "struct udevice" without modifying the definition.
As a first user, UEFI subsystem makes use of tags to associate
an efi_disk object with a block device.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
virtio_init() enumerates all the peripherals that are to be materialised
with udevices(UCLASS_VIRIO) and creates particular device instances
(UCLASS_BlK or whatever else) as children.
On the other hand, device_probe() won't be invoked against those resultant
udevices unlike other ordinary device drivers do in the driver model.
This is particularly inconvenient when we want to add "event notification"
callback so that we will be able to automatically create all efi_disk
objects in a later patch.
With this patch applied, "virtio scan" will work in a similar way
to "scsi rescan", "usb start" or others in term of 'probe' semantics.
I didn't add this change to virtio_init() itself because this function
may be called in board_init_r() (indirectly in board_late_init())
before UEFI subsustem is initialized.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Every time an ide bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.
In particular, support for creating partitions on a device will be added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Every time a sata bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.
In particular, support for creating partitions on a device will be added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Every time a nvme bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.
In particular, support for creating partitions on a device will be added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Every time a mmc bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.
In particular, support for creating partitions on a device will be added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Every time a usb bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.
In particular, support for creating partitions on a device will be added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Every time a scsi bus/port is scanned and a new block device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.
In particular, support for creating partitions on a device will be added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use sysreset_walk_halt() directly from reset-after-capsule-on-disk
feature to reboot (cold reset) machine instead of using reset command
interface, since this is not a command.
Note that this will make CONFIG_EFI_CAPSULE_ON_DISK depending on
the CONFIG_SYSRESET.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make efi_load_capsule_drivers() available even if EFI_CAPSULE_ON_DISK
is disabled because the caller (efi_init_obj_list()) expects it only
relays on EFI_HAVE_CAPSULE_SUPPORT.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Disable 'capsule disk-update' option for the efidebug command
when CONFIC_EFI_CAPSULE_ON_DISK is disabled, because this option
is available only when the EFI capsule update on disk is enabled.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since be66b89da306 ("efi_loader: configuration of variables store")
the choice of EFI_VARIABLE_FILE_STORE or EFI_MM_COMM_TEE
is mutually-exclusive, however efi_var_to_file also allows
for "neither". Provide an additional Kconfig option.
Signed-off-by: Tom Saeger <tom.saeger@oracle.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Provide settings for enabling the debug UART of the virt machine on
RISC-V QEMU.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* add link to booti man-page
* correct link description for efidebug command
* correct punctuation
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This is an attempt to cover the common cases found when enabling driver
model for serial on a new board.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Take as reference Linux kernel code:
drivers/gpio/gpio-pca953x.c
Signed-off-by: Luca Ellero <l.ellero@asem.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the CONFIG macros to conditionally build the GPIO hogging support in
either the SPL or U-Boot, or both, depending on the configuration. Also
call the GPIO hog probe function in the common SPL board initialization
as an equivalent to adding it to the U-Boot init sequence functions.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for the upstream gpio-line-names property already described
in the common GPIO binding document[1]. The ability to search for a line
name allows boards to lift the implementation of common GPIO behaviours
away from specific line indexes on a GPIO controller.
[1] 3c35bfee83/dtschema/schemas/gpio/gpio.yaml (L17)
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Based on current usage, migrate a number of DP-DDR related options to
Kconfig.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This platform has CONFIG_ETH_DESIGNWARE set already, which is the
correct value for the driver in question. Remove this incorrect line.
Signed-off-by: Tom Rini <trini@konsulko.com>
As no platforms override this value, set it for all mpc83xx platforms.
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
We use 'DEBUG' and not 'CONFIG_DEBUG' tree-wide for debug code that is
left in, and not wrapped by some other regular debugging type print
macro.
Cc: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Move these two options to the arch Kconfig file.
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
This symbol is only possibly useful on some mvebu platforms, so move the
symbol there and select it for the only current user.
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This is a little tricky since SoCFPGA has code to determine this as
runtime. Introduce a guard variable for platforms to select if they
have a static value to use. Then for ARCH_SOCFPGA, call
cm_get_qspi_controller_clk_hz() and otherwise continue the previous
behavior.
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CONS_SCIF0
CONFIG_CONS_SCIF1
CONFIG_CONS_SCIF2
CONFIG_CONS_SCIF4
CONFIG_CONS_SCIFA0
Signed-off-by: Tom Rini <trini@konsulko.com>
These values are only used in one file, reference them more directly.
Cc: Kamil Lulko <kamil.lulko@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: uboot-stm32@st-md-mailman.stormreply.com
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This code is only used on the corvus platform, so migrate the LED on/off
code to this platform and remove it from the CONFIG namespace. In
theory, this should likely be moved to the modern GPIO LED driver as a
further cleanup.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
A number of CONFIG options are used on these platforms as part of the
default environment. Set some of these more directly and in other
cases, just reference them directly.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CM_INIT
CONFIG_CM_REMAP
CONFIG_CM_SPD_DETECT
CONFIG_CM_MULTIPLE_SSRAM
CONFIG_CM_TCRAM
We make the first three of these options be always enabled, as that
matches usage. We select the last two based on how they were defined in
armcoremodule.h. This also allows us to remove some unused code in
board/armltd/integrator/lowlevel_init.S
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This option is only enabled for CI_UDC and !TEGRA20, so implement it as
such in Kconfig directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
This register is referenced in one location and does not seem
configurable, so remove it from CONFIG namespace.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This converts the following to Kconfig:
CONFIG_BOARD_SIZE_LIMIT
To do this, introduce CONFIG_HAS_BOARD_SIZE_LIMIT.
Signed-off-by: Tom Rini <trini@konsulko.com>
- Assorted env tooling updates
- Bug fix around multiple possible env locations and ENV_IS_NOWHERE
- Add 'indirect' sub-command to env
- Allow for FAT env to have the location overridden by the board code.
At present the tests assume that gawk is being used. Adjust the tests so
that the names are inserted in alphabetical order, so that awk is happy.
Also use PROCINFO to make gawk output in alphabetical order. This is not
ideal, since it changes the env-car ordering from what the user provided,
but it may be acceptable.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fixes: https://source.denx.de/u-boot/u-boot/-/issues/10
Drop this text at the end since it already mentions bootp and dhcp.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This doesn't really make much sense in the documentation. Add a code
comment instead.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
This will sort the default environment file generated by
"make u-boot-initial-env", but won't sort the default
environment in the compiled u-boot binary. The file
u-boot-initial-env is considered to use for the userpace
environment access tools [1] in case of that the
environments is written the first time into its location.
This is done on the one hand for a better overview and
comparison of the generated environment file. On the other
hand it is to synchronize the output with the script
get_default_env.sh, which generated a sorted default
environment file. The sorting preserves the order of equal
variable names by sorting only the variable name, and
disable the last-resort comparison. After sorting,
unnoticed blank lines at the end move to the top. Avoid
that by removing it before sorting.
[1] https://github.com/sbabic/libubootenv
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Behún <marek.behun@nic.cz>
To: u-boot@lists.denx.de
Reviewed-by: Simon Glass <sjg@chromium.org>
After sorting, unnoticed blank lines at the end move to the top.
Avoid this by removing it before sorting.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
For platform which can boot on different device, this allows
to override interface, device and partition from board code
Signed-off-by: He Yong <hyyoxhk@163.com>
This allows an ergonomic-enough approximation of ${!variable} expansion.
This could be used the following way:
```
for target in ${boot_targets}; do
env indirect target_name target_name_${target}
# ...
done
```
Assuming `target_name_mmc0` and similar are set appropriately.
A default value can be optionally provided.
Note: this acts on environment variables, not hush variables.
Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: "Marek Behún" <marek.behun@nic.cz>
[trini: Don't enable by default]
This patch prevent u-boot from hanging on a UltraZed EG board (zynqmp).
Without the patch,
(drv = env_driver_lookup(ENVOP_INIT, prio))
evaluates to 0, causing prio = 0
Then, (!prio) is hit, returning -ENODEV causing a stall.
With the patch,
instead of returning -ENODEV and causing a stall, we
set gd->env_addr (is this really needed?)
and then
mark gd->env_valid = ENV_INVALID to use the default env.
When adding new features to imx8m boards, such as DM clock support,
the malloc area can be exhausted.
To avoid such issue, provide a reasonable default for the
SYS_MALLOC_F_LEN size.
Quoting Tom Rini:
"This seems to be an area where everyone is either:
- Kicking the value up a bit for themselves
- Having hard to figure out problems booting the platform because it's
too small a value until they see someone else picked a larger value.
So lets raise these a bit and get some acks, please."
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon, imx8mn-beacon
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
To quote the author:
This series collects together various misc patches that were needed when
building mainline U-Boot against Chromium OS verified boot. Most of them
fix minor bugs.
This file uses struct driver, so declare it at the top in case the
header-inclusion order is not as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is normally defined in stdint.h but is not used in U-Boot. When
libraries (such as Chromium OS vboot) are built against U-Boot they may
expect this value to be available. Add it to avoid build errors in this
case.
Signed-off-by: Simon Glass <sjg@chromium.org>
These filesystems may have different settings for SPL and TPL. Use the
correct Makefile variable to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
When SPI flash is used in SPL there is no console, so ctrlc() cannot be
called. Add a condition to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
We don't use an appended tree for sandbox and the required symbols are
not present. Add a condition to avoid a build error.
Signed-off-by: Simon Glass <sjg@chromium.org>
If the buffer is empty and not allocated, then abuf_realloc() tries to
copy invalid data. This happens because an incorrect change to use
memdup() was added after the original code was written.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the header file defines this function in SPL but the file may
not actually be built. This causes a build error if the option is enabled.
Fix the condition in the header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
The conversion to bintools broke the invocation of the utility, since
the arguments are not correct. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
- Add DM_PMIC support to TPS65217 and migrate some platforms to it.
- mkimage verification fixes
- DM rST fix, add missing flag when linking u-boot-elf.o
We use Sphinx style comments to describe functions.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If image backend provides verify_header callback then call it after writing
image to disk. This ensures that written image is correct.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
rockchip header_v2 do not have a spl_hdr, so remove the verify.
Signed-off-by: Yi Liu <liuyi@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
fix compile error when using a little-endian to build with configs:
sfr_nb4-ser_ram_defconfig
comtrend_wap5813n_ram_defconfig
comtrend_ar5387un_ram_defconfig
comtrend_ct5361_ram_defconfig
comtrend_vr3032u_ram_defconfig
comtrend_ar5315u_ram_defconfig
huawei_hg556a_ram_defconfig
netgear_dgnd3700v2_ram_defconfig
Signed-off-by: Du Huanpeng <dhu@hodcarrier.org>
When trying to run qemu-riscv64_smode_defconfig with 32 harts booting
fails. The debug UART shows a message
alloc space exhausted
32 is the current maximum number of harts for machine virt in QEMU 7.0.
Raise the default for SYS_MALLOC_F_LEN to 16 KiB.
Move the setting to /Kconfig where we define SYS_MALLOC_F_LEN for
other architectures too.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Let CONFIG_TARGET_QEMU_VIRT imply CONFIG_CMD_SBI.
The sbi command provides detailed information about the SBI.
It is useful to test the discovery of extensions.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Let the sbi command display:
* machine vendor ID
* machine architecture ID
* machine implementation ID
With this patch the output for the HiFive Unmatched looks like
=> sbi
SBI 0.3
OpenSBI 0.9
Machine:
Vendor ID 489
Architecture ID 8000000000000007
Implementation ID 20181004
Extensions:
sbi_set_timer
sbi_console_putchar
sbi_console_getchar
sbi_clear_ipi
sbi_send_ipi
sbi_remote_fence_i
sbi_remote_sfence_vma
sbi_remote_sfence_vma_asid
sbi_shutdown
SBI Base Functionality
Timer Extension
IPI Extension
RFENCE Extension
Hart State Management Extension
System Reset Extension
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Provide library functions to read:
* machine vendor ID
* machine architecture ID
* machine implementation ID
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Version 1.0-rc3 of the RISC-V Supervisor Binary Interface Specification
has added the Performance Monitoring Unit Extension.
The sbi command should be able to detect it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The tps65217 PMIC driver is used with am335x SoC based designs.
It is used in the SPL (MLO) as well, so the DM conversion only is
for u-boot proper.
This driver only allows simple reading/writing/dumping of the content
of its registers and requires the DM_I2C for proper operation.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Up till now the CONFIG_POWER_TPS65217 has been defined in several header
files for am335x SoC.
This patch renames it to CONFIG_PMIC_TPS65217, which better reflects the
role of this IC circuit.
Moreover, new CONFIG_PMIC_TPS65217 has been introduced in Kconfig
to be used with boards, which both support DM_PMIC and DM_I2C.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Migrate all other platforms as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
xilinx:
- Allow booting bigger kernels till 100MB
zynqmp:
- DT updates (reset IDs)
- Remove unneeded low level uart initialization from psu_init*
- Enable PWM features
- Add support for 1EG device
serial_zynq:
- Change fifo behavior in DEBUG mode
zynq_sdhci:
- Fix BASECLK setting calculation
clk_zynqmp:
- Add support for showing video clock
gpio:
- Update slg driver to handle DT flags
net:
- Update ethernet_id code to support also DM_ETH_PHY
- Add support for DM_ETH_PHY in gem driver
- Enable dynamic mode for SGMII config in gem driver
pwm:
- Add driver for cadence PWM
versal:
- Add support for reserved memory
firmware:
- Handle PD enabling for SPL
- Add support for IOUSLCR SGMII configurations
include:
- Sync phy.h with Linux
- Update xilinx power domain dt binding headers
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Merge tag 'xilinx-for-v2022.07-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.07-rc1 v2
xilinx:
- Allow booting bigger kernels till 100MB
zynqmp:
- DT updates (reset IDs)
- Remove unneeded low level uart initialization from psu_init*
- Enable PWM features
- Add support for 1EG device
serial_zynq:
- Change fifo behavior in DEBUG mode
zynq_sdhci:
- Fix BASECLK setting calculation
clk_zynqmp:
- Add support for showing video clock
gpio:
- Update slg driver to handle DT flags
net:
- Update ethernet_id code to support also DM_ETH_PHY
- Add support for DM_ETH_PHY in gem driver
- Enable dynamic mode for SGMII config in gem driver
pwm:
- Add driver for cadence PWM
versal:
- Add support for reserved memory
firmware:
- Handle PD enabling for SPL
- Add support for IOUSLCR SGMII configurations
include:
- Sync phy.h with Linux
- Update xilinx power domain dt binding headers
In current slg7xl45106 gpio driver xlate() function we are not updating
gpio flags from DT. Read the given flag from DT and update the gpio desc
flags variable with required gpio direction state.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/a8d7b4799337bd99f61ace509889f02b192a9414.1648631275.git.michal.simek@xilinx.com
As we are not reading the PHY address in case of CONFIG_ETH_PHY in plat
function, phy address always prints as -1. So move the ethernet info
print statement to probe function, to display proper phy address.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f6efc6719d767b1bebe65987c22c6d52329f4225.1648631275.git.michal.simek@xilinx.com
If DM_ETH_PHY config is enabled PHY gpio reset is taken care by the
eth-phy-uclass driver, so use the PHY gpio reset functionality from
ethernet_id file when this config is disabled to reset the PHY.
Use debug() print instead of dev_err() to avoid warning incase if phy-id
compatible string is not present.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/4d0fd3f9f886c1d943776025e5efb5438b0eb389.1648631275.git.michal.simek@xilinx.com
While creating a phy device using phy_device_create(), we need to
provide a valid phyaddr instead of 0 causing phy address being
registered as 0 with mdio bus and shows mdio phy list as below
ZynqMP> mdio list
eth0:
0 - TI DP83867 <--> ethernet@ff0b0000
eth1:
0 - TI DP83867 <--> ethernet@ff0c0000
Also PHY soft reset is being requested on 0 instead of valid
address causing "PHY reset timed out" error.
So add phyaddr argument to phy_connect_phy_id() and to its prototype
to create phy device with valid phyaddress.
Fixes: a744a284e354 ("net: phy: Add support for ethernet-phy-id with gpio reset")
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Link: https://lore.kernel.org/r/fe35fddb9faa5af577ffdfabaec6879c935a30f8.1648562755.git.michal.simek@xilinx.com
A big part is the DM pinctrl driver, which allows us to get rid of quite
some custom pinmux code and make the whole port much more robust. Many
thanks to Samuel for that nice contribution! There are some more or less
cosmetic warnings about missing clocks right now, I will send the trivial
fixes for that later.
Another big chunk is the mkimage upgrade, which adds RISC-V and TOC0
(secure images) support. Both features are unused at the moment, but I
have an always-secure board that will use that once the DT lands in the
kernel.
On top of those big things we have some smaller fixes, improving the
I2C DM support, fixing some H6/H616 early clock setup and improving the
eMMC boot partition support.
The gitlab CI completed successfully, including the build test for all
161 sunxi boards. I also boot tested on a A64, A20, H3, H6, and F1C100
board. USB, SD card, eMMC, and Ethernet all work there (where applicable).
Now that the SPL can safely detect whether it was loaded from an eMMC
boot partition or the normal user data partition, let's enable this
feature on some boards that feature eMMC storage.
That covers the boards where I could test this on, and allows the same
build to be written to an SD card, eMMC user partition, eMMC boot
partition, or into SPI NOR flash.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When the Allwinner BROM loads the SPL from an eMMC boot partition, it
sets the boot source byte to the same value as when booting from the
user data partition. This prevents us from determining the boot source
to load U-Boot proper from the proper partition for sure.
The generic SPL MMC code already looks at the enabled boot partition
number, to load U-Boot proper from the same partition, but this fails
if there is nothing bootable in this partition, as the BROM then
silently falls back to the user data partition, which the SPL misses.
To learn about the actual boot source anyway, we repeat the algorithm
the BROM used to select the boot partition in the first place:
- Test EXT_CSD[179] to check if an eMMC boot partition is enabled.
- Test EXT_CSD[177] to check for valid MMC interface settings.
- Check if BOOT_ACK is enabled.
- Check the beginning of the first sector for a valid eGON signature.
- Load the whole SPL.
- Recalculate the checksum to verify the SPL is valid.
If one of those steps fails, we bail out and continue loading from the
user data partition. Otherwise we load from the selected boot partition.
Since the boot source is needed twice in the boot process, we cache the
result of this test to avoid doing this costly test multiple times.
This allows the very same image file to be put onto an SD card, into the
eMMC user data partition or into the eMMC boot partition, and safely
loads the whole of U-Boot from there.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Makes it possible to use 16-bit DDR memory.
Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Add CONFIG_NR_DRAM_BANKS from am64x_evm_a53_defconfig as this is needed
to calculate the size of DDR that is available.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Call into k3-ddrss driver to fixup device tree and resize the available
amount of DDR if ECC is enabled.
A second fixup is required from A53 SPL to take the fixup as done from
R5 SPL and apply it to DT passed to A53 U-boot, which in turn passes
this to the OS.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Introduce ECC Functionality for full memory space as implemented in the
DDRSS. The following is done to accomplish this:
* Introduce a memory region "ss" to allow dt to provide DDRSS region,
which is not the same as "ctl" which is the controller region.
* Introduce a "ti,ecc-enable" flag which allows a memorycontroller
instance to enable ecc.
* Introduce functionality to properly program the DDRSS registers to
enable ECC for the full DDR memory space if enabled with above flag.
* Expose a k3_ddrss_ddr_fdt_fixup call to allow fixup of fdt blob to
account from DDR memory that must be reserved for ECC operation.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The current address being read from dt actually represents the ddrss_ctl
memory region, while ddrss_ss region is something else. Introduce
ddrss_ctl_regs and use it to free up ddrss_ss_regs for its proper
purpose later so that we can avoid confusion.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Use the appropriate fdtdec_setup_mem_size_base and
fdtdec_setup_bank_size calls in dram_init and dram_bank_init to pull
these values from DT, where they are already available, instead of
hardcoding them.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Timer0 runs at 200MHz,and the clock-frequency defined in DT is
incorrect. Fix it.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-By: Nishanth Menon <nm@ti.com>
On arm64 systems, recommendation is to use per-cpu timer for time
keeping. Currently AM64 ends up using DM timer as tick timer as driver
is enabled in the config. Drop OMAP DM Timer related configs, this will
switch to using armv8 per-cpu timer as tick timer for A53 SPL/U-Boot.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-By: Nishanth Menon <nm@ti.com>
On AM64x devices, it is possible to route Main ESM0 error events to MCU
ESM. MCU ESM high error output can trigger the reset logic to reset the
device. So, for these devices we expect two ESM device nodes in the
device tree, one for Main ESM and the another MCU ESM in the device tree.
When these ESM device nodes are properly configired it is possible to
route the Main RTI0 WWDT output to the MCU ESM high output through Main
ESM and trigger a device reset when
CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is set to '0'.
On K3 AM64x devices, the R5 SPL u-boot handles the ESM device node
configurations.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Enable access to ESM0 configuration space and add Main ESM0 and MCU ESM
nodes to the AM64 device tree.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Add functionality to enable, set priority to the input events and to
route to MCU ESM. On AM64x/AM62x devices, it is possible to route Main
ESM0 error events to MCU ESM. When these error events are routed to MCU
ESM high output, it can trigger the reset logic to reset the device,
when CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is set to '0'.
K3 based J7 devices (ex: J721e) also have ESM modules, and the changes
to the driver does not impact those devices.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
U-boot is intended to replace linux kernel in android boot image(ABL), and
it's FIT payload to replace initramfs file. The boot process is similar to
boot image with linux:
- android bootloader (ABL) unpacks android boot image
- ABL sets `linux,initrd-start property` in chosen node in unpacked FDT
- ABL sets x0 register to FDT address, and passes control to u-boot
- u-boot reads x0 register, and stores it in `prevbl_fdt_addr` env variable
- u-boot reads `linux,initrd-start` property,
and stores it in `prevbl_initrd_start_addr`
In this way, u-boot bootcmd relies on `prevbl_initrd_start_addr` env
variable, and boils down to `bootm $prevbl_initrd_start_addr`.
If more control on boot process is desired, pack a boot script in
FIT image, and put it to default configuration
What done:
- Rearrange defconfig option order
- Add CONFIG_SAVE_PREV_BL_* options
- Doc updates:
- remove wrong SBOOT memory corruption note, because
memory is changed during u-boot bringup process,
not by SBOOT
- put payload on ramdisk place in abl boot image
creation step
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Platforms can overwrite the weak definition of spl_mmc_boot_mode() to
determine where to load U-Boot proper from.
For most of them this is a trivial decision based on Kconfig variables,
but it might be desirable the probe the actual device to answer this
question.
Pass the pointer to the mmc struct to that function, so implementations
can make use of that.
Compile-tested for all users changed.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Ley Foon Tan <ley.foon.tan@inte.com> (for SoCFPGA)
Acked-by: Lokesh Vutla <lokeshvutla@ti.com> (for OMAP and K3)
Reviewed-by: Simon Glass <sjg@chromium.org>
BSP boot0 executes resistor calibration before clocks are initialized.
Let's do that.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
H6 and H616 SPL code has a few writes to unknown PRCM registers. Now
that we know what they are, let's replace magic offsets with proper
register names.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Fix non working console on uart2, that seems releated to both
Allwinner H2+ and H3.
Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
[Andre: remove H2+, rearrange pin setup order]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This syncs the sun8i-h3-nanopi-neo.dts from the Linux tree, from tag
v5.18-rc1.
The alias is required to enable automatic MAC address generation.
Signed-off-by: Baltazár Radics <baltazar.radics@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently, clock/reset setup for this device is handled by a
platform-specific function and is intermixed with non-DM pinctrl
setup. Use the devicetree to get clocks/resets, which disentagles
it from the pinctrl setup in preparation for moving to DM_PINCTRL.
This also has the added benefit of picking the right clock/reset
bits for H6 and new SoCs that have a rearranged PRCM MMIO space.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Chips attached to the RSB bus require an initialization command before
they can be used. (Specifically, this command programs the chip's
runtime address.) The driver does this in its .probe_chip hook, under
the assumption that .probe_chip is called during child probe. This is
not the case; .probe_chip is only called by dm_i2c_probe, which is
intended for use by board-level code, not for chips with OF nodes.
Since this initialization command must be run before a child chip can be
used, do it before probing each child.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently, clock/reset setup for this device is handled by a
platform-specific function and is intermixed with non-DM pinctrl
setup. Use the devicetree to get clocks/resets, which disentagles
it from the pinctrl setup in preparation for moving to DM_PINCTRL.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Chips attached to the P2WI bus require an initialization command before
they can be used. (Specifically, this switches the chip from I2C mode
to P2WI mode.) The driver does this in its .probe_chip hook, under the
assumption that .probe_chip is called during child probe. This is not
the case; .probe_chip is only called by dm_i2c_probe, which is intended
for use by board-level code, not for chips with OF nodes.
Since this initialization command must be run before a child chip can be
used, do it before probing each child.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Now that mkimage can generate TOC0 images, and the SPL can interpret
them, hook up the build infrastructure so the user can choose which
image type to build. Since the absolute load address is stored in the
TOC0 header, that information must be passed to mkimage.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
SPL uses the image header to detect the boot device and to find the
offset of the next U-Boot stage. Since this information is stored
differently in the eGON and TOC0 image headers, add code to find the
correct value based on the image type currently in use.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Most Allwinner sunxi SoCs have separate boot ROMs in non-secure and
secure mode. The "non-secure" or "normal" boot ROM (NBROM) uses the
existing sunxi_egon image type. The secure boot ROM (SBROM) uses a
completely different image type, known as TOC0.
A TOC0 image is composed of a header and two or more items. One item
is the firmware binary. The others form a chain linking the firmware
signature to the root-of-trust public key (ROTPK), which has its hash
burned in the SoC's eFuses. Signatures are made using RSA-2048 + SHA256.
The pseudo-ASN.1 structure is manually assembled; this is done to work
around bugs/quirks in the boot ROM, which vary between SoCs. This TOC0
implementation has been verified to work with the A50, A64, H5, H6,
and H616 SBROMs, and it may work with other SoCs.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
As mkimage -T sunxi_egon now gains support for -A parameter, specify the
architecture when generating SPL boot image for sunxi.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
There's now a sun20i family in sunxi, which uses RISC-V CPU.
Add support for making eGON.BT0 image for RISC-V.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Refactor some functions in mkimage sunxi_egon type, in order to prepare
for adding support for more CPU architectures (e.g. RISC-V). In
addition, compatibility for operation w/o specified architecture is
kept, in this case the architecture is assumed as ARM.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The sunxi_egon type used to take no -A argument (because we assume sunxi
targets are all ARM). However, as Allwinner D1 appears as the first
RISC-V sunxi target, we need to support -A; in addition, as external
projects rely on U-Boot mkimage to generate sunxi eGON.BT0 header, we
need to keep compatibility with command line without -A.
As the default value of arch in mkimage is not proper (IH_ARCH_PPC
instead of IH_ARCH_INVALID), to keep more compatibility, add an Aflag
field to image parameters to describe whether an architecture is
explicitly specified.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This is the only possible mux setting for the A64's PWM peripheral.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When the DM_I2C driver is loaded, the pin setup is done automatically
from the device tree by the pinctrl driver.
Clean up the code in the process: remove #ifdefs and recognize that the
pin configuration is the same for all sun8i/sun50i SoCs, not just those
which select CONFIG_MACH_SUN8I.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When the DM_I2C driver is loaded, the pin setup is done automatically
from the device tree by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
These options are not currently enabled anywhere. Any new users should
use DM clocks and pinctrl.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Where multiple options were available, the one matching board.c and the
device trees was chosen.
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fixup H5 I2C1 pinmux]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This includes UART0 and R_UART (s_uart) on all supported platforms, plus
the additional UART configurations from arch/arm/mach-sunxi/board.c.
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The sunxi pinctrl hardware has bias and drive control. Add driver
support for configuring those options.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The pinmux command uses this function to display pinmux status.
Since the driver cannot map pin numbers to a list of supported
functions, only functions which are common across all pins can be
reported by name.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Implement the operations to get pin and function names, and to set the
mux for a pin. The pin count and pin names are calculated as if each
bank has the maximum number of pins. Function names are simply the index
into a list of { function name, mux value } pairs.
We assume all pins associated with a function use the same mux value for
that function. This is generally true within a group of pins on a single
port, but generally false when some peripheral can be muxed to multiple
ports. For example, A64 UART3 uses mux 3 on port D, and mux 2 on port H.
But all of the port D pins use the same mux value, and so do all of the
port H pins. This applies even when the pins for some function are not
contiguous, and when the lower-numbered mux values are unused. A good
example of both of these cases is SPI0 on most SoCs.
This strategy saves a lot of space (which is especially important for
SPL), but where the mux value for a certain function differs across
ports, it forces us to choose a single port for that function at build
time. Since almost all boards use the default (i.e. reference design)
pin muxes[1], this is unlikely to be a problem.
[1]: See commit dda9fa734f81 ("sunxi: Simplify MMC pinmux selection")
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: add comment summarising the commit message]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Create a do-nothing driver for each sunxi pin controller variant.
Since only one driver can automatically bind to a DT node, since the
GPIO driver already requires a manual binding process, and since the
pinctrl driver needs access to some of the same information, refactor
the GPIO driver to be bound by the pinctrl driver. This commit should
cause no functional change.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
U-boot is intended to replace linux kernel in android boot image(ABL), and
it's FIT payload to replace initramfs file. The boot process is similar to
boot image with linux:
- android bootloader (ABL) unpacks android boot image
- ABL sets `linux,initrd-start property` in chosen node in unpacked FDT
- ABL sets x0 register to FDT address, and passes control to u-boot
- u-boot reads x0 register, and stores it in `prevbl_fdt_addr` env variable
- u-boot reads `linux,initrd-start` property,
and stores it in `prevbl_initrd_start_addr`
In this way, u-boot bootcmd relies on `prevbl_initrd_start_addr` env
variable, and boils down to `bootm $prevbl_initrd_start_addr`.
If more control on boot process is desired, pack a boot script in
FIT image, and put it to default configuration
What done:
- strip unneeded config options
- add FIT image support
- add framebuffer node, u-boot logo and video console
- increase LMB_MAX_REGIONS, to store all linux dtb reserved memory regions
- add linux kernel image header
Uart driver causes hang, when u-boot is used in android boot image instead
of linux. Temporary disable console driver, until investigated and fixed.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
When u-boot is used as a chain-loaded bootloader (replacing OS kernel),
previous bootloader leaves data in RAM, that can be reused.
For example, on recent arm linux system, when chainloading u-boot,
there are initramfs and fdt in RAM prepared for OS booting. Initramfs
may be modified to store u-boot's payload, thus providing the ability to
use chainloaded u-boot to boot OS without any storage support.
Two config options added:
- SAVE_PREV_BL_INITRAMFS_START_ADDR
saves initramfs start address to 'prevbl_initrd_start_addr' environment
variable
- SAVE_PREV_BL_FDT_ADDR
saves fdt address to 'prevbl_fdt_addr' environment variable
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
We already support the NVMe commands and PCIe backend in the QEMU target,
so let's make it easy for anyone to consume them and enable NVMe distro
boot along the way!
With this patch, I can put an NVMe backed disk image into my QEMU VM and
have it automatically load a UEFI target blob.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
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Merge tag 'u-boot-at91-2022.07-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2022.07 cycle:
This feature set includes the new driver for the Atmel TCB timer,
alignment in DT for sama7g5 and sama7g5ek board, one Kconfig conversion
for external reset, and the usage of Galois tables from ROM for sama5d2
device.
If include/generated/env.in does not exist, which is a typical case for
clean build, quiet_cmd_gen_envp command tries to delete this file
unconditionally.
This produces following warning during the build:
ENVP include/generated/env.in
rm: cannot remove 'include/generated/env.in': No such file or directory
Add '-f' option to the `rm` command to not complain if file does not
exist.
Fixes: f432eb6d8a9d ("env: Avoid using a leftover text-environment file")
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Unfortunately, we require additional logic to buildman to support this
removal and still use SYS_SOC, etc, for build targets.
This reverts commit eeec00072d7a0b5b91896d014618e558ce438738.
Signed-off-by: Tom Rini <trini@konsulko.com>
This brings in two related series. The first from Andre:
This series is the continuation of last year's effort to support the new
Armv8-R64 application profile. This led to a significant rework of the
existing fastmodel (FVP) support, to both upgrade it to newest U-Boot
standards (OF_CONTROL and distro_boot support), but also to generalise
the code, so that plugging in the v8-R64 support in the last patch gets
much easier. This is because apart from the twisted memory map between
the two profiles there is actually little difference, when it comes to
U-Boot relevant parts of the hardware.
I kept the legacy semihosting support (which picks up magic files from
the current directory), but if that fails, we go and try virtio-blk
(.iso installer images work), then virtio-net.
Please have a look, and give it a try, if possible. Both the v8-R and
v8-A FVP models are available for free on the Arm website[1].
Patch 01/11 fixes a regression introduced in December, it should be
applied now. The rest of the patches are for the next merge window.
[1]
https://developer.arm.com/tools-and-software/simulation-models/fast-models
And the second from Sean (where we exclude 27, 28 and 29 for now):
This cleans up the semihosting code and adds the following new features:
- hostfs support (like sandbox)
- support for being used as a SPL boot device
- serial device support
- falling back to normal drivers if semihosting is disabled
The main device affected by these changes is vexpress64, so I'd
appreciate
if Andre (or anyone else) could try booting.
These changes are motivated by bringup for ls1046a. When forcing JTAG
boot, this device disables most communication peripherals, including
serial and ethernet devices. This appears to be fixed in later
generation devices, but we are stuck with it for now. Semihosting
provides an easy way to run a few console commands.
The patches in this series are organized as follows:
0-4: rST conversions and other documentation updates
5-9: Semihosting cleanups
10-14: Filesystem support (including SPL boot device)
15-16: Serial support
16: Documentation update
17: JTAG boot support for LS1046A
19-25: Semihosting fallback
26-29: DM puts support
The last two groups of patches are "bonus;" the first 17 patches stand
on their own. The last two groups could be broken out as separate
series, but I have kept them in this one to help with my sanity (and not
have to deal with too many outstanding series).
Patch 14 depends on [1] to apply cleanly. Patch 17 depends on [2] for
correctness. This series should be applied to u-boot/next (in
particular, the EROFS series must have been applied).
[1]
https://lore.kernel.org/u-boot/CACRpkdZ+9fmNjC_mvrbPa9-iuTQVd8UkJ7Zpe7cL0c5vZygsVw@mail.gmail.com/T/
[2]
https://lore.kernel.org/u-boot/20220222183840.1355337-2-sean.anderson@seco.com/
Some serial drivers can be vastly more efficient when printing multiple
characters at once. Non-DM serial has had a puts option for these sorts
of drivers; implement it for DM serial as well.
Because we have to add carriage returns, we can't just pass the whole
string directly to the serial driver. Instead, we print up to the
newline, then print a carriage return, and then continue on. This is
less efficient, but it is better than printing each character
individually. It also avoids having to allocate memory just to add a few
characters.
Drivers may perform short writes (such as filling a FIFO) and return the
number of characters written in len. We loop over them in the same way
that _serial_putc loops over putc.
This results in around sizeof(void *) growth for all boards with
DM_SERIAL. The full implementation takes around 140 bytes.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the semihosting_enabled function to determine whether or not to
enable semihosting devices. This allows for graceful fallback in the
event a debugger is not attached.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
If semihosting is disabled, then the user has no debugger attached, and
will not see any messages. Don't create a serial device in this
instance, to (hopefully) fall back on another working serial device.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
If a debugger is not attached to U-Boot, semihosting calls will raise a
synchronous abort exception. Try to catch this and disable semihosting
so we can e.g. use another uart if one is available. In the immediate
case, we return an error, since it is not always possible to check for
semihosting beforehand (debug uart, user-initiated load command, etc.)
We handle all possible semihosting instructions, which is probably
overkill. However, we do need to keep track of what instruction set
we're using so that we don't suppress an actual error.
A future enhancement could try to determine semihosting capability by
inspecting the processor state. There's an example of this at [1] for
RISC-V. The equivalent for ARM would inspect the monitor modei
enable/select bits of the DSCR. However, as the article notes, an
exception handler is still helpful in order to catch disconnected
debuggers.
[1] https://tomverbeure.github.io/2021/12/30/Semihosting-on-RISCV.html#avoiding-hangs-when-a-debugger-is-not-connected
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
These functions are intended to support detecting semihosting and
falling back gracefully to alternative implementations. The test starts
by making semihosting call. SYS_ERRNO is chosen because it should not
mutate any state. If this semihosting call results in an exception
(rather than being caught by the debugger), then the exception handler
should call disable_semihosting() and resume execution after the call.
Ideally, this would just be part of semihosting by default, and not a
separate config. However, to reduce space ARM SPL doesn't include
exception vectors by default. This means we can't detect if a
semihosting call failed unless we enable them. To avoid forcing them to
be enabled, we use a separate config option. It might also be possible
to try and detect whether a debugger has enabled (by reading HDE from
DSCR), but I wasn't able to figure out a way to do this from all ELs.
This patch just introduces the generic code to handle detection. The
next patch will implement it for arm64 (but not arm32).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This imports some defines for esr and spsr from Linux v5.16. I have
modified the includes and fixed some indentation nits but otherwise it
is the same. There are a lot more defines than we need, but it doesn't
hurt.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This register holds "pstate" which includes (among other things) the
instruction mode the CPU was in when the exception was taken. This is
necessary to correctly interpret instructions at elr.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
To avoid passing around an extra register everywhere, save esr in
pt_regs like the rest. For proper alignment we need to have a second
(unused) register. All the printfs have to be adjusted, since
it's now an unsigned long and not an int.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds support for booting entirely from JTAG while using a
hard-coded RCW. With these steps, it is not necessary to program a
"good" RCW using CodeWarrior. The method here can be performed with any
JTAG adapter supported by OpenOCD, including the on-board CMSIS-DAP
(albeit very slowly).
These steps require LS1046A support in OpenOCD, which was added in [1].
[1] 5b70c1f679/
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add reference to doc/board/nxp/ls1046ardb.rst]
This documents how to use semihosting, the new semihosting features, and
how to migrate from smhload.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds a serial driver which uses semihosting calls to read and write
to the host's console. For convenience, if CONFIG_DM_SERIAL is enabled,
we will instantiate a serial driver. This allows users to enable this
driver (which has no physical device) without modifying their device
trees or board files. We also implement a non-DM driver for SPL, or for
much faster output in U-Boot proper.
There are three ways to print to the console:
Method Baud
================== =====
smh_putc in a loop 170
smh_puts 1600
smh_write with :tt 20000
================== =====
These speeds were measured using a 175 character message with a J-Link
adapter. For reference, U-Boot typically prints around 2700 characters
during boot on this board. There are two major factors affecting the
speed of these functions. First, each breakpoint incurs a delay. Second,
each debugger memory transaction incurs a delay. smh_putc has a
breakpoint and memory transaction for every character. smh_puts has one
breakpoint, but still has to use a transaction for every character. This
is because we don't know the length up front, so OpenOCD has to check if
each character is nul. smh_write has only one breakpoint and one memory
transfer.
DM serial drivers can only implement a putc interface, so we are stuck
with the slowest API. Non-DM drivers can implement puts, which is vastly
more efficient. When the driver starts up, we try to open :tt. Since
this is an extension, this may fail. If it does, we fall back to
smh_puts. We don't check :semihosting-features, since there are
nonconforming implementations (OpenOCD) which don't implement it (but
*do* implement :tt).
Some semihosting implementations (QEMU) don't handle READC properly. To
work around this, we try to use open/read (much like for stdin) if
possible.
There is no non-blocking I/O available, so we don't implement pending.
This will cause __serial_tstc to always return true. If
CONFIG_SERIAL_RX_BUFFER is enabled, _serial_tstc will try and read
characters forever. To avoid this, we depend on this config being
disabled.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds three wrappers around the semihosting commands for reading and
writing to the host console. We use the more standard getc/putc/puts
names instead of readc/writec/write0 for familiarity.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This command's functionality is now completely implemented by the
standard fs load command. Convert the vexpress64 boot command (which is
the only user) and remove the implementation.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Most U-Boot command deal with start/size instead of start/end. Convert
the "fdt chosen" command to use these semantics as well. The only user
of this subcommand is vexpress, so convert the smhload command to use
this as well. We don't bother renaming the variable in vexpress64's
bootcommand, since it will be rewritten in the next commit.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds a filesystem which is backed by the host's filesystem. It is
modeled off of sandboxfs, which has very similar aims. Semihosting
doesn't support listing directories (except with SYS_SYSTEM), so neither
do we. it's possible to optimize a bit for the common case of reading a
whole file by omitting a call to smh_seek, but this is left as a future
optimization.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds a boot method for loading the next stage from the host. It is
mostly modeled off of spl_load_image_ext. I am not really sure why/how
spl_load_image_fat uses three different methods to load the image, but
the simple case seems to work OK for now.
To control the presence of this boot method, we add a config symbol.
While we're at it, we update the original semihosting config symbol.
I think semihosting has some advantages of other forms of JTAG boot.
Common other ways to boot from JTAG include:
- Implementing DDR initialization through JTAG (typically with dozens of
lines of TCL) and then loading U-Boot. The DDR initialization
typically uses hard-coded register writes, and is not easily adapted
to different boards. BOOT_DEVICE_SMH allows booting with SPL,
leveraging U-Boot's existing DDR initialization code. This is the
method used by NXP's CodeWarrior IDE on Layerscape processors (see
AN12270).
- Loading a bootloader into SDRAM, waiting for it to initialize DDR, and
then loading U-Boot. This is tricky, because the debugger must stop the
boot after the bootloader has completed its work. Trying to load
U-Boot too early can cause failure to boot. This is the method used by
Xilinx with its Zynq(MP) processors.
- Loading SPL with BOOT_DEVICE_RAM and breaking before SPL loads the
image to load U-Boot at the appropriate place. This can be a bit
tricky, because the load address is dependent on the header size. An
elf with symbols must also be used in order to stop at the appropriate
point. BOOT_DEVICE_SMH can be viewed as an extension of this process,
where SPL automatically stops and tells the host where to place the
image.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
In order to add filesystem support, we will need to be able to seek and
write files. Add the appropriate helper functions.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Instead of printing in what are now library functions, try to return a
numeric error code. This also adjust some functions (such as read) to
behave more similarly to read(2). For example, we now return the number
of bytes read instead of failing immediately on a short read.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
There's no point in using string constants for smh_open if we are just
going to have to parse them. Instead, use numeric modes. The user needs
to be a bit careful with these, since they are much closer semantically
to string modes used by fopen(3) than the numeric modes used with
open(2).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This exports semihosting functions for use in other files. The header is
in include/ and not arm/include/asm because I anticipate that RISC-V may
want to add their own implementation at some point.
smh_len_fd has been renamed to smh_flen to more closely match the
semihosting spec.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
These files are spread all over the tree, so just use a regex. Orphaned
for now, since this is more of a "one-off" series. Though I'll be happy
to review patches.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds some instructions for enabling the debug uart, including the
correct address and clock rate.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds some additional info about booting from different sources,
including the correct switch positions.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This converts the readme for this board to rST. I have tried not to
change any semantics from the original (though I did convert MB to M).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This converts the semihosting readme to rST. I have tried to make only
cosmetic changes, but I did fix up the first link (which was broken).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
The ARMv8-R64 architecture introduces optional VMSA (paging based MMU)
support in the EL1/0 translation regime, which makes that part mostly
compatible to ARMv8-A.
Add a new board variant to describe the "BASE-R64" FVP model, which
inherits a lot from the existing v8-A FVP support. One major difference
is that the memory map in "inverted": DRAM starts at 0x0, MMIO is at
2GB [1].
* Create new TARGET_VEXPRESS64_BASER_FVP target, sharing most of the
exising configuration.
* Implement inverted memory map in vexpress_aemv8.h
* Create vexpress_aemv8r defconfig
* Provide an MMU memory map for the BASER_FVP
* Update vexpress64 documentation
At the moment the boot-wrapper is the only supported secure firmware. As
there is no official DT for the board yet, we rely on it being supplied
by the boot-wrapper into U-Boot, so use OF_HAS_PRIOR_STAGE, and go with
a dummy DT for now.
[1] https://developer.arm.com/documentation/100964/1114/Base-Platform/Base---memory/BaseR-Platform-memory-map
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
[Andre: rebase and add Linux kernel header]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[trini: Add MAINTAINERS entry for Peter]
So far the DRAM size for both the Juno and the FVP model were hardcoded
in our config header file. For the Juno this is fine, as all models have
8 GiB of DRAM, but the DRAM size can be configured on the model command
line.
Drop the fixed DRAM size setup, instead look up the size in the device
tree, that we now have for every board. This allows a user to inject
a DT with the proper size, and be able to use the full amount of DRAM.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
In preparation for the ARMv8-R64 FVP support, which has DRAM mapped at
0x0, generalise the page table generation, by using symbolic names for
the address ranges instead of fixed numbers.
We already define the base of the DRAM and MMIO regions, so just use
those symbols in the page table description. Rename V2M_BASE to the more
speaking V2M_DRAM_BASE on the way.
On the VExpress memory map, the address space right after 4GB is of no
particular interest to software, as the whole of DRAM is mapped at 32GB
instead. The first 2 GB alias to the lower 2GB of DRAM mapped below 4GB,
so we skip this part and map some more of the high DRAM, should anyone
need it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Right now the defconfig the Arm VExpress64 boards disables quite some
standard commands, for apparently no good reasons (as image size is
hardly a concern here).
Remove the lines explicitly disabling those features, leaving it to
the U-Boot default settings to set them.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far the FVP model just supports booting through semihosting, so by
loading files from the host the model is running on. This allows for
quick booting of new kernels (or replacing DTBs), but prevents more
featureful boots like using UEFI.
Enable the distro_boot feature, and provide a list of possible boot
sources that U-Boot should check:
- For backwards compatibility we start with semihosting, which gets its
commands migrated from CONFIG_BOOTCOMMAND into the distro_boot
infrastructure. This is also slightly tweaked to fail graceful in case
the required files could not be found.
- Next we try to use a user provided script, that could be easily
placed into memory using the model command line.
- Since we gained virtio support with the enablement of OF_CONTROL,
let's check virtio block devices next. This is where UEFI boot can
be easily used, for instance by providing a distro installer .iso
file through virtio-blk.
- Networking is now provided by virtio as well, so enable the default
PXE and DHCP boot flows, mostly because we can.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The defconfigs for the Arm Juno board and the FVP model are quite large,
setting a lot of platform-fixed variables like SYS_TEXT_BASE.
As those values are not really a user choice, let's provide default
values for them in our Kconfig file, so a lot of cruft can be removed
from the defconfig files.
This also moves the driver selection out of there, since this is again
not something a user should really decide on. Instead we allow users to
enable or disable subsystems, and select the appropriate drivers based
on that in the Kconfig file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The definition of the standard environment variables (kernel_addr_r and
friends) has been improved lately for the FVP model, but the Juno board
is still using some custom scheme.
Since we need to extend this to a third board soon, let's unify the
definition:
- Define the Juno addresses in the same generic way we do for the FVP
model, and move the actual variable setting out of the board #ifdef's.
- Add the missing addresses for a PXE file and a boot script.
- Cleanup some stale comments on the way.
As the FVP model doesn't have support for distro_boot quite yet, add
a dummy definition for now, to be replaced with the real thing later.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The FVP base model is relying on a DT for Linux operation, so there is
no reason we would need to rely on hardcoded information for U-Boot.
Letting U-Boot use a DT will open up the usage of actual peripherals,
beyond the support for semihosting only.
Enable OF_CONTROL in the Kconfig, and use the latest dts files from
Linux. Depending on whether we use the boot-wrapper or TF-A, there is
already a DTB provided or not, respectively.
To cover the boot-wrapper, we add an arm64 Linux kernel header, which
allows the boot-wrapper to treat U-Boot like a Linux kernel. U-Boot will
find the pointer to the DTB in x0, and will use it.
Even though TF-A carries a DT, at the moment this is not made available
to non-secure world, so to not break users, we use the U-Boot provided
DTB copy in that case. For some reason TF-A puts some DT like structure
at the address x0 is pointing at, but that is very small and doesn't
carry any hardware information. Make the code to ignore those small DTBs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Arm Fixed Virtual Platform (FVP) is a software model for an
artificial ARM platform, it is available for free on the Arm website[1].
Add the devicetree files for the latest RevC version, as we will need
them to enable OF_CONTROL for the vexpress_aemv8a_semi board.
This is a verbatim copy of the respective files from Linux v5.17-rc6,
which is unchanged from the v5.16 release.
[1] https://developer.arm.com/tools-and-software/simulation-models/fast-models
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
At the moment we define three "VExpress64" boards in arch/arm/Kconfig,
plus have a second Kconfig file in board/armltd/Kconfig.
One of those three boards is actually bogus (TARGET_VEXPRESS64_AEMV8A),
that stanza looks like being forgotten in a previous cleanup.
To remove the clutter from the generic Kconfig file, just define some
ARCH_VEXPRESS64 symbol there, enable some common options, and do the
board/model specific configuration in the board/armltd Kconfig file.
That allows to streamline and fine tune the configuration later, and
to also pull a lot of "non user choices" out of the defconfigs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This converts the following to Kconfig:
CONFIG_SYS_MONITOR_BASE
Note that for how this is re-used on some PowePC platforms, we introduce
CONFIG_SPL_SYS_MONITOR_BASE and CONFIG_TPL_SYS_MONITOR_BASE and use the
CONFIG_VAL macro to get the correct value at build time, in the code.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_NORFLASH_PS32BIT
Note that we also attempt to correct the behavior of the code here,
which had been testing for "NORFLASH_PS32BIT" which would never be set,
instead check for the now set "CONFIG_NORFLASH_PS32BIT", which results
in some behavior change.
Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The values CONFIG_SYS_USE_NANDFLASH and CONFIG_SYS_USE_MMC serve the
same purpose as CONFIG_SD_BOOT / CONFIG_NAND_BOOT so migrate to using
these switches instead as they're already in Kconfig.
Cc: Stelian Pop <stelian@popies.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
In the case of M5373EVB we always had NANDFLASH_SIZE=16, so just use it
directly. In the case of M5329EVB we had not removed the rest of NAND
support when saying we didn't have NAND, so instead use that to key off
of rather than NANDFLASH_SIZE.
Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The value CONFIG_DB_784MP_GP is only used in the DDR code to refer to
CONFIG_TARGET_DB_MV784MP_GP so just use that second value directly.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
We only set one of these values ever at this point, so remove dead code.
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
There are a handful of variants around CONFIG_SYS_USE_DATAFLASH and none
of them now control anything further within their board config.h files,
so remove these from CONFIG_SYS_EXTRA_OPTIONS and then remove the empty
blocks in the board config.h files. In a few places further clean up
related logic.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_LPUART
CONFIG_LPUART_32B_REG
And note that CONFIG_LPUART_32B_REG is unused in code.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_LSCHLV2
CONFIG_LSXHL
Cc: Michael Walle <michael@walle.cc>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michael Walle <michael@walle.cc>
This CONFIG option is used in one place, so pick a more direct name and
migrate to Kconfig. Rework the code slightly.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_KM_COGE5UN
CONFIG_KM_KIRKWOOD_128M16
CONFIG_KM_KIRKWOOD
CONFIG_KM_KIRKWOOD_PCI
CONFIG_KM_NUSA
CONFIG_KM_SUSE2
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
The only usage of CONFIG_KMTEGR1 can be replaced by
CONFIG_TARGET_KMTEGR1 so do so and remove this other symbol.
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
This converts the following to Kconfig:
CONFIG_EMMC_BOOT
CONFIG_MAC_ADDR_IN_SPIFLASH
CONFIG_NAND_BOOT
CONFIG_SPL_FSL_PBL
CONFIG_SYS_FSL_DDR4
In this case we re-sync options that had been set in
CONFIG_SYS_EXTRA_OPTIONS but should not have been as they have proper
entries.
Signed-off-by: Tom Rini <trini@konsulko.com>
This was only setting values not referenced in the code so remove it.
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This platform is the only one to set these options, so define them in
the board Kconfig file.
Cc: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_MCFRTC
CONFIG_SYS_MCFRTC_BASE
While at it, remove '#undef RTC_DEBUG' from these config files.
Signed-off-by: Tom Rini <trini@konsulko.com>
Both of these variables are used in a few hard-coded ways to set some
string values or print something to the user. In almost all cases, it's
just as useful to hard-code the value used. The exception here is
printing something closer to correct board name for p1_p2_rdb machines.
This can be done using something from the device tree, but for now
hard-code a non-CONFIG based value instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_BOOTM_NETBSD
CONFIG_BOOTM_RTEMS
CONFIG_DESIGNWARE_WATCHDOG
CONFIG_DISPLAY_CPUINFO
CONFIG_DM_ETH
CONFIG_DM_MMC
CONFIG_DM_REGULATOR
CONFIG_DM_SPI
CONFIG_DM_SPI_FLASH
CONFIG_ISO_PARTITION
CONFIG_OF_SEPARATE
CONFIG_SPI_FLASH_WINBOND
CONFIG_SPL_ETH
CONFIG_TIMER
CONFIG_USB_DWC3
CONFIG_USB_DWC3_GADGET
CONFIG_USB_DWC3_OMAP
CONFIG_USB_DWC3_PHY_OMAP
CONFIG_USB_EHCI_TEGRA
CONFIG_USB_GADGET_DOWNLOAD
CONFIG_USB_GADGET_DUALSPEED
CONFIG_USB_GADGET_MANUFACTURER
CONFIG_USB_GADGET_PRODUCT_NUM
CONFIG_USB_GADGET_VBUS_DRAW
CONFIG_USB_GADGET_VENDOR_NUM
This catches a number of cases where board config files were #undef
various CONFIG options when building SPL, and that doesn't work. Clean
up the related comments as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
At this point DM and OF_CONTROL are used to configure how the USB ports
are enabled, with the exception of in SPL and no SPL_OF_CONTROL. Remove
a bunch of now unused logic to simplify the code.
Signed-off-by: Tom Rini <trini@konsulko.com>
colibri-imx6ull ethernet device is fec2, while the optional secondary
ethernet is fec1, update the ethernet aliases in the .dts file so that
ethaddr is set to fec2 and eth1addr to fec1.
Without this change the ethernet interfaces have a different
mac address between Linux and U-Boot.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Enable CONFIG_ATMEL_TCB_TIMER and disable CONFIG_ATMEL_PIT_TIMER.
This will allow using the TCB timer instead of the PIT one when running
under OP-TEE.
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
In order to use the TCB early in boot and in the SPL, add
u-boot,dm-pre-reloc property for the TCB and the clock that is used by
the driver (tcb0_clk).
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
When using interrupts property, a global interrupt controller needs to
be added to avoid warnings when compiling device-tree:
arch/arm/dts/at91-sama5d2_xplained.dtb: Warning (interrupts_property):
/ahb/apb/timer@f800c000: Missing interrupt-parent
Add AIC node as the sama5d2 global interrupt controller.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Add a driver for the timer counter block that can be found on sama5d2.
This driver will be used when booting under OP-TEE since the pit timer
which is part of the SYSC is secured. Channel 1 & 2 are configured to
be chained together which allows to have a 64bits counter.
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Align the DT for sama7g5 SoC and sama7g5 EK board with Linux devicetree
in version 5.18.
Some things remain still different, due to some things yet unimplemented in
certain drivers. These include in PMC, pinctrl, and others.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
In Linux this DT file is named at91-sama7g5ek.dts. Rename it accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Set blue led on at boot time in order to highlight that u-boot is loaded.
This is done for all sama5d2 based boards which contain an RGB led.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
sama7g5 and other SoCs (sama5d3, sam9x60) define in the Reset Controller
a RSTC_CR.EXTRST bit that asserts the nrst_out pin which resets external
devices.
This is particular useful for external devices that are configured in
stateful modes which can not be undone without reconfiguring the device
or without resetting the device. An example is an SPI NOR flash that is
configured in octal mode. The do_reset u-boot cmd does not call any
driver's remove method, but merely resets the CPU. As the code was, this
left the flash in octal mode, being impossible for the first stage boot
loaders to recover/identify the flash after a "software reset".
RSTC_CR.EXTRST comes in handy here, as it can be set at "software reset"
to assert low the nrst_out pin during a time defined by the RSTC_MR.ERSTL
field and reset the external devices (including the SPI NOR flash in the
example).
nrst_out is always asserted at "user reset" and it resets the external
devices correctly. Asserting nrst_out at "software reset" should behave
in a similar way. The only difference that I could find between the two
types of resets in regards to the nrst_out signal, is that at "user reset"
timing diagram the "Processor and Peripherals Reset Line" rises after six
MD_SLCK cycles after the nrst_out line rose, while at the "software reset"
timing diagram the "Processor and Peripherals Reset Line" is active for
3 MD_SLCK cycles + 2 MCK cycles. In other words, in the "software reset"
case the nrst_out signal can be active for a longer period of time than the
"Processor and Peripherals Reset Line" active time, depending on the
RSTC_MR.ERSTL value.
Using the default value (zero) for RSTC_MR.ERSTL, worked just fine for the
sama7g5 case. Tested QSPI0 and GMAC0/GMAC1 on sama7g5ek rev 4 after a
software reset with RSTC_CR.EXTRST=1 and RSTC_MR.ERSTL=0.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Convert AT91RESET_EXTRST to Kconfig for easier integration. The symbol is
not configurable from menuconfig, it will be automatically selected by SoCs
that select it explicitly via the "select" directive.
AT91RESET_EXTRST sets the Reset Controller's RSTC_CR.EXTRST bit which
asserts the nrst_out pin that resets external devices.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
sama5d2 contains in its ROM memory BCH code tables for NAND Flash ECC
correction. Enable the use of the GF tables defined in ROM. This should
speed up the boot process, as the tables are no longer constructed at
runtime. Tested with sama5d2-ptc-ek.
Reported-by: David Mosberger-Tang <davidm@egauge.net>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Documentation:
* Move VxWorks and Plan 9 to HTML documentation
* Move all command man-pages to a separate directory
Test:
* Fix pylint errors
UEFI
* Fix build flags for initrddump.efi
QEMU
* Remove unused function to get RNG device
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Merge tag 'efi-2022-04-rc6' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-04-rc6
Documentation:
* Move VxWorks and Plan 9 to HTML documentation
* Move all command man-pages to a separate directory
Test:
* Fix pylint errors
UEFI
* Fix build flags for initrddump.efi
QEMU
* Remove unused function to get RNG device
If include/generated/environment.h exists (perhaps leftover from a build
of another board) it is used, even if the board currently being built does
not have a text environment.
This causes a build error. Fix it by emptying the file if it should not be
there.
Fixes: https://source.denx.de/u-boot/u-boot/-/issues/9
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Sean Anderson <seanga2@gmail.com>
To quote the author:
This series adds a stage pre-load before launching an image. This stage
is used to read a header before the image and this header contains the
signature of the full image. So u-boot may check the full image before
using any data of the image.
The support of this header is added to binman, and a command verify
checks the signature of a blob and set the u-boot env variable
"loadaddr_verified" to the beginning of the "real" image.
The support of this header is only added to binman, but it may also be
added to mkimage.
Add a subcommand preload to bootm that execute the preload
stage on the image. Right now, it checks the signature
of the image with the pre-load header. If the check
succeed, the u-boot env variable 'loadaddr_verified'
is set to the address of the image (without the header).
It allows to run such commands:
tftp script.img && bootm preload $loadaddr && source $loadaddr_verified
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Enable the support of stage pre-load in bootm.
For the moment, this stage allow to verify the
signature of the full image with a header.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Adds the support of the pre-load header with the image signature
to binman.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Set the variable pre-load-key-path with the shell variable
PRE_LOAD_KEY_PATH that contain the keys path (used for signature).
This variable pre-load-key-path is provided to binman.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit enhances mkimage to update the node
/image/pre-load/sig with the public key.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Add the support of image pre load in spl or tpl
when loading an image from ram.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Add a stage pre-load to the command bootm.
Right now, this stage may be used to read a
header and check the signature of the full
image.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Add a stage pre-load that could
check or modify an image.
For the moment, only a header with a signature is
supported. This header has the following format:
- magic : 4 bytes
- version : 4 bytes
- header size : 4 bytes
- image size : 4 bytes
- offset image signature : 4 bytes
- flags : 4 bytes
- reserved0 : 4 bytes
- reserved1 : 4 bytes
- sha256 of the image signature : 32 bytes
- signature of the first 64 bytes : n bytes
- image signature : n bytes
- padding : up to header size
The stage uses a node /image/pre-load/sig to
get some informations:
- algo-name (mandatory) : name of the algo used to sign
- padding-name : name of padding used to sign
- signature-size : size of the signature (in the header)
- mandatory : set to yes if this sig is mandatory
- public-key (madatory) : value of the public key
Before running the image, the stage pre-load checks
the signature provided in the header.
This is an initial support, later we could add the
support of:
- ciphering
- uncompressing
- ...
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit adds the option SPL_RSA_VERIFY_WITH_PKEY.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit adds the options:
- SPL_ASYMMETRIC_KEY_TYPE
- SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE
- SPL_RSA_PUBLIC_KEY_PARSER
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit adds the options:
- SPL_ASN1_DECODER
- SPL_OID_REGISTRY
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Enhance the help for the config OID_REGISTRY.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Enhance the help for configs ASN1_COMPILER
and ASN1_decoder.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
It seems a copy'n'paste typo when tool had been introduced.
It has never had the 'exit' suffix in the file name. Hence,
the custom CFLAGS never been applied and, for example, BFD
linker complains:
LD lib/efi_loader/initrddump_efi.so
ld.bfd: lib/efi_loader/initrddump.o: warning: relocation in read-only section `.text.efi_main'
ld.bfd: warning: creating DT_TEXTREL in a shared object
Remove wrong 'exit' suffix from the custom CFLAGS variable.
Fixes: 65ab48d69ddb ("efi_selftest: provide initrddump test tool")
Fixes: 9c045a49a9c9 ("efi_loader: move dtbdump.c, initrddump.c to lib/efi_loader")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* Use f'' strings instead of .format().
* Correct sequence of imports.
* Remove a superfluous import.
* Add missing documentation.
* Replace yield by return.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This converts the existing README.plan9 to reST, and puts it under
the doc/usage/os directory.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
At present the doc only mentions Arm, PowerPC and x86. RISC-V support
has been added since VxWorks SR0650 support for a while, and U-Boot
supports loading a RISC-V VxWorks kernel too. Let's document it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This converts the existing README.vxworks to reST, and puts it under
the doc/usage/os directory.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Update the extension command title for consistency with other commands.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Currently all shell command docs are put in the doc/usage root.
Let's group them into cmd/ sub-directory.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Provide human readable descriptions of the speed nodes instead of the name
of constants from the code as it is already done for 'mmc rescan'
command in commit 212f078496e4 ("doc: mmc rescan speed mode").
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The QEMU platform has a function defined to get the random number
generator(RNG) device. However, the RNG device can be obtained simply
by searching for a device belonging to the RNG uclass. Remove the
superfluous platform function defined for the QEMU platform for
getting the RNG device.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Fixes for 2 gateworks platforms, Edison platform, incorrectly showing
2 logos on LCD screens, not cleaning a generated environment file and
correct the CONFIG_SYS_IMMR Kconfig migration on a number of MPC85xx
platforms.
The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.
Fixes: be7dbb60c5bf ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>
'make sifive_unamtched_defconfig; make clean; make' fails if file
include/generated/env.in exists. 'make clean' should remove all files that
stop building.
Add file include/generated/env.in to the clean target.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Currently, on imx6sabresd and gwventana boards, the company logo
and U-Boot logo are shown.
The correct behavior is to show only the company logo, if available,
and not both logos.
Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Tim Harvey <tharvey@gateworks.com> #gw_ventana
commit 7c84319af9c7 ("dm: gpio: Correct use of -ENODEV in drivers")
changed the return code for an I2C NAK from -ENODEV to -EREMOTEIO.
Update the gsc_i2c_read and gsc_i2c_write functions for this change
to properly retry the transaction on a NAK meaning the GSC is busy.
Fixes: 7c84319af9c7 ("dm: gpio: Correct use of -ENODEV in drivers")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This is mostly cleanups/consolidations. clk_free is made to return void, and the
CCF wrappers present in almost every CCF clock are consolidated. I would
particularly like to have the latter upstream, since there are at least two
series adding support for new CCF drivers (imx8mq and imxrt1170) which can
benefit from these commits.
I had to fix up the last commit since I missed an include for at91.
CI: https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/11521
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Merge tag 'clk-2022.04-next' of https://source.denx.de/u-boot/custodians/u-boot-clk into next
Clock patches for u-boot/next
This is mostly cleanups/consolidations. clk_free is made to return void, and the
CCF wrappers present in almost every CCF clock are consolidated. I would
particularly like to have the latter upstream, since there are at least two
series adding support for new CCF drivers (imx8mq and imxrt1170) which can
benefit from these commits.
I had to fix up the last commit since I missed an include for at91.
CI: https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/11521
This converts most CCF drivers to use generic ops. imx6q is the only
outlier, where we retain the existing functionality by moving the check to
request().
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com
[ fixed missing include for at91 ]
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Most CCF drivers follow a common pattern where their clock ops defer the
actual operation to the backing CCF clock. Add some generic implementations
of these functions to reduce duplication of code.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220320203446.740178-1-seanga2@gmail.com
These functions are exactly the same as their "nodev" varients, except they
accept a device and not an ofnode. Rewrite them to just call the other
function.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220227190113.1617498-1-seanga2@gmail.com
Most callers of this function do not check the return value, and it is
unclear what action they should take if it fails. If a function is freeing
multiple clocks, it should not stop just because the first one failed.
Since the callbacks can no longer fail, just convert the return type to
void.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220115222504.617013-8-seanga2@gmail.com
When freeing a clock there is not much we can do if there is an error, and
most callers do not actually check the return value. Even e.g. checking to
make sure that clk->id is valid should have been done in request() in the
first place (unless someone is messing with the driver behind our back).
Just return void and don't bother returning an error.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20220115222504.617013-2-seanga2@gmail.com
TTC has three modes of operations. Timer, PWM and input counters.
There is already driver for timer under CADENCE_TTC_TIMER which is used for
ZynqMP R5 configuration.
This driver is targeting PWM which is for example configuration which can
be used for fan control.
The driver has been tested on Xilinx Kria SOM platform where fan is
connected to one PL pin. When TTC output is connected via EMIO to PL pin
TTC pwm can be configured and tested for example like this:
pwm config 0 0 10000 1200
pwm enable 0 0
pwm config 0 0 10000 1400
pwm config 0 0 10000 1600
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Link: https://lore.kernel.org/r/915a662ddb88f7a958ca1f307e8fea59af9d7feb.1634303847.git.michal.simek@xilinx.com
The DLL mode supported SD reference clocks are 50 MHz, 100 MHz and
200 MHz. When user select SD frequency as 200MHz in the design, the
actual frequency is going to come around ~187MHz (<= 200MHz considering
the parent clock and divisor selection). We need to set SDx_BASECLK as
200 in this case, setting 187 will result in tuning failures in mmc.
Set SDx_BASECLK to exact value of 200, 100 or 50 based on the frequency
range.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/6c1e5eeeedd2864a0c85e6b409d182031d8c6c1a.1648210268.git.michal.simek@xilinx.com
Serial IP has output buffer which status is indicated by two bits. If fifo
if empty or full. Default configuration is that chars are pushed to fifo
till it is full. Time to time it is visible that chars are scambled and
logs are not visible. Not sure what it is exactly happening but all the
time it helps to change driver behavior to write only one char at a time.
That's why enable this mode when debug uart is enabled not to see scrambled
chars in debug by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/332b2106d7a8190dd1001b5387f8bd1fba2e061b.1648205405.git.michal.simek@xilinx.com
There is no reason to do serial initialization. Uart driver does it already
based on DT. Good effect is that it is clear which interface is console.
The same change was done in past by commit 84d2bbf082fa ("arm64: zynqmp:
Remove low level UART setting").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/91a73f292bafc4b64ed09954cc23780496da4b65.1648125082.git.michal.simek@xilinx.com
Versal can also have reserved space in DT which u-boot has to avoid to
placing self to that location. The same change was done in ZynqMP by commit
ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location")
and also for microblaze by commit d7b5cc89d329 ("microblaze: Do not place
u-boot to reserved memory location").
The patch was tested by adding reserved-memory node to DT and check via
bdinfo back.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/15426fa6d64835dd23c5c8c12bbfc97306fb6098.1647527129.git.michal.simek@xilinx.com
- drop CONFIG_LCD_BMP_RLE8
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Merge tag 'next-20220328' of https://source.denx.de/u-boot/custodians/u-boot-video into next
- drop old CFB code
- drop CONFIG_LCD_BMP_RLE8
The 2x256 MiB SF variant of this system has 192 MiB rootfs MTD partition
containing UBI on SF0, use the correct size in U-Boot environment, else
U-Boot cannot mount UBI and boot on this variant.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Cc: Tom Rini <trini@konsulko.com>
This is not defined by any board. Even sandbox doesn't actually use
it since it has migrated to DM_VIDEO.
Drop this option. Remove the dead code also, for completeness, even
though the whole lcd.c file will be dropped soon.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This converts the following to Kconfig:
CONFIG_VIDEO_BCM2835
This is the final ad-hoc CONFIG_VIDEO_... to convert.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Matthias Brugger <mbrugger@suse.com>
Enable ONFI detection to fix NAND chip configuration. Without this
the NAND oobsize will be wrong which leads to invalid ECC strength and
incompatibility with the previous configuration.
Fixes: 777f333c375a ("imx: ventana: enable dm for MTD and NAND")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This does not use driver model and is more than two years past the
migration date. Drop it.
It can be added back later if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
This does not use driver model and is more than two years past the
migration date. Drop it.
It can be added back later if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Drop the Kconfigs which are not used and all references to them. In
particular, this drops CONFIG_VIDEO to avoid confusion and allow us to
eventually rename CONFIG_DM_VIDEO to CONFIG_VIDEO.
Also drop the prototype for video_get_info_str() which is no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
Unfortunately this driver uses the old video structure to store things.
This is not supported with driver model.
Drop the old code and comment out the other pieces, so the maintainer can
take a look.
Signed-off-by: Simon Glass <sjg@chromium.org>
The non-driver model video support was removed two years ago. Drop this
driver, which is only used by nokia_rx51.
Signed-off-by: Simon Glass <sjg@chromium.org>
Previous u-boot code changed the default bch setting behavior and caused
backward compatible issue. This fix choose the legacy bch geometry back
again as the default option. If the minimum ecc strength that NAND chips
required need to be chosen, it can be enabled by either adding DT flag
"fsl,use-minimum-ecc" or CONFIG_NAND_MXS_USE_MINIMUM_ECC in configs. The
unused flag "fsl,legacy-bch-geometry" get removed.
Fixes: 51cdf83eea (mtd: gpmi: provide the option to use legacy bch geometry)
Fixes: 616f03daba (mtd: gpmi: change the BCH layout setting for large oob NAND)
Tested-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Sean Nyekjaer <sean@geanix.com>
Signed-off-by: Han Xu <han.xu@nxp.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
The code was mistakenly initializing the input buffer twice.
Tested to be working on BeagleBone by adjusting CONFIG_SYS_BOOTM_LEN to
64MiB (probably works with less) and preparing uImage with:
cat arch/arm/boot/Image \
| zstd --ultra -22 --zstd=windowLog=22 \
> linux.bin.zst
mkimage -A arm -T kernel uImage -C zstd -d linux.bin.zst \
-a 0x80008000 -e 0x80008000
Without the windowLog restriction, bootm fails with a zstd decompression
error 7 (window too large), which I haven't troubleshooted.
There should be a bit more documentation on the feature...
Reviewed-by: Simon Glass <sjg@chromium.org>
Fixes: 458b30af66c image: Update image_decomp() to avoid ifdefs
make sandbox_defconfig
make mrproper
make tests
fails with
../drivers/video/u_boot_logo.S: Assembler messages:
../drivers/video/u_boot_logo.S:5: Error: file not found: drivers/video/u_boot_logo.bmp
We have to delete the generated file.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The current approach for setting the environment variables that
describe the memory layout runs the risk of overlapping with
reserved memory regions. Use the lmb code to derive the addresses
for these variables instead.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The firmware on larger NVMe drives needs more than 100ms to come up.
Change the timeout to 1s.
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Documentation:
* man-page for the wdt command
UEFI:
* Unit test for boot manager
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Merge tag 'efi-2022-04-rc5-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-04-rc5-2
Documentation:
* man-page for the wdt command
UEFI:
* Unit test for boot manager
When calling efi_dp_from_name() we are not interested in the device part.
Just pass NULL as an argument.
Suggested-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Provide a unit test for
* efidebug boot add
* efidebug boot order
* bootefi bootmgr
* initrd via EFI_LOAD_FILE2_PROTOCOL
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Up to now the initrddump.efi application has drained the input after
showing the prompt. This works for humans but leads to problems when
automating testing. If the input is drained, this should be done before
showing the prompt.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
initrddump.efi uses colored output and clear the screen. This is not
helpful for integration into Python tests. Allow specifying 'nocolor' in
the load option data to suppress color output and clearing the screen.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Commit f11513d99787 ("net: phy: realtek: Add tx/rx delay config for
8211e") made the Realtek PHY driver honour the phy-mode DT property,
to set up the proper delay scheme for the RX and TX lines. A similar
change in the kernel revealed that those properties were mostly wrong.
The kernel DTs got updated over the last few months, but we were missing
out on the U-Boot version.
Just sync in the phy-mode properties from the mainline kernel,
v5.17-rc7, to avoid the breaking DT sync that late in the cycle.
This fixes Ethernet operation on the affected boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Commit 5bc4cd05d7d4 ("sunxi: move non-essential code out of s_init()")
moved the call to eth_init_board() from s_init() into board_init_f().
This means it's now only called from the SPL, which makes sense for
most of the other moved low-level functions. However the GMAC pinmux and
clock setup in eth_init_board() was not happy about that, so it broke
the sun7i GMAC.
Since Ethernet is of no use in the SPL anyway, just move the call into
board_init(), which is only run in U-Boot proper.
This fixes Ethernet operation for the A20 SoCs, which broke in
v2022.04-rc1, with the above mentioned commit.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2]
Use the MEMA - MEMD registers on the PFUZE100 as bootcount
registers.
Based on work from Heiko Schocher <hs@denx.de>.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Add missing MEMA - MEMD register definitions for PFUZE100.
Based on work from Heiko Schocher <hs@denx.de>.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Add the PWM node and enable it for AST2600 EVB
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
This patchs add the signal description array for PWM pinctrl settings.
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
This patch add the support of PWM controller which can be found at aspeed
ast2600 soc. The pwm supoorts up to 16 channels and it's part function
of multi-function device "pwm-tach controller".
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Macros PCI_CLASS_CODE_* and PCI_CLASS_SUB_CODE_* are unused and are
duplication of PCI_CLASS_* macros defined in pci_ids.h header file.
So remove them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Replace old macros PCI_CLASS_CODE_COMM and PCI_CLASS_SUB_CODE_COMM_SERIAL
by new macros defined in pci_ids.h. Old macros would be deleted in followup
commit.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add following two new PCI class codes defines into pci_ids.h include file:
PCI_CLASS_BRIDGE_PCI_NORMAL
PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE
And use these defines in all U-Boot code for describing PCI class codes for
normal and subtractive PCI bridges.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This adds support for using -Og when building U-Boot. According to the
gcc man page:
> -Og should be the optimization level of choice for the standard
> edit-compile-debug cycle, offering a reasonable level of optimization
> while maintaining fast compilation and a good debugging experience.
This optimization level is roughly -O1 minus a few additional
optimizations. It provides a noticably better debugging experience, with
many fewer variables <optimized out>.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a separate CONFIG_CC_OPTIMIZE_FOR_SPEED option in a choice,
in preparation for adding another optimization option. Also convert SH's
makefile to use this new option.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For consistency in runs, we need to always use the same pylint version.
Pin to 2.12.2 as this is what we have been using so far.
Signed-off-by: Tom Rini <trini@konsulko.com>
This is a legacy driver and the value is set in board config headers
without a CONFIG prefix. Remove the code.
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_LCD_INFO
CONFIG_LCD_LOGO
CONFIG_LCD_INFO_BELOW_LOGO
CONFIG_LCD_IN_PSRAM
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_ATMEL_LCD
CONFIG_ATMEL_LCD_BGR555
CONFIG_ATMEL_LCD_RGB565
CONFIG_GURNARD_SPLASH
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FAULT_ECHO_LINK_DOWN
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_AT91_WANTS_COMMON_PHY
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Commit 0934dddc6436 ("arm: a37xx: Update DTS files to version from
upstream Linux kernel") ported Linux's device-tree files for Armada 3720
SOCs. This broke SPI support on some Espressobin boards and results in
following U-Boot error:
Loading Environment from SPIFlash... jedec_spi_nor flash@0: unrecognized JEDEC id bytes: f7, 30, 0b
*** Warning - spi_flash_probe_bus_cs() failed, using default environment
Before that commit DT node for SPI was called 'spi-flash@0' and after
that commit it is called 'flash@0'. Before that commit 'spi-max-frequency'
was set to 50000000 and after it is 104000000.
Rename DT node 'spi-flash@0 in armada-3720-espressobin-u-boot.dtsi to
'flash@0' and set custom U-Boot 'spi-max-frequency' back to 50000000.
With this change SPI is working on Espressobin again and it is detected
with JEDEC ids ef, 60, 16 on our tested unit.
Loading Environment from SPIFlash... SF: Detected w25q32dw with page size 256 Bytes, erase size 4 KiB, total 4 MiB
OK
Note that it is unknown why spi-max-frequency with value 104000000 does not
work in U-Boot as it works fine with Linux kernel. Also note that in
defconfig file configs/mvebu_espressobin-88f3720_defconfig is set option
CONFIG_SF_DEFAULT_SPEED=40000000 which is different value than in DT.
Fixes: 0934dddc6436 ("arm: a37xx: Update DTS files to version from upstream Linux kernel")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
i2c changes for fixes-for-2022.04
- atsha204a-i2c.c
DTS and I2C fixes for Atmel ATSHA204 from Adrian
- i2c: fix always-true condition in i2c_probe_chip()
from Nikita
- eeprom: Do not rewrite EEPROM I2C bus with DM I2C enabled
from Marek
- clarify bootcount documentation fix from Michael
Commit 0934dddc6436 ("arm: a37xx: Update DTS files to version from
upstream Linux kernel") ported Linux's device-tree files for Armada 3720
SOCs. This broke USB port on Turris MOX, because in Linux' DTS the bus
voltage supply is described as a `phy-supply` property of connector
node, a mechanism that is not supported in U-Boot yet.
For now, fix this by adding `vbus-supply` to usb3 node.
Fixes: 0934dddc6436 ("arm: a37xx: Update DTS files to version from upstream Linux kernel")
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
With DM I2C, the EEPROM bus has been correctly configured in
eeprom_execute_command() already. Do not reconfigure it here
with hard-coded bus number again.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This patch replaces use fdtdec_get_addr with simpler dev_read_addr().
fdtdec_get_addr doesn't work properly on ZynqMP-based (64bit) system. Although
not confirmed, it could be related to the fact, that quoting the documentation,
"This variant hard-codes the number of cells used to represent the address and
size based on sizeof(fdt_addr_t) and sizeof(fdt_size_t)".
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Once request is sent, and before receiving a response, the delay is required.
This patch fixes missing delay for before first response try.
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
If the maximum number of wake-up attempts is exceeded, return -ETIMEDOUT.
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Documentation:
* Fix documentation of FIP creation for Amlogic boards
* Update Nokia RX-51 QEMU documentation
* Add Raspberry Pi documentation
UEFI:
* Fix booting via short form device paths
* Support short form device paths in 'efidebug boot add'
* Fix ESP detection for capsule updates
* Allow ACPI table usage even if device-tree exists - ignore DT
* OP-TEE based GetVariable(): return attributes when buffer too small
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Merge tag 'efi-2022-04-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-04-rc5
Documentation:
* Fix documentation of FIP creation for Amlogic boards
* Update Nokia RX-51 QEMU documentation
* Add Raspberry Pi documentation
UEFI:
* Fix booting via short form device paths
* Support short form device paths in 'efidebug boot add'
* Fix ESP detection for capsule updates
* Allow ACPI table usage even if device-tree exists - ignore DT
* OP-TEE based GetVariable(): return attributes when buffer too small
The tools dtbdump.efi and initrddump.efi are useful for Python testing even
if CONFIG_EFI_SELFTEST=n.
Don't clear the screen as it is incompatible with Python testing.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The block IO protocol may be installed on any handle. We should make
no assumption about the structure the handle points to.
efi_disk_is_system_part() makes an illegal widening cast from a handle
to a struct efi_disk_obj. Remove the function.
Fixes: Fixes: 41fd506842c2 ("efi_loader: disk: add efi_disk_is_system_part()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The GUID of partitions is sufficient for identification and will stay
constant in the lifetime of a boot option. The preceding path of the
device-path may change due to changes in the enumeration of devices.
Therefore it is preferable to use the short-form of device-paths in load
options. Adjust the 'efidebug boot add' command accordingly.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The boot manager must support loading from boot options using a short-form
device-path, e.g. one where the first element is a hard drive media path.
See '3.1.2 Load Options Processing' in UEFI specification version 2.9.
Fixes: 0e074d12393b ("efi_loader: carve out efi_load_image_from_file()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Let function efi_dp_find_obj() additionally check if a given protocol is
installed on the handle relating to the device-path.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
efi_dp_find_obj() should not return any handle with a partially matching
device path but the handle with the maximum matching device path.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Starting UEFI Spec 2.8 we must fill in the variable attributes when
GetVariable() returns EFI_BUFFER_TOO_SMALL and Attributes is non-NULL.
This code was written with 2.7 in mind so let's move the code around a
bit and fill in the attributes EFI_BUFFER_TOO_SMALL is returned
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
For targets that enable ACPI, we should not pass Device Trees into
the payload. However, our distro boot logic always passes the builtin
DT as an argument.
To make it easy to use ACPI with distro boot, let's just ignore the DT
argument to bootefi when ACPI is enabled. That way, we can successfully
distro boot payloads on ACPI enabled targets.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add documentation about the different configuration files for the
RaspberryPi board family.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
There is no CONFIG_UEFI_SECURE_BOOT, and there was never any.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add section how to run U-Boot in n900 qemu machine.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
It add documentation on licencing & provides links to the amlogic-boot-fip
pre-built files collections.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Fix documentation path in deprecated warning message about device
driver.
Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fix documentation path in warning message about deprecated device driver.
Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
various minor sandbox improvements
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Merge tag 'dm-pull-18mar22' of https://source.denx.de/u-boot/custodians/u-boot-dm into next
binman FIT improvements
various minor sandbox improvements
Some boards need to load an ELF file using the 'loadables' property, but
the file has segments at different memory addresses. This means that it
cannot be supplied as a flat binary.
Allow generating a separate node in the FIT for each segment in the ELF,
with a different load address for each.
Also add checks that the fit,xxx directives are valid.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
The current implementation sets up the FIT entries but then deletes the
'generator' ones so they don't appear in the final image.
This is a bit clumsy. We cannot build the image more than once, since the
generator entries are lost during the first build. Binman requires that
calling BuildSectionData() multiple times returns a valid result each
time.
Keep a separate, private list which includes the generator nodes and use
that where needed, to correct this problem. Ensure that the missing list
includes removed generator entries too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
It doesn't make sense to use 'subnode' as a function parameter since it
is just a 'node' so far as the function is concerned. Update two functions
to use 'node' instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Add a new function to handling reporting errors within a particular
subnode of the FIT description. This can be used to make the format of
these errors consistent.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Some warnings have crept in, so fix those that are easy to fix.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
This should not be done in the constructor. Move it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
At present the entries are read twice, once by the entry_Section class
and once by the FIT implementation. This is harmless but can be confusing
when debugging. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Unfortunately mkimage gets upset with zero-sized files. Update the
ObtainContents() method to support specifying the size, if a fake blob is
created.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
On x86 devices having even a small amount of data can cause an overlap
between regions. For example, bayleybay complains when the intel-vga
region overlaps with u-boot-ucode:
ImagePos Offset Size Name
<none> 00000000 00800000 main-section
<none> ff800000 00000080 intel-descriptor
<none> ff800400 00000080 intel-me
<none> fff00000 00098f24 u-boot-with-ucode-ptr
<none> fff98f24 00001aa0 u-boot-dtb-with-ucode
<none> fff9a9d0 0002a000 u-boot-ucode
<none> fffb0000 00000080 intel-vga
...
It is safer to use an empty file in most cases. Add an option to set the
size for those uses that need it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
At present fake blobs are created but internally an empty blob is used.
Change it to use the contents of the faked file. Also return whether the
blob was faked, in case the caller needs to know that.
Add a TODO to put fake blobs in their own directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
This shadows the patman.tools library so rename it to avoid a pylint
warning.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
At present the fit implementation creates the output tree while
scanning the FIT description. Then it updates the tree later when the
data is known.
This works, but is a bit confusing, since it requires mixing the scanning
code with the generation code, with a fix-up step at the end.
It is actually possible to do this in two phases, one to scan everything
and the other to generate the FIT. Thus the FIT is generated in one pass,
when everything is known.
Update the code accordingly. The only functional change is that the 'data'
property for each node are now last instead of first, which is really a
more natural position. Update the affected test to deal with this.
One wrinkle is that the calculated properties (image-pos, size and offset)
are now added before the FIT is generated. so we must filter these out
when copying properties from the binman description to the FIT.
Most of the change here is splitting out some of the code from the
ReadEntries() implementation into _BuildInput(). So despite the large
diff, most of the code is the same. It is not feasible to split this patch
up, so far as I can tell.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Leave the 'expand' term for use by entry types which have an expanded
version of themselves. Rename this method to indicate that it generates
subentries.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
The word 'expand' is used for entries which generate subentries. It is
also used for entries that can have an '_expanded' version which is used
to break out its contents.
Rather than talking about expanding an entry's size, use the term
'extending'. It is slightly more precise and avoids the above conflicts.
This change renders the old 'expand-size' property invalid, so add an
error check for that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Update the return value of this function, fix the 'create' typo and
update the documentation for clarity.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Rename this function to make it clear that it only reads loadable
segments. Also update the error for missing module to better match the
message emitted by Python.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Refactor this to avoid a loop. Also add a test for an empty string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Fix the help which should refer to TPL, not SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Simplify the code by using the available function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
This is not necessary if simpler code is used. Use the split function and
drop the unnecessary []
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
At present it is not possible to have arguments which include spaces.
Update the function to only split the args if the property is a single
string. This is a bit inconsistent, but might still be useful.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
It is good practice to init all variables in the constructor and pylint
sometimes checks this. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
There is seldom a need to refresh at 100Hz and it uses a lot of CPU.
Reduce the rate to 10Hz which seems to be adequate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some files cannot be written but read-only access is still useful for
tests. Add a fallback to read-only access when needed.
This is useful in CI when opening a large data file provided by docker,
where read/write access would result in copying the file, thus needing
a lot of extra disk space.
Signed-off-by: Simon Glass <sjg@chromium.org>
If state is not being written, but RAM is, we should still show a message,
so it is clear that this is happening.
Signed-off-by: Simon Glass <sjg@chromium.org>
This allows to prefill fdt and config nodes with hash and signature
subnodes. It's just important to place the child nodes last so that
hashes do not come before the data - would be disliked by mkimage.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds build-sandbox in sys.path to look for libfdt,
otherwise py_test can't use binman.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is good practice to init all variables in the constructor and pylint
sometimes checks this. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_ATMEL_LEGACY
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_AT91_GPIO_PULLUP
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This variable is used once and is noted as board-specific. Use the
value directly with a comment.
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This symbol is used only once, and in comparison with an unset symbol,
so drop it.
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_AT91SAM9G10EK
CONFIG_AT91SAM9261EK
CONFIG_AT91SAM9G10
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_AT91SAM9G20EK
CONFIG_AT91SAM9260EK
CONFIG_AT91SAM9G20EK_2MMC
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_AT91SAM9260
CONFIG_AT91SAM9G20
CONFIG_AT91SAM9XE
CONFIG_AT91SAM9261
CONFIG_AT91SAM9263
CONFIG_AT91SAM9G45
CONFIG_AT91SAM9M10G45
CONFIG_AT91SAM9N12
CONFIG_AT91SAM9RL
CONFIG_AT91SAM9X5
CONFIG_SAM9X60
CONFIG_SAMA7G5
CONFIG_SAMA5D2
CONFIG_SAMA5D3
CONFIG_SAMA5D4
These options are already select'd as needed, so we're just cleaning up
files here.
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_AM335X_USB0
CONFIG_AM335X_USB0_MODE
CONFIG_AM335X_USB1
CONFIG_AM335X_USB1_MODE
We do this by introducing specific options for static configuration of
USB0/USB1 in SPL rather than defining CONFIG_AM335X_USBx_MODE to the
enum value being used. Furthermore, with how the code is used now we do
not need to have OTG mode exposed as an option here, so remove that.
Signed-off-by: Tom Rini <trini@konsulko.com>
With all boards now using DM_ETH we determine the value for
CONFIG_FEC_XCV_TYPE at run time, except in the case of the default
fall-back. Set the fallback directly now.
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that all boards have been converted, remove the non-DM_ETH code.
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
A small number of i.MX6/7 and vf610 boards have not enabled DM_ETH yet.
Given the state of the rest of the platform, enable DM_ETH.
Cc: Alison Wang <alison.wang@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Richard Hu <richard.hu@technexion.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_ETHPRIME
This is also done by adding a gating Kconfig option, CONFIG_USE_ETHPRIME
similar to other options that are not always set and control environment
variables.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts removes the following symbols:
CONFIG_HAS_ETH0
CONFIG_HAS_ETH1
CONFIG_HAS_ETH2
CONFIG_HAS_ETH3
This is because at this point, only the ids8313 platform was using the
code which was controlled by these symbols. In turn, this code already
performs error checking on being able to perform the device tree fixup.
Rather than convert these to Kconfig for a single platform, update the
code to not need these checks and remove them from all the platforms
they were unused on.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_BOOT_RETRY_TIME
CONFIG_BOOT_RETRY_MIN
CONFIG_RESET_TO_RETRY
We also introduce CONFIG_BOOT_RETRY to gate these options, and clean up
the associated Makefile entry and C code for picking default values of
CONFIG_BOOT_RETRY_MIN.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_ARMV8_SWITCH_TO_EL1
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
This converts the following to Kconfig:
CONFIG_ARMV7_SECURE_BASE
CONFIG_ARMV7_SECURE_MAX_SIZE
CONFIG_ARMV7_SECURE_RESERVE_SIZE
Signed-off-by: Tom Rini <trini@konsulko.com>
As the CI test for stopping platforms from being merged that were
defining symbols that had Kconfig entries, a small number of symbols
needed to be migrated again. Do so, and catch two cases the README
should also have been updated but was not.
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit re-introduced a migrated CONFIG symbol to the board header
file. These changes should likely be handled via documentation instead,
as well.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We cannot define a CONFIG value here to ensure that the Kconfig value
isn't set wrong.
Fixes: 2c699fe0d34d ("configs: sunxi: Add common SUNIV header")
Cc: Icenowy Zheng <icenowy@aosc.io>
Cc: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
When calling comm to compare the CONFIG symbols a defconfig uses with
the symbols that have been migrated, we need to suppress all output as
the summary line will have everything we need. Failure to do this leads
to the test blowing up, but in non-fatal ways.
Signed-off-by: Tom Rini <trini@konsulko.com>
A comma at the end of a line gives sometimes strange
effects in combination with some code formatters,
so replace a comma by a semicolon in the sdram_rk3188.c
and sdram_rk3288.c files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
U-Boot can be chainloaded from vendor firmware on ARM64 chromebooks from
a GPT partition (roughly the same as in doc/chromium/chainload.rst), but
an appropriate image header must be built-in to the U-Boot binary by
enabling LINUX_KERNEL_IMAGE_HEADER.
This header has a field for an image load offset from 2MiB alignment
which must also be customized through LNX_KRNL_IMG_TEXT_OFFSET_BASE.
Set it equal to SYS_TEXT_BASE by default for Rockchip boards, which
happens to make this offset zero and works fine on chromebook_kevin
both for chainloading and bare-metal use.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove double semi-colon that has been forgotten while adding the
driver. This is only a style fix since it doesn't change the
functionality of the driver.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This is very useful to access the LibreComputer eMMC as removable
storage from a PC (e.g. like so `ums 0 mmc 0`). It has been tested as
working on my Renegade board.
Signed-off-by: Leonidas P. Papadakos <papadakospan at gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The current files and directories with wildcard patterns for
Rockchip patches in MAINTAINERS is not always complete.
Add the regex for DT related files and a generic regex for
catching some other forgotten cases, so that the maintainers
receive all Rockchip related patches.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add support for Kevin, an RK3399-based convertible chromebook that is
very similar to Bob. This patch is mostly based on existing support for
Bob, with only minor changes for Kevin-specific things.
Unlike other Gru boards, coreboot sets Kevin's center logic to 925 mV,
so adjust it here in the dts as well. The rk3399-gru-kevin devicetree
has an unknown event code reference which has to be defined, set it
to the Linux counterpart. The new defconfig is copied from Bob with the
diffconfig:
DEFAULT_DEVICE_TREE "rk3399-gru-bob" -> "rk3399-gru-kevin"
DEFAULT_FDT_FILE "rockchip/rk3399-gru-bob.dtb" -> "rockchip/rk3399-gru-kevin.dtb"
VIDEO_ROCKCHIP_MAX_XRES 1280 -> 2400
VIDEO_ROCKCHIP_MAX_YRES 800 -> 1600
+TARGET_CHROMEBOOK_KEVIN y
With this Kevin can boot from SPI flash to a usable U-Boot prompt on the
display with the keyboard working, but cannot boot into Linux for
unknown reasons.
eMMC starts in a working state but fails to re-init, microSD card works
but at a lower-than-expected speed, USB works but causes a hang on
de-init. There are known workarounds to solve eMMC and USB issues.
Cc: Marty E. Plummer <hanetzer@startmail.com>
Cc: Simon Glass <sjg@chromium.org>
[Alper: commit message, resync config with Bob, update MAINTAINERS,
add to Rockchip doc, add Kconfig help message, set regulator]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
This patch enables some configs that should be working on the Bob board,
based on what is observed to work on the Kevin board.
The Bob board uses an Embedded DisplayPort panel compatible with the
simple panel and Rockchip eDP drivers. Its backlight is controlled by
the Chromium OS Embedded Controller Pulse Width Modulator. Enable these
for the board.
Also set VIDEO_ROCKCHIP_MAX_{XRES,YRES} to 1280x800, the resolution of
its panel. This had to be done for the Kevin board, but it's untested if
this is actually necessary for Bob.
The Rockchip video driver needs to assert/deassert some resets, so also
enable the reset controller. RESET_ROCKCHIP defaults to y for this board
when DM_RESET=y, so it's enough to set that.
The Bob board has two USB 3.0 Type-C ports and one USB 2.0 Type-A port
on its right side. Enable the configs relevant to USB devices so these
can be used. This is despite a known issue with RK3399 boards where USB
de-init causes a hang, as there is a known workaround.
Some other rk3399-based devices enable support for the SoC's random
number generator in commit a475bef5340c ("configs: rk3399: enable rng on
firefly/rock960/rockpro64"), as it can provide a KASLR seed when booting
using UEFI. Enable it for Bob as well.
The default misc_init_r() for Rockchip boards sets cpuid and ethernet
MAC address based on e-fuse block. A previous patch extends this on Gru
boards to set registers related to SoC IO domains as is necessary on
these boards. Enable this function and configs for it on Bob.
The microSD card slot on this board (and others based on Gru) is
connected to a GPIO controlled regulator (ppvar-sd-card-io), which must
be operable by U-Boot. Enable the relevant config option to allow this.
Bob boards also use the Winbond W25Q64DW SPI flash chip, enable support
for Winbond SPI flash chips in the board config so U-Boot can boot with
this chip.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
This adds some devicetree settings for the Gru-based boards, based on
what works on a Kevin board.
Gru-based boards usually have an 8MiB SPI flash chip and boot from it.
Make the u-boot.rom file intended to be flashed on it match its size.
Add properties for booting from SPI, and only try to boot from SPI as
MMC and SD card don't seem to work in SPL yet.
The Chromium OS EC needs a delay between transactions so it can get
itself ready. Also it currently uses a non-standard way of specifying
the interrupt. Add these so that the EC works reliably.
The Rockchip Embedded DisplayPort driver is looking for a rockchip,panel
property to find the panel it should work on. Add the property for the
Gru-based boards.
The U-Boot GPIO controlled regulator driver only considers the
"enable-gpios" devicetree property, not the singular "enable-gpio" one.
Some devicetree source files have the singular form as they were added
to Linux kernel when it used that form, and imported to U-Boot as is.
Fix one instance of this in the Gru boards' devicetree to the form that
works in U-Boot.
The PWM controlled regulator driver complains that there is no init
voltage set for a regulator it drives, though it's not clear which one.
Set them all to the voltage levels coreboot sets them: 900 mV.
The RK3399 SoC needs to know the voltage level that some supplies
provides, including one fixed 1.8V audio-related regulator. Although
this synchronization is currently statically done in the board init
functions, a not-so-hypothetical driver that does this dynamically would
query the regulator only to get -ENODATA and be confused. Make sure
U-Boot knows this supply is at 1.8V by setting its limits to that.
Most of this is a reapplication of commit 08c85b57a5ec ("rockchip: gru:
Add extra device-tree settings") whose changes were removed during a
sync with Linux at commit 167efc2c7a46 ("arm64: dts: rk3399: Sync
v5.7-rc1 from Linux"). Apply things to rk3399-gru-u-boot.dtsi instead so
they don't get lost again.
Signed-off-by: Simon Glass <sjg@chromium.org>
[Alper: move to -u-boot.dtsi, rewrite commit message, add more nodes]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
The RK3399 SoC needs to know the voltage value provided by some
regulators, which is done by setting relevant register bits. Configure
these the way other RK3399 boards do, but with the same values as are
set in the equivalent code in coreboot.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
microblaze:
- Add support for reserved memory
xilinx:
- Update FRU code with MAC reading
zynqmp:
- Remove double AMS setting
- DT updates (mostly for SOMs)
- Add support for zcu106 rev 1.0
zynq:
- Update nand binding
nand:
- Aligned zynq_nand to upstream DT binding
net:
- Add support for ethernet-phy-id
mmc:
- Workaround CD in zynq_sdhci driver also for ZynqMP
- Add support for dynamic/run-time SD config for SOMs
gpio:
- Add driver for slg7xl45106
firmware:
- Add support for dynamic SD config
power-domain:
- Update zynqmp driver with the latest firmware
video:
- Add skeleton driver for DP and DPDMA
i2c:
- Fix i2c to work with QEMU
pinctrl:
- Add driver for zynqmp pinctrl driver
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Merge tag 'xilinx-for-v2022.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.07-rc1
microblaze:
- Add support for reserved memory
xilinx:
- Update FRU code with MAC reading
zynqmp:
- Remove double AMS setting
- DT updates (mostly for SOMs)
- Add support for zcu106 rev 1.0
zynq:
- Update nand binding
nand:
- Aligned zynq_nand to upstream DT binding
net:
- Add support for ethernet-phy-id
mmc:
- Workaround CD in zynq_sdhci driver also for ZynqMP
- Add support for dynamic/run-time SD config for SOMs
gpio:
- Add driver for slg7xl45106
firmware:
- Add support for dynamic SD config
power-domain:
- Update zynqmp driver with the latest firmware
video:
- Add skeleton driver for DP and DPDMA
i2c:
- Fix i2c to work with QEMU
pinctrl:
- Add driver for zynqmp pinctrl driver
On RK3568, a register bit must be set to enable Enhanced Strobe.
However, it appears that the address of this register may differ from
vendor to vendor and should be read from the underlying MMC IP. Let the
Rockchip SDHCI driver read this address and set the relevant bit when
Enhanced Strobe configuration is requested.
The IP uses a custom mode select value (0x7) for HS400, use that instead
of the common but non-standard SDHCI_CTRL_HS400 value (0x5). Also add
some necessary DLL_STRBIN and DLL_TXCLK configuration for HS400.
Additionally, a bit signifying that the connected hardware is an eMMC
chip must be set to enable Data Strobe for HS400 and HS400ES modes. Also
make the driver set this bit as appropriate.
This is partly ported from Linux's Synopsys DWC MSHC driver which
happens to be the underlying IP. (drivers/mmc/host/sdhci-of-dwcmshc.c in
Linux tree).
Co-developed-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On RK3399, a register bit must be set to enable Enhanced Strobe.
Let the Rockchip SDHCI driver set it when Enhanced Strobe configuration
is requested. However, having it set makes the lower-speed modes stop
working and makes reinitialization fail, so let it be unset as needed in
set_control_reg().
This is mostly ported from Linux's Arasan SDHCI driver which happens
to be the underlying IP. (drivers/mmc/host/sdhci-of-arasan.c in Linux
tree).
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Generic SDHCI driver received support for checking the busy status by
polling the DAT[0] level instead of waiting for the worst MMC switch time.
Unfortunately, it appears that this does not work for Xenon controllers
despite being a part of the standard SDHCI registers and the Armada 3720
datasheet itself telling that BIT(20) is useful for detecting the DAT[0]
busy signal.
I have tried increasing the timeout value, but I have newer managed to
catch DAT_LEVEL bits change from 0 at all.
This issue appears to hit most if not all SoC-s supported by Xenon driver,
at least A3720, A8040 and CN9130 have non working eMMC currently.
So, until a better solution is found drop the wait_dat0 OP for Xenon.
I was able to only test it on A3720, but it should work for others as well.
Fixes: 40e6f52454fc ("drivers: mmc: Add wait_dat0 support for sdhci driver")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Stefan Roese <sr@denx.de>
e-MMC and SD standards differ for some CID fields:
- 6 Byte Name - assigned by Manufacturer (SD 5 Byte)
- 1 Byte OEM - assigned by Jedec (SD 2 Byte)
See e-MMC standard (JEDEC Standard No. 84-B51), 7.2.3 (OID) and 7.2.4 (PNM)
Signed-off-by: Max Merchel <Max.Merchel@tq-group.com>
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
After commit f132aab40327 ("Revert "mmc: fsl_esdhc_imx: use
VENDORSPEC_FRC_SDCLK_ON to control card clock output""), it
involve issue in mmc_switch_voltage(), because of the special
design of usdhc.
For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN,
these are reserved bits(Though RM contain the definition of these bits,
but actually internal IC logic do not implement, already confirm with
IC team). Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the card
clock output. Here is the definition of this bit in RM:
[8] FRC_SDCLK_ON
Force CLK output active
Do not set this bit to 1 unless it is necessary. Also, make sure that
this bit is cleared when uSDHC’s clock is about to be changed (frequency
change, clock source change, or delay chain tuning).
0b - CLK active or inactive is fully controlled by the hardware.
1b - Force CLK active
In default, the FRC_SDCLK_ON is 0. This means, when there is no command
or data transfer on bus, hardware will gate off the card clock. But in
some case, we need the card clock keep on. Take IO voltage 1.8v switch
as example, after IO voltage change to 1.8v, spec require gate off the
card clock for 5ms, and gate on the clock back, once detect the card
clock on, then the card will draw the dat0 to high immediately. If there
is not clock gate off/on behavior, some card will keep the dat0 to low
level. This is the reason we fail in mmc_switch_voltage().
To fix this issue, and concern that this is only the fsl usdhc hardware
design limitation, set the bit FRC_SDCLK_ON in the beginning of the
wait_dat0() and clear it in the end. To make sure the 1.8v IO voltage
switch process align with SD specification.
For standard tuning process, usdhc specification also require the card
clock keep on, so also add these behavior in fsl_esdhc_execute_tuning().
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Commit 0934dddc6436 ("arm: a37xx: Update DTS files to version from
upstream Linux kernel") ported Linux's device-tree files for Armada 3720
SOCs. This broke network on Turris MOX, because the SOC's MDIO bus in
U-Boot currently isn't probed via DM as it's own device, but is
registered as part of mvneta's driver, which means that pinctrl
definitions are not parsed for the MDIO bus node. Also mvneta driver
does not consider "phy-handle" property, only "phy".
For now, fix this by adding armada-3720-turris-mox-u-boot.dtsi file
returning the MDIO to how it was defined previously.
A better solution (using proper mvmdio DM driver) is being work on, but
will need testing on various boards, and we need the bug fixed now for
the upcoming release.
Fixes: 0934dddc6436 ("arm: a37xx: Update DTS files to version from upstream Linux kernel")
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Update the LZ4 compression module based on LZ4 v1.8.3 in order to
use the newest LZ4_decompress_safe_partial() which can now decode
exactly the nb of bytes requested.
Signed-off-by: Huang Jianan <jnhuang95@gmail.com>
stm32mp1 bsec: Add permanent lock write support
stm32mp1 bsec: Add dev in function description
cmd_stboard: Update test on misc_read() result
video: fix the check of return value of clk_set_rate in stm32_ltdc
DT: Alignment with kernel v5.17 for stm32mp15
DT: Add USB OTG pinctrl and regulator in SPL for DHCOR
DT: Move vdd_io extras into Avenger96 extras
DT: Add DFU support for DHCOM recovery
ram: stm32mp1: Unconditionally enable ASR
psci: Implement PSCI system suspend and DRAM SSR for stm32mp
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Merge tag 'u-boot-stm32-20220315' of https://source.denx.de/u-boot/custodians/u-boot-stm
mtd: add NAND write protect support to stm32_fmc2_nand
stm32mp1 bsec: Add permanent lock write support
stm32mp1 bsec: Add dev in function description
cmd_stboard: Update test on misc_read() result
video: fix the check of return value of clk_set_rate in stm32_ltdc
DT: Alignment with kernel v5.17 for stm32mp15
DT: Add USB OTG pinctrl and regulator in SPL for DHCOR
DT: Move vdd_io extras into Avenger96 extras
DT: Add DFU support for DHCOM recovery
ram: stm32mp1: Unconditionally enable ASR
psci: Implement PSCI system suspend and DRAM SSR for stm32mp
Using bias-pull-up would actually cause the pin to have its pull-down
enabled. Fix this.
Original Linux patch by Sean Anderson:
https://lore.kernel.org/linux-gpio/20220209182822.640905-1-seanga2@gmail.com/
Fixes: 7224d5ccf8e1 ("pinctrl: Add support for Kendryte K210 FPIOA")
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
The loop exited too early so the k210_pc_drive_strength[0] array element
was never used.
Original Linux patch by Dan Carpenter:
https://lore.kernel.org/linux-gpio/20220209180804.GA18385@kili/
Fixes: 7224d5ccf8e1 ("pinctrl: Add support for Kendryte K210 FPIOA")
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
The designware spi driver unconditionally uses polling.
The comment to spi_hw_init() also states that the function should disable
interrupts.
According to the DesignWare DW_apb_ssi Databook, value 0xff in IMR enables
all interrupts. Since we want to mask all interrupts write 0x0 instead.
On the canaan k210 board, pressing the reset button twice to reset the
board will run u-boot. If u-boot boots Linux without having SPI interrupts
masked, Linux will hang as soon as interrupts are enabled, because of an
interrupt storm.
Properly masking the SPI interrupts in u-boot allows us to successfully
boot Linux, even after resetting the board.
Fixes: 5bef6fd79f94 ("spi: Add designware master SPI DM driver used on SoCFPGA")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
[Niklas: rewrite commit message]
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
The Canaan Kendryte K210 SoC DW apb_ssi v4 spi controller is documented
to have a 32 word deep TX and RX FIFO, which spi_hw_init() detects.
However, when the RX FIFO is filled up to 32 entries (RXFLR = 32), an
RX FIFO overrun error occurs. Avoid this problem by force setting
fifo_len to 31.
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
The Linux PLIC interrupt-controller driver actually initializes the hart
context registers in the PLIC driver exactly in the same order as
specified in the interrupts-extended device tree property. See the device
tree binding [1].
The ordering of the interrupts is therefore essential in order to
configure the PLIC correctly.
Fix the order so that we will have sane IRQ behavior when booting Linux
with the u-boot device tree.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Linux kernel fpioa pinctrl driver expects the sysctl phandle and the
power bit offset of the fpioa device to be specified as a single
property "canaan,k210-sysctl-power".
Replace the "canaan,k210-sysctl" and "canaan,k210-power-offset"
properties with "canaan,k210-sysctl-power" to satisfy the Linux kernel
requirements. This new property is parsed using the existing function
dev_read_phandle_with_args().
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Linux drivers for many of the K210 peripherals depend on the power bus
clock to be specified. Add the missing clocks and their names to avoid
problems when booting Linux using u-boot DT.
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
"kendryte" is the marketing name for the K210 RISC-V SoC produced by
Canaan Inc. Rather than "kendryte,k210", use the usual "canaan,k210"
vendor,SoC compatibility string format in the device tree files and
use the SoC name for file names.
With these changes, the device tree files are more in sync with the
Linux kernel DTS and drivers, making uboot device tree usable by the
kernel.
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This patch configures U-Boot SPL for DHCOM SoM to permit DFU upload of
SPL and subsequent u-boot.itb for recovery or commissioning purposes.
The DFU usage procedure is identical to STM32MP1 DHCOR SoM, see commit
3919aa1722a ("ARM: dts: stm32: Add DFU support for DHCOR recovery") ,
except for switching the SoM into DFU mode. By default, the DHCOM SoM
has no dedicated mechanism for setting BOOTn straps into UART/USB mode,
therefore to enter DFU mode, the SoC must fail to boot from boot media
which can be selected by the BOOTn strap override mechanism first and
then fall back to DFU mode.
In case of a SoM with pre-populated BOOTn strap override button, power
the system off, remove microSD card (if applicable), hold down the BOOTn
strap override button located between eMMC and SoM edge connector, power
on the SoM. The SoC will fail to boot from SD card and fall back into
DFU mode.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Implement PSCI system suspend and placement of DRAM into SSR while the
CPUs are in suspend. This saves non-trivial amount of power in suspend,
on 2x W632GU6NB-15 ~710mW.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Enable DRAM ASR, auto self-refresh, unconditionally. This saves non-trivial
amount of power both at runtime and in suspend (on 2x W632GU6NB-15 ~150mW).
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
The vdd_io regulator is present only on DHCOR SoM configured for 1V8 IO,
as populated on Avenger96, but not present on 3V3 DHCOR SoM. Move these
extras to Avenger96 u-boot DT extras.
Fixes: 3919aa1722a ("ARM: dts: stm32: Add DFU support for DHCOR recovery")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fix the following warning in SPL and make sure that even DTs which
enforce Vbus detection using u-boot,force-vbus-detection;, the DFU
in SPL will work.
dwc2-udc-otg usb-otg@49000000: prop pinctrl-0 index 0 invalid phandle
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Device tree alignment with Linux kernel v5.17-rc1
- ARM: dts: stm32: add pull-up to USART3 and UART7 RX pins
on STM32MP15 DKx boards
- ARM: dts: stm32: clean uart4_idle_pins_a node for stm32mp15
- ARM: dts: stm32: tune the HS USB PHYs on stm32mp15xx-dkx
- ARM: dts: stm32: tune the HS USB PHYs on stm32mp157c-ev1
- ARM: dts: stm32: fix stusb1600 pinctrl used on stm32mp157c-dk
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clk_set_rate() function returns rate as an 'ulong' not
an 'int' and rate > 0 by default.
This patch avoids to display the associated warning when
the set rate function returns the new frequency.
Fixes: aeaf330649e8 ("video: stm32: stm32_ltdc: add bridge to display controller")
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Update management of misc_read/misc_write, which now returns length of
data after the commit 8729b1ae2cbd ("misc: Update read() and write()
methods to return bytes xfered"): raise a error when the result is not
the expected length.
Fixes: 658fde8a36ff ("board: stm32mp1: stboard: lock the OTP after programming")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add the missing @dev reference in some function description.
Fixes: b66bfdf238b9 ("arm: stm32mp: bsec: migrate trace to log macro")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of the permanent lock support in U-Boot proper
when BSEC is not managed by secure monitor (TF-A SP_MIN or OP-TEE).
This patch avoid issue with stm32key command and fuse command
on basic boot for this missing feature of U-Boot BSEC driver.
Reported-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This patch adds the support of the WP# signal. WP will be disabled
before the first access to the NAND flash.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
- convert Nokia RX-51 to CONFIG_DM_VIDEO
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Merge tag 'video-20220314' of https://source.denx.de/u-boot/custodians/u-boot-video
- fix display of the u-boot logo on Apple devices
- convert Nokia RX-51 to CONFIG_DM_VIDEO
This saves about 12 kBytes image size and helps to stay within the
size limit.
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Soeren Moch <smoch@web.de>
Commit 90f262a6951f ("vexpress64: Clean up BASE_FVP boot configuration")
cleaned up the usage of default address variables, but missed to update
the address for the kernel in the FVP's bootcmd definition.
Change ${kernel_addr} to read ${kernel_addr_r} to bring back the
automated boot for the fastmodel.
Also use "setenv" instead of the potentially ambiguous "set" on the way.
Fixes: 90f262a6951f ("vexpress64: Clean up BASE_FVP boot configuration")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Initialization and power on operations of links have been moved under the
link device in the Sierra SerDes driver. Also, the UCLASS of
sierra_phy_provider has been changed to UCLASS_MISC.
Therefore, fix the probing of SerDes0 instance accordingly.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Georgi Vlaev <g-vlaev@ti.com>
In commit 6f46c7441a9f ("phy: cadence: Sierra: Add a UCLASS_PHY device for
links"), a separate udevice of type UCLASS_PHY was created for each link.
Therefore, move the corresponding link operations under the link device.
Also, change the uclass of sierra phy to UCLASS_MISC as it is no longer the
phy device.
Fixes: 6f46c7441a9f ("phy: cadence: Sierra: Add a UCLASS_PHY device for links")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Georgi Vlaev <g-vlaev@ti.com>
The Rockchip RK3399 eMMC PHY has to be power-cycled while changing its
clock speed to some higher speeds. This is dependent on the desired
SDHCI clock speed, and it looks like the PHY should be powered off while
setting the SDHCI clock in these cases.
Commit ac804143cfd1 ("mmc: rockchip_sdhci: add phy and clock config for
rk3399") attempts to do this in the set_ios_post() hook by setting the
SDHCI clock once more while the PHY is turned off/on as necessary, as
the SDHCI framework does not provide a way to override how it sets its
clock. However, the commit breaks reinitializing the eMMC on a few
boards including chromebook_kevin and reportedly ROCKPro64.
This patch reworks the power cycling to utilize the SDHCI framework
slightly better (using the set_control_reg() hook to power off the PHY
and set_ios_post() hook to power it back on) which happens to fix the
issue, at least on a chromebook_kevin.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
After double checking some i2c addresses are not correct. It is visible
from i2c dump
ZynqMP> i2c bus
Bus 3: i2c@ff020000
74: i2c-mux@74, offset len 1, flags 0
Bus 5: i2c@ff020000->i2c-mux@74->i2c@0
Bus 6: i2c@ff020000->i2c-mux@74->i2c@2
Bus 7: i2c@ff020000->i2c-mux@74->i2c@1
Bus 8: i2c@ff020000->i2c-mux@74->i2c@3
Bus 4: i2c@ff030000 (active 4)
74: i2c-mux@74, offset len 1, flags 0
Bus 9: i2c@ff030000->i2c-mux@74->i2c@0
Bus 10: i2c@ff030000->i2c-mux@74->i2c@3
Bus 11: i2c@ff030000->i2c-mux@74->i2c@4
Bus 12: i2c@ff030000->i2c-mux@74->i2c@5 (active 12)
51: generic_51, offset len 1, flags 0
60: generic_60, offset len 1, flags 0
74: generic_74, offset len 1, flags 0
Bus 13: i2c@ff030000->i2c-mux@74->i2c@6 (active 13)
51: generic_51, offset len 1, flags 0
5d: generic_5d, offset len 1, flags 0
74: generic_74, offset len 1, flags 0
ZynqMP> i2c dev 4
Setting bus to 4
ZynqMP> i2c mw 74 0 18
ZynqMP> i2c probe
Valid chip addresses: 18 36 37 50 51 60 74
ZynqMP> i2c mw 74 0 20
ZynqMP> i2c probe
Valid chip addresses: 51 60 74
where it is clear that si570 (u5) is at 0x60 address and 8t49n240 (u39) is
also at address 0x60 based on log above.
i2c address 0x74 is i2c mux and 0x51 is eeprom.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/0a198e9d993411e41473d130d5a5c20b6dc83458.1646639616.git.michal.simek@xilinx.com
Xilinx ZynqMP SOC can set 6 parameters for its pins. pinmux status
command will print the status of these parameters for each pin. But
current print buffer length is only 40 characters long, increase it
to 80 to print all the parameters.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3a6be84c8354f38754a9838670cc0319e84f29e8.1645626183.git.michal.simek@xilinx.com
There is really no value to check empty spaces. That's why use
ut_assert_nextlinen() instead of ut_assert_nextline().
This change ensures that PINMUX_SIZE can be increased without changing
tests.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/03aecf4c67ec8d72bf2a90baf1516fc5bd300fe0.1646668094.git.michal.simek@xilinx.com
Remap PCI I/O space to the bus address 0x0 in the Armada 37xx device-tree
in order to support legacy I/O port based cards which have hardcoded I/O
ports in low address space.
Some legacy PCI I/O based cards do not support 32-bit I/O addressing.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit 9e6d71d2b55f ("tools: kwboot: Allow to use -b without image path as
the last getopt() option") broke usage of kwboot with following arguments:
kwboot -t -B 115200 /dev/ttyUSB0 -b u-boot-spl.kwb
Fix parsing of option -b with optional argument again.
Fixes: 9e6d71d2b55f ("tools: kwboot: Allow to use -b without image path as the last getopt() option")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reported-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Tony Dinh <mibodhi at gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Call kwboot_open_tty() which baudrate value which was specified at the
command line by option -B. This function returns error if baudrate is not
supported by selected tty device.
Initial baudrate for image transfer is always 115200, so call
kwboot_tty_change_baudrate() with value 115200 immediately after
kwboot_open_tty() if baudrate specified by option -B is different than
115200.
This makes kwboot fail immediately, informing that baudrate is unsupported,
instead of failing only after the first part of image is already sent.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Custom baudrate different than 115200 may be specified only when kwboot is
not going to send boot/debug message pattern or when it is going to send
boot message pattern with image file (in which case baudrate change happens
after sending kwbimage header). BootROM detects boot/debug message pattern
only at baudrate 115200.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
dev_read_size() returns -EINVAL (-22) if the property "g-tx-fifo-size"
does not exist. If that's the case, we now keep the default value of 0.
Signed-off-by: Wolfgang Grandegger <wg@aries-embedded.de>
Enable I2C support for R-Car V3H (R8A77980) on Condor board.
Signed-off-by: Nam Nguyen <nam.nguyen.yh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Enable I2C support for R-Car V3M (R8A77970) on Eagle board.
Signed-off-by: Nam Nguyen <nam.nguyen.yh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Enable I2C support for R-Car V3U (R8A779A0) on Falcon board.
Signed-off-by: Nam Nguyen <nam.nguyen.yh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This enum is currently anonymous. Add a name so it can be used in the
code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
InstallProtocolInterface() is called with a pointer to the protocol GUID.
There is not guarantee that the memory used by the caller for the protocol
GUID stays allocated. To play it safe the GUID should be copied to U-Boot's
internal structures.
Reported-by: Joerie de Gram <j.de.gram@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Currently the cls command does not support the serial console
The screen can be cleared in the video uclass, the colored frame buffer
console, and the serial console by sending the same escape sequence.
This reduces the cls command to a single printf() statement on most
boards.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Gigadevice gd25lq128 serial flash exists in different versions,
all which identify themselves using the same JEDEC id.
gd25lq128c:
https://www.gigadevice.com/datasheet/gd25lq128
gd25lq128d:
https://www.gigadevice.com/datasheet/gd25lq128d
However, all versions support quad read, so enable it.
Tested and verified on the Sipeed MAix BiT board.
Fixes: 30b9a28a3f2d ("mtd: spi-nor-ids: Add Gigadevice gd25lq128 ID")
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This adds platform code and the device tree for the Phytium Pomelo Board.
The initial support comprises the UART and the PCIE.
Signed-off-by: weichangzheng <nicholas_zheng@outlook.com>
get_osc_clk_speed and get_sys_clkin_sel are only used in
one file. Make them static.
Tested on OMAP3530, DM3730, AM3517.
Signed-off-by: Adam Ford <aford173@gmail.com>
With updated device trees now supporting pinmuxing for USB,
ethernet, MMC, and other peripherals necessary to start MLO
and U-Boot, the hard-coded pinmux options can be removed since
they are now handed by DM and only muxed when the respective
peripheral needs it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
Sync the am3517-evm device tree files with those from Linux
5.17-rc5 with some additional fixes for pinmuxing Ethernet and
moving the pinmux references to the respective peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
With recent fixes to USB pinmuxing in the device trees, there
is no need to hard-code the pinmuxing in this table. It is
all handled in DM now.
Signed-off-by: Adam Ford <aford173@gmail.com>
Resync the DTS files for the Logic PD SOM-LV with Linux 5.17-rc5
with some additional pending changes to address issues with
wrong pin-muxing on the OMAP35.
Signed-off-by: Adam Ford <aford173@gmail.com>
The ethernet controller is DM compliant, and the device tree
defines it. There is no need to manually handle pulling
the ethernet out of reset.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
QSGMII PHY present on the j721e common processor board requires
to be initialized before the core boots up. Therefore, run the
corresponding command during boot to do the same.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add the command "boot_rprocs" that is required for booting remote
processors in U-Boot.
Fixes: 5980925e2a5a ("include: configs: j721e_evm: Add support to boot ethfw core in j721e")
Reported-by: Jesse Villarreal <jesse.villarreal@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
QSGMII PHY initialization should only be done for J721E EVMs and not for
J721E-SK boards. Therefore, fix the environment variables accordingly.
Also, by default remote processors should not be booted in U-Boot but
rather be left to the users to enable this by setting dorprocboot.
Therefore, remove dorprocboot that is being set by default.
Fixes: 5980925e2a5a ("include: configs: j721e_evm: Add support to boot ethfw core in j721e")
Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Ensure the ASPEED related options are grouped together under the RAM
option when enabling support.
This also makes some minor grammar corrections and renames options so
they present cleanly in menuconfig.
There should be no functional change to the configuration or binary.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Dylan Hung <dylan_hung@aspeedtech.com>
Enabling DM_PMIC, DM_REGULATOR_FIXED, and DM_REGULATOR_GPIO
gives us the ability to better monitor voltages and enable
hardware through the device tree. The TL4030 (TPS65950) is
not yet migrated to DM, so this patch only enables the fixed
and GPIO controlled regulators.
Based on commit [1][2].
[1] a40d3cc845756e1e38af5ac31986539417e64abb
[2] 2448e42d73fb91e4b56bb41b2677e18ab99a6c83
Signed-off-by: Romain Naour <romain.naour@gmail.com>
The simple pinctrl driver currently available works with the omap3.
Enabling this will use the device tree to automatically set the
pin-muxing for various drivers.
Based on commit: 57dbf754e37d3347cad441f3869bf72c0d726a71
Signed-off-by: Romain Naour <romain.naour@gmail.com>
The PMIC enables power to the MMC card by default, but depending
on the state it was left when restarted, it's possible the MMC
may be powered down.
This patch patch explicitly tells the twl4030 to power the MMC.
Based on commits [1][2].
[1] 64fd2d26140aa72b43428d079974f7c0e7f88353
[2] 27b653449178e80b333e7bc5a81eed3bd1bd6861
Signed-off-by: Romain Naour <romain.naour@gmail.com>
With DM_MMC working for both SPL and U-Boot, this patch removes
the legacy style of initializing the MMC driver.
Based on omap3_logic: 42140dd0962bc134c0aad27524d0f4cc3955f255.
Signed-off-by: Romain Naour <romain.naour@gmail.com>
To quote the author:
It is a common need in U-Boot to have one subsystem notify another
when something happens. An example is reading a partition table when a
new block device is set up.
It is also common to add weak functions and 'hook' functions to modify
how U-Boot works. See for example ft_board_setup() and the like.
U-Boot would benefit from a generic mechanism to handle these cases,
with the ability to hook into various 'events' in a
subsystem-independent and transparent way.
This series provides a way to create and dispatch events, with a way of
registering a 'spy' which watches for events of different types. This
allows 'hook' functions to be created in a generic way.
It also includes a script to list the hooks in an image, which is a bit
easier to debug than weak functions, as well as an 'event' command to
do the same from within U-Boot.
These 'static' events can be used to replace hooks like misc_init_f(),
for example. Also included is basic support for 'dynamic' events, where
a spy can be registered at runtime. The need for this is still being
figured out.
For debugging and dicoverability it is useful to be able to see a list of
each event spy in a U-Boot ELF file. Add a script which shows this, along
with the event type and the source location. This makes events a little
easier to use than weak functions, for example.
Add a basic sandbox test as well. We could provide a test for other
boards, but for now, few use events.
Signed-off-by: Simon Glass <sjg@chromium.org>
Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.
Signed-off-by: Simon Glass <sjg@chromium.org>
This hook can be implmented using events, for the three boards that
actually use it.
Add the event type and event handlers. Drop CONFIG_MISC_INIT_F since we
can just use CONFIG_EVENT to control this. Since sandbox always enables
CONFIG_EVENT, we can drop the defconfig lines there too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Generate events when devices are probed or removed, allowing hooks
to be added for these situations.
This is controlled by the DM_EVENT config option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a way to create and dispatch events without needing to allocate
memory. Also add a way to 'spy' on events, thus allowing 'hooks' to be
created.
Use a linker list for static events, which we can use to replace functions
like arch_cpu_init_f(). Allow an EVENT_DEBUG option which makes it
easier to see what is going on at runtime, but uses more code space.
Dynamic events allow the creation of a spy at runtime. This is not always
necessary, but can be enabled with EVENT_DYNAMIC if needed.
A 'test' event is the only option for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow finding a symbol by its address. Also export the function to get
the file offset of a particular address, so it can be used by a script to
be added.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some sunxi boards ship with SPI flash, which allows booting through the
BootROM. We cover this functionality by a separate SPL "mini" driver.
Separately we have a proper DM_SPI driver for U-Boot proper, which
provides access to the SPI flash through the "sf" command. That allows
to update the firmware on the SPI flash, also to store the environment
there.
However only very few boards actually enable support for U-Boot proper,
even though that would work and the SPL part is configured.
Use the cleaned up configuration scheme to enable SPI flash on those
boards which mention a SPI flash in their .dts, or which use the SPL SPI
support.
Out of the box this would enable storing the environment on the SPI
flash, and allows people to read or write the flash from U-Boot, for
instance to update the SPI flash when booted via an SD card.
For this to actually work there must be a "spi0" alias in the DT, which
most boards are missing. But this should be addressed separately.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Now that sunxi uses CONFIG_SPI more sanely, and can also now properly
load the environment from SPI flash, let's enable the symbol that
actually considers the SPI flash when accessing the environment.
As this symbol depends on CONFIG_SPI, which we now only enable if the
board has a SPI flash, we can make if "default y" for all Allwinner
boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Currently we only support to load the environment from raw MMC or FAT
locations on Allwinner boards. With the advent of SPI flash we probably
also want to support using the environment there, so we need to become
a bit more flexible.
Change the environment priority function to take the boot source into
account. When booted from eMMC or SD card, we use FAT or MMC, if
configured, as before.
If we are booted from SPI flash, we try to use the environment from
there, if possible. The same is true for NAND flash booting, although
this is somewhat theoretical right now (as untested).
This way we can use the same image for SD and SPI flash booting, which
allows us to simply copy a booted image from SD card to the SPI flash,
for instance.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
To allow loading and storing the environment from SPI flash, adjust the
raw offset variables for Allwinner boards to make sense there.
U-Boot (including SPL and other blobs) is loaded from the beginning of
SPI flash, so move the environment location as far back as possible, to
not create unnecessary limits. As those offsets are shared with (now
mostly unused) raw MMC environment, we should respect the common one
megabyte limit, which also makes sense on SPI flash.
So limit the environment for those raw locations to 64KB, and place it
just below 1MB (@960KB).
Those values are currently unused, unless someone forcibly enables the
raw MMC environment. In this case it would break as of now, as the
current offset of 544KB is far too low for the current (arm64) U-Boot
proper.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Commit 7945caf22c44 ("arm: sunxi: Enable SPI/SPI-FLASH support for A64")
selected CONFIG_SPI by default on all Allwinner A64 boards, even though
only 4 out of the 14 A64 boards have a SPI flash chip. All other SoCs
had to manually select DM_SPI and friends, even though they are a
platform property (the sunxi SPI driver is DM_SPI only).
Clean this up to allow easy selection of SPI flash support in U-Boot
proper, by selecting DM_SPI and DM_SPI_FLASH *if* CONFIG_SPI is
selected, for *all* Allwinner SoCs. This simplifies the defconfig for
two Libretech boards already.
Also remove the forced CONFIG_SPI from the A64 Kconfig, instead let the
four boards which allow SPI booting select this explicitly.
Any board wishing to support SPI flash in U-Boot proper now just defines
CONFIG_SPI and CONFIG_SPI_FLASH_<vendor> in its defconfig, Kconfig takes
care of the rest.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Mechanically convert video_hw_init() function to UCLASS_VIDEO probe
callback and replace CONFIG_CFB_CONSOLE by CONFIG_DM_VIDEO.
As framebuffer base address is setup by the bootloader which loads U-Boot,
set plat->base to that fixed framebuffer address.
This change was tested in qemu n900 machine and is working fine.
What does not work is CONFIG_VIDEO_LOGO, seems to be buggy.
Signed-off-by: Pali Rohár <pali@kernel.org>
Ethernet phy like dp83867 is using strapping resistors to setup PHY
address. On Xilinx boards strapping is setup on wires which are connected
to SOC where internal pull ups/downs influnce phy address. That's why there
is a need to setup pins properly (via pinctrl driver for example) and then
perform phy reset. I can be workarounded by reset gpio done for mdio bus
but this is not working properly when multiply phys sitting on the same
bus. That's why it needs to be done via ethernet-phy-id driver where dt
binding has gpio reset per phy.
DT binding is available here:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-phy.yaml
The driver is are reading the vendor and device id from valid phy node
using ofnode_read_eth_phy_id() and creating a phy device.
Kconfig PHY_ETHERNET_ID symbol is used because not every platform has gpio
support.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Link: https://lore.kernel.org/r/70ab7d71c812b2c972d48c129e416c921af0d7f5.1645627539.git.michal.simek@xilinx.com
Avoid a race condition where read transaction is started
keeping expected bytes as 0. Which sometimes would result in sending
STOP signal as no data is expected. Observed on QEMU platform.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/487c8026791bfd60719403a2df2c54bb0ae99232.1646122610.git.michal.simek@xilinx.com
Add support for dynamic configuration which will takes care of
configuring the SD secure space configuration registers using firmware
APIs, performing SD reset assert and deassert.
High level sequence:
- Check for the PM dynamic configuration support, if no error proceed
with SD dynamic configurations(next steps) otherwise skip the dynamic
configuration.
- Put the SD Controller in reset.
- Configure SD Fixed configurations.
- Configure the SD Slot Type.
- Configure the BASE_CLOCK.
- Configure the 8-bit support.
- Bring the SD Controller out of reset.
In the above steps, apart from the Fixed configurations, remaining all
configurations are dynamic and they will be read from devicetree.
And also remove hardcoded secure register writes, as dynamic sd config
support is added.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/030a3ec041ff3efebd574b4d2b477ad85f12cbce.1645626962.git.michal.simek@xilinx.com
Most of the frequencies are not rounded up to a proper number.
When we need to devide these frequencies to get a number for example
frequency in Mhz, we see it as one less than the actual intended value.
Ex: If we want to get Mhz from frequency 199999994hz, we will calculate
it using div64_u64(199999994, 1000000) and we will get 199Mhz in place
of 200Mhz.
Add a macro DIV64_U64_ROUND_UP for rounding up div64_u64. This is taken
from linux 'commit 68600f623d69("mm: don't miss the last page because of
round-off error")'.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f9fdcba76cd692ae436b1d7883b490e3dc207231.1645626962.git.michal.simek@xilinx.com
Since commit 5d94cbd1dca7 ("scripts: Makefile.lib: generate
dsdt_generated.c instead of dsdt.c"), the file generated
is named dsdt_generated.c instead of dsdt.c.
So all files .gitignore referencing dsdt.c should be
upated with dsdt_generated.c.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The stdout-path property in the device tree does not necessarily
point at a serial device. On machines such as the Apple M1 laptops
where the serial port isn't easy to access and users expect to see
console output on the integrated display stdout-path may point at
the device tree node for the framebuffer for example.
If stdout-path does not point at a node for a serial device, the
serial_check_stdout() will not find a bound device and will drop
down into code that attempts to use lists_bind_fdt() to bind a
device anyway. However, that fallback code does not check that
the uclass of the device is UCLASS_SERIAL. So if stdout-path points
at the framebuffer instead of the serial device it will return a
UCLASS_VIDEO device. Since the code that calls this function
expects the returned device to be a UCLASS_SERIAL device, U-Boot
will crash as soon as it attempts to send output to the console.
Add a check here to verify that the uclass of the bound device
really is UCLASS_SERIAL. If it isn't, serial_check_stdout() will
return an error and serial_find_console_or_panic() will use the
serial device with sequence number 0 as the console and all is fine.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is one issue with Heinrich xypron.glpk@gmx.de <xypron.glpk@gmx.de>
record which should be specifically grouped with his name.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
When running against RC_OSC_32k, the watchdog may suffer from running
faster than expected, expiring earlier. The Linux kernel adds a 10%
margin to the timeout calculation by slowing down the read clock rate
accordingly. Do the same here, also to have comparable preset values
for both drivers.
Along this, fix the name of the local var holding to frequency - in Hz,
not kHz.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Stefan Roese <sr@denx.de>
If Armada 37xx watchdog is started before U-Boot then CNTR_CTRL_ACTIVE bit
is set, U-Boot armada-37xx-wdt.c driver fails to initialize and so U-Boot
is unable to use or kick this watchdog.
Do not check for CNTR_CTRL_ACTIVE bit and always initialize watchdog. Same
behavior is implemented in Linux kernel driver.
This change allows to activate watchdog in firmware which loads U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Since commit 492ee6b8d0e7 ("watchdog: wdt-uclass.c: handle all DM
watchdogs in watchdog_reset()"), all the watchdog are started when
the config WATCHDOG_AUTOSTART.
To avoid a binary choice none/all, a property u-boot,noautostart
may be added in the watchdog node of the u-boot device tree to not
autostart this watchdog.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
I've been handling "inofficially" the watchdog related patches for a few
years now. Let's make this official and add a tree for it and also add
myself here in the MAINTAINERS file.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Harald Seiler <hws@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
The Aspeed GPIO driver supports the GPIO controllers found in the
AST2400, AST2500 and AST2600 BMC SoCs. The implementation is a cut-down
copy of the upstream Linux kernel driver, adapted for u-boot.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
This code has been ported from Linux v5.16.9 arch/arm/boot/dts/am33xx.dtsi
file to allow correct usage of MMC2 controller in U-Boot.
This IP block is a bit specific as it is connected to L3 interconnect bus,
whereas mmc[01] are connected to L4.
Proper configuration of this block (including providing clock) is handled
in ti-sysc.c driver.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This change provides similar aliases definitions as now present in
Linux kernel v5.16.9 for am33xx.dtsi file.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
In the Linux kernel (v5.16) for this SoC there are two separate drivers
- namely sdhci-omap.c and omap_hsmmc.c which have separate set of
compatibles.
The U-Boot's drivers/mmc/omap_hsmmc.c driver supports both eMMC and
SD devices - hence the compatible for SDHCI can be added.
After this change the am335x DTS description can be easier ported
from Linux kernel.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Enable the led in the device tree of the refboard bcm96753ref.
It also defines two leds (led_red ad led_green).
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Add the support of the LED IP for bcm6357. This
LED IP supports blinking, fading and pulsating,
but for the moment, only blinking is supported.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This add the initial support of the broadcom reference
board bcm96753ref with a bcm6753 SoC.
This board has 1 GB of RAM, 256 MB of flash (nand),
2 USB port, 1 UART, and 4 ethernet ports.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
The main reason is to send pmufw cfg overlay from U-Boot to PMUFW to enable
access to DP. Overlay is sent when cls command is called and for that IP
has to be enabled in carrier cards.
And IP needs to be also enabled in SOM dt because with DTB reselection new
DT is not parsed in pre reloc U-Boot instance. It is called from board_f
via embedded_dtb_select(). That's why bind function is not able to allocate
memory and it ends up with error:
"Video device 'display@fd4a0000' cannot allocate frame buffer memory
-ensure the device is set up before relocation"
To avoid this situation DP is placed also to SOM where bind function is
called and frame buffer memory is allocated and just reused after DTB
reselection. Result is the same. There could be a problem in Linux with
different DP configurations but that's need to be solved there because
console should be on from u-boot already.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/c4f31641f917fddb09d976f56875057c658f264c.1645629459.git.michal.simek@xilinx.com
Use ethernet-phy-id compatible string to properly describe phy reset on
kv260 boards. Previous description wasn't correct because reset was done
for mdio bus to operate and it was in this case used for different purpose
which was eth phy reset. With ethernet-phy-id phy reset happens only for
the phy via phy framework.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/73b64f1a2b873b4e26bd2b365364bdf313794ae2.1645629459.git.michal.simek@xilinx.com
With limited low level configuration done via psu-init only IPs connected
on SOM are initialized and configured. All IPs connected to carrier card
are not initialized. There is a need to do proper reset, pin configuration
and also clock setting.
The patch targets the last part which is setting up proper clock for USBs
and SDs.
Also setup proper bus width for SD cards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Link: https://lore.kernel.org/r/d9f80b2551bd246c3d7ecb09b516806c8dc83ed9.1645629459.git.michal.simek@xilinx.com
Remove private xpm_configobject[] and use zynqmp_pmufw_node() which
provides the same functionality.
Also add debug messages for easier debugging.
Fixes: e0283cbdfd49 ("power: zynqmp: Add power domain driver for ZynqMP")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/bddf11459b9b9e849fac9a50db2f1a5fdfae4119.1646122254.git.michal.simek@xilinx.com
slg7xl45106 is i2c based 8-bit gpo expander, gpo pins are set and get by
writing and reading corresponding gpo bit value into its data register.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/839f475cc75c97ffb3496a4caa93de2faabdbca2.1645629688.git.michal.simek@xilinx.com
Card detect state stable issue is observed on few ZynqMP boards(SOM),
so enable the workaround 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' for ZynqMP platforms also.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/0bf6154c79f24227d786efc5e2c1f506185b2bce.1645625609.git.michal.simek@xilinx.com
The timeout used in 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' workaround is 1000ms at a
granularity of 1msec. Change it to 1usec, to not waste time incase the
cd is stable.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f008d2bcf864702a01564789f14f9cdecb8acd45.1645625609.git.michal.simek@xilinx.com
In the workaround added with 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' the timeout variable has post
decrement. Whenever timeout happens, this post decrement is making
timeout=0xffffffff, so timeout error print and return statement are
never reached. Fix it by decrementing it inside the while loop.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/61fc1160ada0dd622cd29e381a74af7bf3d9a200.1645625609.git.michal.simek@xilinx.com
This reverts commit dfbe492edef421de09617dc26805fc428440924e.
Analog bus control register should be programmed in SPL only. This commit
3414712ba8a ("arm64: zynqmp: Writing correct value to ANALOG_BUS") is
programming the same. So revert this commit.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/215bc936e36f88d2e7c4422ec68cad6d40cb8f68.1645624892.git.michal.simek@xilinx.com
Add support to read MAC addresses from mac address multirecord.
Check if multi record is found, then jump to mac address multirecord by
comparing the record type field. If it matches mac address
multirecord(0xD2), then copy mac addresses.
Copy these read MAC address in xilinx_read_eeprom_fru so that they are
updated to eth*addr in board_late_init_xilinx().
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com
In board_late_init_xilinx() eth*addr are updated from the values read from
eeprom. Ideally the MAC addresses are updated sequencially. So if any
MAC address is invalid, it means there are no further valid values.
So optimise this logic by replacing continue with break.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com
fru_checksum function is simply adding all the bytes and returning the
sum. If the data passed to this function is all zero's then it will
return 0, and the functions calling this api will assume that checksum
is correct. Ideally this is not good. Fix this by returning error if all
the data is 0's.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/ac0366fe55c60a818a3f9ed33d96826c817d5520.1645624855.git.michal.simek@xilinx.com
Since OpenSSL 1.1.0, EVP_MD_CTX_create() is EVP_MD_CTX_new()
EVP_MD_CTX_destroy() is EVP_MD_CTX_free()
EVP_MD_CTX_init() is EVP_MD_CTX_reset()
As there's no need to reset a newly created EVP_MD_CTX, moreover
EVP_DigestSignInit() does the reset, thus call to EVP_MD_CTX_init()
can be dropped.
As there's no need to reset an EVP_MD_CTX before it's destroyed,
as it will be reset by EVP_MD_CTX_free(), call to EVP_MD_CTX_reset()
is not needed and can be dropped.
Signed-off-by: Yann Droneaud <ydroneaud@opteya.com>
Based on looking at top contributors it was seen that top statistics from
top contributors don't include all contributions from different email
addresses. That's why I checked all top contributors are checked it.
git shortlog -n $START..$END -e -s
The patch is adding mapping for Bin Meng, Marek Vasut, Masahiro Yamada,
Michal Simek, Tom Rini, Wolfgang Denk.
And also use mapping for Stefan Roese and Wolfgang Denk to be properly
counted.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
If parameter -F is given but FIT support is missing, a NULL pointer might
dereferenced (Coverity CID 350249).
If incorrect parameters are given, provide a message and show usage.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Recent unrelated fixes (9876ae7db6da) revealed that we were missing bits
from 2af181b53e28 in the IOT2050 dt. Add them, but only for main U-Boot.
SPL loads from QSPI only, thus cannot use DMA.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
We only want to call do_board_detect() if CONFIG_TI_I2C_BOARD_DETECT
is set. Same as done for am64.
This makes it possible to add a custom am65 based board design to
U-Boot that does not use this board detection mechanism.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Currently, any u-boot bootloader for ti armv7 platforms using
DEFAULT_FIT_TI_ARGS to boot with a fitimage (boot_fit = 1)
doesn't boot when built with Yocto Poky (openembedded-core).
## Loading kernel from FIT Image at 90000000 ...
Could not find configuration node
ERROR: can't get kernel image!
Arago forked the kernel-fitimage class [1] and altered the
configuration nodes naming while adding the OPTEE support by
using FITIMAGE_CONF_BY_NAME by default [2].
The "upstream" kernel-fitimage class from openembedded-core still
add the "conf-" prefix for each configuration nodes [3].
The ITS file format (from doc/uImage.FIT/source_file_format.txt)
is not really accurate with the expected naming of these nodes.
But in practice the "conf-" prefix is widely used.
When the FIT image support has been added for ti armv7 platforms
the naming from Arago has been used [3]. Fix this issue by adding
the prefix expected by the ITS file generated by kernel-fitimage
class from openembedded-core.
[1] http://arago-project.org/git/meta-arago.git?p=meta-arago.git;a=commitdiff;h=719ab1b2098bcdc59c249e3529fa82cb1b9130e6
[2] http://arago-project.org/git/meta-arago.git?p=meta-arago.git;a=commitdiff;h=f23f2876a0cda89241d031bb7ba0b4256ed90035
[3] https://git.openembedded.org/openembedded-core/tree/meta/classes/kernel-fitimage.bbclass?h=yocto-3.1.13#n290
[3] 1e93cc8473e4fe018aececc8ed3bf8fc2b3ff561
Signed-off-by: Romain Naour <romain.naour@smile.fr>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Denys Dmytriyenko <denys@konsulko.com>
Public documents about BootROM of some Marvell SoCs are available in the
public Web Archive. Put this information into source code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Testes proved that current kwboot version supports also Avanta SoCs.
It looks like that Avanta SoCs are using same kwbimage format as Armada.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Document -D, -b, -d, -q and -s options.
Add common examples how to use kwboot.
Add information about Armada 38x BootROM bug for debug console mode and how
to workaround it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Add all supported Armada SoCs and document -b and -d options in usage.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Marvell BootROM recognize only '\b' byte as backspace. Use terminfo
for retrieving current backspace sequence and replace any occurrence of
backspace sequence by the '\b' byte.
Reading terminfo database is possible via tigetstr() function from system
library libtinfo.so.*. So link kwboot with -ltinfo.
Normally terminfo functions are in <term.h> system header file. But this
header file conflicts with U-Boot "termios_linux.h" header file. So declare
terminfo functions manually.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
-d option is currently broken. In most cases BootROM does not detect this
message pattern. For sending debug message pattern it is needed to do same
steps as for boot message pattern.
Implement sending debug message pattern via same separate thread like it is
for boot message pattern.
Checking if BootROM entered into UART debug mode is different than
detecting UART boot mode. When in boot mode, BootROM sends xmodem NAK
bytes. When in debug mode, BootROM activates console echo and reply back
every written byte (extept \r\n which is interpreted as executing command
and \b which is interpreting as removing the last sent byte).
So in kwboot, check that BootROM send back at least 4 debug message
patterns as a echo reply for debug message patterns which kwboot is sending
in the loop.
Then there is another observation, if host writes too many bytes (as
command) then BootROM command line buffer may overflow after trying to
execute such long command. To workaround this overflow, it is enough to
remove bytes from the input line buffer by sending 3 \b bytes for every
sent character. So do it.
With this change, it is possbile to enter into the UART debug mode with
kwboot -d option.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
After BootROM successfully detects boot message pattern on UART it waits
until host stop sending data on UART. For example Armada 385 BootROM
requires that host does not send anything on UART at least 24 ms. If host
is still sending something then BootROM waits (possibly infinitely).
BootROM successfully detects boot message pattern if it receives it in
small period of time after power on.
So to ensure that host put BootROM into UART boot mode, host must send
continuous stream of boot message pattern with a small gap (for A385 at
least 24 ms) after series of pattern. But this gap cannot be too often or
too long to ensure that it does not cover whole BootROM time window when it
is detecting for boot message pattern.
Therefore it is needed to do following steps in cycle without any delay:
1. send series of boot message pattern over UART
2. wait until kernel transmit all data
3. sleep small period of time
At the same time, host needs to monitor input queue, data received on the
UART and checking if it contains NAK byte by which BootROM informs that
xmodem transfer is ready.
But it is not possible to wait until kernel transmit all data on UART and
at the same time in the one process to also wait for input data. This is
limitation of POSIX tty API and also by linux kernel that it does not
provide asynchronous function for waiting until all data are transmitted.
There is only synchronous variant tcdrain().
So to correctly implement this handshake on systems with linux kernel, it
is needed to use tcdrain() in separate thread.
Implement sending of boot message pattern in one thread and reading of
reply in the main thread. Use pthread library for threads.
This change makes UART booting on Armada 385 more reliable. It is possible
to start kwboot and power on board after minute and kwboot correctly put
board into UART boot mode.
Old implementation without separate thread has an issue that it read just
one byte from UART input queue and then it send 128 message pattern to the
output queue. If some noise was on UART then kwboot was not able to read
BootROM response as its input queue was just overflowed and kwboot was
sending more data than receiving.
This change basically fixed above issue too.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Function kwboot_debugmsg() is always called with kwboot_msg_debug as msg
and function kwboot_bootmsg() with kwboot_msg_debug as msg. Function
kwboot_bootmsg() is never called with NULL msg.
Simplify, cleanup and remove dead code.
No functional change.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Variable msg_req_delay is set but never used. So completely remove it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Failure of kwboot_tty_send() and tcflush() functions is fatal, it does not
make sense to continue. So return error back to the caller like in other
places where are called these functions.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Commit 369e532691e0 ("ddr: marvell: a38x: allow board specific ODT
configuration") added the odt_config member to struct
mv_ddr_topology_map ahead of the clk_enable and ck_delay members. This
means that any boards that configured either of clk_enable or ck_delay
needed to have their board topology updated. This affects the x530 and
clearfog boards. Other A38x boards don't touch any of the trailing
members of mv_ddr_topology_map so don't need updating.
Fixes: 369e532691e0 ("ddr: marvell: a38x: allow board specific ODT configuration")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Replace null pointer by pointer to device registers when calling
armada38x_rtc_write.
Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Stefan Roese <sr@denx.de>
The a3700_fdt_fix_pcie_regions() function still computes nonsense.
It computes the fixup offset from the PCI address taken from the first
row of the "ranges" array, which means that:
- PCI address must equal CPU address (otherwise the computed fix offset
will be wrong),
- the first row must contain the lowest address.
This is the case for the default device-tree, which is why we didn't
notice it.
It also adds the fixup offset to all PCI and CPU addresses, which is
wrong.
Instead:
1) The fixup offset must be computed from the CPU address, not PCI
address.
2) The fixup offset must be computed from the row containing the lowest
CPU address, which is not necessarily contained in the first row.
3) The PCI address - the address to which the PCIe controller remaps the
address space as seen from the point of view of the PCIe device -
must be fixed by the fix offset in the same way as the CPU address
only in the special case when the CPU adn PCI addresses are the same.
Same addresses means that remapping is disabled, and thus if we
change the CPU address, we need also to change the PCI address so
that the remapping is still disabled afterwards.
Consider an example:
The ranges entries contain:
PCI address CPU address
70000000 EA000000
E9000000 E9000000
EB000000 EB000000
By default CPU PCIe window is at: E8000000 - F0000000
Consider the case when TF-A moves it to: F2000000 - FA000000
Until now the function would take the PCI address of the first entry:
70000000, and the new base, F2000000, to compute the fix offset:
F2000000 - 70000000 = 82000000, and then add 8200000 to all addresses,
resulting in
PCI address CPU address
F2000000 6C000000
6B000000 6B000000
6D000000 6D000000
which is complete nonsense - none of the CPU addresses is in the
requested window.
Now it will take the lowest CPU address, which is in second row,
E9000000, and compute the fix offset F2000000 - E9000000 = 09000000,
and then add it to all CPU addresses and those PCI addresses which
equal to their corresponding CPU addresses, resulting in
PCI address CPU address
70000000 F3000000
F2000000 F2000000
F4000000 F4000000
where all of the CPU addresses are in the needed window.
Fixes: 4a82fca8e330 ("arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable ext4 write support in Turris Omnia's defconfig. Some users find
it useful.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Use "MVPCIE_" prefix instead of generic "PCIE_" prefix for pci_mvebu.c
specific macros. Define offset macros for Root Port registers and use
standard register macros from pci.h when accessing Root Port registers.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Macro SELECT() is unused and struct mvebu_pcie field lane_mask is unused
too. Remove them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Sometimes kwboot after quitting terminal prints error message:
terminal: Bad address
This is caused by trying to call write() syscall with count of (size_t)-1
bytes.
When quit sequence is split into more read() calls then number of input
bytes (nin) at the end of cycle can underflow and be negative. Fix it.
Fixes: de7514046ea5 ("tools: kwboot: Fix detection of quit esc sequence")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This converts the following to Kconfig:
CONFIG_CHIP_SELECTS_PER_CTRL
Cc: Alison Wang <alison.wang@nxp.com>
Cc: Pramod Kumar <pramod.kumar_1@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This option is not in use anywhere and the documentation implies it's
for some very old and unlikely to be seen currently issues. Rather than
update the code so the CONFIG symbol could be easily in Kconfig, remove
the code.
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
This converts the following to Kconfig:
CONFIG_BOOTP_MAY_FAIL
CONFIG_BOOTP_VENDOREX
CONFIG_BOOTP_BOOTFILESIZE
CONFIG_BOOTP_NISDOMAIN
CONFIG_BOOTP_TIMEOFFSET
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
These particular values are not configurable and today we always set
CONFIG_SECURE_BL1_ONLY. Move these to where they're used in the code,
and drop from the CONFIG namespace.
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Remove some code, primarily CPM2 related, that is now unused since the
removal of MPC8540/60ADS.
Fixes 3913191c8a6b ("powerpc: mpc8540ads: mpc8560ads: Drop support for MPC8540/60ADS")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Merge tag 'u-boot-at91-fixes-2022.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91
First set of u-boot-atmel fixes for the 2022.04 cycle:
This fixes set includes only a single fix for the Ethernet on sama7g5ek
board which is broken at the moment.
The F1C100s DT contains the wrong compatible string for the watchdog,
which breaks reset functionality.
Updating the DT goes via the Linux tree, but to allow reset
functionality meanwhile (useful for development!), disable SYSRESET for
now, to let the old-fashioned watchdog driver kick in and provide the
reset_cpu() implementation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Commit 88998f777531 ("arm: arm926ej-s: Add sunxi code") introduced
the ARM926 version of the code to save and restore some FEL state, to
be able to return to the BROM FEL code after the SPL has run.
However during review a change was made, that happened to mess up the
register restore part, so SCTLR and CPSR ended up with the wrong values,
breaking return to FEL.
Use the same offset that we actually save those registers to, to make
FEL booting actually work on the Lichee Pi Nano.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Enable SPI boot in SPL on SUNIV architecture and use
it in the licheepi nano that uses the F1C100s.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The SUNIV SoCs come with a sun6i-style SPI controller at the base address
of sun4i SPI controller. The module clock of the SPI controller is
missing which leaves us running directly from the AHB clock, which is
set to 200MHz.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[Icenowy: Original implementation]
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
[Jesse: adaptation to Upstream U-Boot]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
In contrast to other Allwinner SoCs the F1C100s BROM does not store a
boot source indicator in the eGON header in SRAM. This leaves the SPL
guessing where we were exactly booted from, and for instance trying
the SD card first, even though we booted from SPI flash.
By inspecting the BROM code and by experimentation, Samuel found that the
top of the BROM stack contains unique pointers for each of the boot
sources, which we can use as a boot source indicator.
This patch removes the existing board_boot_order bodge and replace it
with a proper boot source indication function.
The only caveat is that this only works in the SPL, as the SPL header
gets overwritten with the exception vectors, once U-Boot proper takes
over. Always return MMC0 as the boot source, when called from U-Boot
proper, as a placeholder for now, until we find another way.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Suggested-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Implements SCMI APIs to retrieve the number exposed SCMI clocks using
SCMI_PROTOCOL_ATTRIBUTES messages and the names of the clocks using
SCMI_CLOCK_ATTRIBUTES messages.
This change updates sandbox SCMI clock test driver to manage these
2 new message IDs.
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Clement Leger <clement.leger@bootlin.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Updates sandbox SCMI clock driver and tests since enabling CCF will
mandate clock discovery that is all exposed SCMI clocks shall be
discovered at initialization. For this reason, sandbox SCMI clock
driver must emulate all clocks exposed by SCMI server, not only those
effectively consumed by some other U-Boot devices.
Therefore the sandbox SCMI test driver exposes 3 clocks (IDs 0, 1 and 2)
and sandbox SCMI clock consumer driver gets 2 of them.
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Changes devm_scmi_process_msg() first argument from target parent device
to current SCMI device and lookup the SCMI agent device among SCMI device
parents for find the SCMI agent operator needed for communication with
the firmware.
This change is needed in order to support CCF in clk_scmi driver unless
what CCF will fail to find the right udevice related to exposed SCMI
clocks.
This patch allows to simplify the caller sequence, using SCMI device
reference as parameter instead of knowing SCMI uclass topology. This
change also adds some protection in case devm_scmi_process_msg() API
function is called for an invalid device type.
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
As per DT bindings since Linux kernel v5.14, the device tree can define
only 1 SCMI agent node that is named scmi [1]. As a consequence, change
implementation of the SCMI driver test through sandbox architecture to
reflect that.
This change updates sandbox test DT and sandbox SCMI driver accordingly
since all these are impacted.
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Changes SCMI bindings documentation to relate to Linux kernel
source tree that recently changed the bindings description to YAML
format.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
To quote the author:
I was looking into the arm64 boot code lately and stumbled upon some
issues. Also Nishanth brought back memories of a lengthy debug session,
which was caused due to U-Boot keeping SErrors masked. As the resulting
patches are all somewhat related, I gathered this series here to address
those problems.
Patches 1 to 3 address exception handling issues, with the SError
enablement being the most prominent fix here.
Patch 4 cleans up asm/io.h. This was on the list before[1], but was
somehow lost when it was intercepted by a shorter version of itself.
Patches 5 and 6 clean up some unnecessarily complicated AArch64 assembly
code.
The branch_if_master macro jumps to a label if the CPU is the "master"
core, which we define as having all affinity levels set to 0. To check
for this condition, we need to mask off some bits from the MPIDR
register, then compare the remaining register value against zero.
The implementation of this was slighly broken (it preserved the upper
RES0 bits), overly complicated and hard to understand, especially since
it lacked comments. The same was true for the very similar
branch_if_slave macro.
Use a much shorter assembly sequence for those checks, use the same
masking for both macros (just negate the final branch), and put some
comments on them, to make it clear what the code does.
This allows to drop the second temporary register for branch_if_master,
so we adjust all call sites as well.
Also use the opportunity to remove a misleading comment: the macro
works fine on SoCs with multiple clusters. Judging by the commit
message, the original problem with the Juno SoC stems from the fact that
the master CPU *can* be configured to be from cluster 1, so the
assumption that the master CPU has all affinity values set to 0 does not
hold there. But this is already mentioned above in a comment, so remove
the extra comment.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The switch_el macro is a neat contraption to handle cases where we need
different code depending on the current exception level, but its
implementation was longer than needed.
Simplify it by doing just one comparison, then using the different
condition codes to branch to the desired target. PState.CurrentEL just
holds two bits, and since we don't care about EL0, we can use >, =, < to
select EL3, EL2 and EL1, respectively.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
asm/io.h is the header file containing the central MMIO accessor macros.
Judging by the header and the comments, it was apparently once copied
from the Linux kernel, but has deviated since then *heavily*. There is
absolutely no point in staying close to the original Linux code anymore,
so just remove the old cruft, by:
- removing pointless Linux history
- removing commented code
- removing outdated comments
- removing unused definitions (for mem_isa)
This massively improves the readability of the file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
In ARMv8 we have the choice between two stack pointers to use: SP_EL0 or
SP_ELx, which is banked per exception level. This choice is stored in
the SP field of PState, and can be read and set via the SPSel special
register. When the CPU takes an exception, it automatically switches to
the SP_ELx stack pointer.
Trusted Firmware enters U-Boot typically with SPSel set to 1, so we use
SP_ELx all along as our sole stack pointer, both for normal operation and
for exceptions.
But if we now for some reason enter U-Boot with SPSel cleared, we will
setup and use SP_EL0, which is fine, but leaves SP_ELx uninitialised.
When we now take an exception, we try to save the GPRs to some undefined
location, which will usually end badly.
To make sure we always have SP_ELx pointing to some memory, set SPSel
to 1 in the early boot code, to ensure safe operation at all times.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The ARMv8 architecture describes the "SError interrupt" as the fourth
kind of exception, next to synchronous exceptions, IRQs, and FIQs.
Those SErrors signal exceptional conditions from which the system might
not easily recover, and are normally generated by the interconnect as a
response to some bus error. A typical situation is access to a
non-existing memory address or device, but it might be deliberately
triggered by a device as well.
The SError interrupt replaces the Armv7 asynchronous abort.
Trusted Firmware enters U-Boot (BL33) typically with SErrors masked,
and we never enable them. However any SError condition still triggers
the SError interrupt, and this condition stays pending, it just won't be
handled. If now later on the Linux kernel unmasks the "A" bit in PState,
it will immediately take the exception, leading to a kernel crash.
This leaves many people scratching their head about the reason for
this, and leads to long debug sessions, possibly looking at the wrong
places (the kernel, but not U-Boot).
To avoid the situation, just unmask SErrors early in the ARMv8 boot
process, so that the U-Boot exception handlers reports them in a timely
manner. As SErrors are typically asynchronous, the register dump does
not need to point at the actual culprit, but it should happen very
shortly after the condition.
For those exceptions to be taken, we also need to route them to EL2,
if U-Boot is running in this exception level.
This removes the respective code snippet from the Freescale lowlevel
routine, as this is now handled in generic ARMv8 code.
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The arm64 version of the exception command was just defining the
undefined exception, but actually copied the AArch32 instruction.
Replace that with an encoding that is guaranteed to be and stay
undefined. Also add instructions to trigger unaligned access faults and
a breakpoint.
This brings ARM64 on par with ARM(32) for the exception command.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
To quote the author:
This series adds a new errors-only pylint check and adds it to the CI
systems.
It also fixes the current errors in the U-Boot Python code, disabling
errors where it seems necessary.
A small patch to buildman allows it to build sandbox without any changes
to the default config file
At present the default .buildman file written by buildman does not specify
a default toolchain. Add an 'other' line so this works correctly and
sandbox builds run as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix pylint errors in all test.
This requires adding a get_spawn() method to the ConsoleBase base, so that
its subclass is happy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix two pylint errors in this file.
Note ACTION_SPL_NOT_EXIST is not defined so the dead code can be removed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix pylint errors that can be fixed and mask those that seem to be
incorrect.
A complication with binman is that it tries to avoid importing libfdt
(or anything that imports it) unless needed, so that things like help
still work if it is missing.
Note that two tests are duplicated in binman and two others have
duplicate names, so both of these issues are fixed also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Ensure there is a valid reset-gpio defined before using it.
Fixes: f9852acdce02 ("phy: nop-phy: Fix enabling reset")
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
This patch scans the cmdline from the Samsung SBL (second stage
bootloader) and stores the parameters board_id=N and lcdtype=N
in order to augment the DTB for different board and LCD types.
We then add a custom ft_board_setup() callback that will inspect
the DTB and patch it using the stored LCD type. At this point
we know which product we are dealing with, so using the passed
board_id we can also print the board variant for diagnostics.
We patch the Codina, Skomer and Kyle DTBs to use the right
LCD type as passed in lcdtype from the SBL.
This also creates an infrastructure for handling any other
Samsung U8500 board variants that may need a slightly augmented
DTB.
Cc: Markuss Broks <markuss.broks@gmail.com>
Cc: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Support for Apple M1 Pro and Max will allow using a single binary for
all M1 SoCs. The M1 Pro/Max have a different memory layout. The RAM
start address is 0x100_0000_0000 instead of 0x8_0000_0000.
Replace the hardcoded memory layout with dynamic initialized
environment variables in board_late_init().
Tested on Mac Mini (2020) and Macbook Pro 14-inch (2021).
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
To make sure we get a working console as soon as possible in the SPL the
UART pins require to be configured earlier. This is especially
true for the pins of UART3, since the PDU001 board uses this UART for
the console by default.
Signed-off-by: Felix Brack <fb@ltec.ch>
The changes from commit 0dba45864b2a ("arm: Init the debug UART")
prevent the early debug UART from being initialized correctly.
To fix this we not just configure the pin multiplexer but add setting up
early clocks.
Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently -l option for mkimage and dumpimage ignores option -T and always
tries to autodetect image type.
With this change it is possible to tell mkimage and dumpimage to parse
image file as specific type (and not random autodetected type). This allows
to use mkimage -l or dumpimage -l as tool for validating image.
params.type for -l option is now by default initialized to zero
(IH_TYPE_INVALID) instead of IH_TYPE_KERNEL. imagetool_get_type() for
IH_TYPE_INVALID returns NULL, which is assigned to tparams. mkimage and
dumpimage code is extended to handle tparams with NULL for -l option. And
imagetool_verify_print_header() is extended to do validation via tparams if
is not NULL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Layerscape platforms have different RCW header value from FSL
PowerPC platforms, the current image header verification callback
is only working on PowerPC, it will fail on Layerscape, this patch
is to fix this issue.
This is a historical problem and exposed by the following patch:
http://patchwork.ozlabs.org/project/uboot/patch/20220114173443.9877-1-pali@kernel.org
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The BOOT_TARGET_DEVICES list for distro_bootcmd was hard-coded to assume
that all boot devices are available/enabled in the configuration,
thus ignoring the actual config settings. The config_distro_bootcmd.h
header file specifically has compile-time checks to detect such problems.
To allow disabling USB, SCSI, etc. in custom lx2160a board configs,
make it depend on the config settings and use only the enabled features.
Signed-off-by: Daniel Klauer <daniel.klauer@gin.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Simplify the binman config and fdt nodes by using the "@..-SEQ"
substitutions and CONFIG_OF_LIST.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Nowadays, u-boot (when CONFIG_NET_RANDOM_ETHADDR is set) will set
enetaddr to a random value if not set and then pass the randomly
generated MAC address to linux.
This is bad for the following reasons:
(1) it makes it impossible for linux to detect this error
(2) linux won't trigger any fallback mechanism for the case where
it didn't find any valid MAC address
(3) a saveenv will store this randomly generated MAC address in the
environment
Probably, the user will also be unaware that something is wrong. He will
just get different MAC addresses on each reboot, asking himself why this
is the case.
As this board usually have a serial port, the user can just fix this by
setting the MAC address manually in the environment. Also disable the
netconsole just in case, because it cannot be guaranteed that it will
work in any case. After all, this was just a convenience option, because
the bootloader - right now - doesn't have the ability to read the MAC
address, which is stored in the OTP. But it is far more important to
have a clear view of whats wrong with a board and that means we can no
longer use this Kconfig option.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
They are no longer needed, because we now have proper driver support for
the sl28cpld management controller.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board has an internal watchdog which supervises the board startup.
Although, the initial state of the watchdog is configurable, it is
enabled by default. In board_late_init(), which means almost everything
worked as expected, disable the watchdog.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The SoC provides two additional watchdogs integrated in the SoC. Enable
support for these.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable the GPIO and watchdog driver. Don't start the watchdog
automatically, though.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Most of the time it is very useful to have the version of the board
management controller. Now that we have a driver, print it during
startup.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The current console output is:
DRAM: 4 GiB
DDR 4 GiB (DDR3, 32-bit, CL=11, ECC on)
The size is printed twice and we can save one line of console output if
we join both lines. The new output is as follows:
DRAM: 4 GiB (DDR3, 32-bit, CL=11, ECC on)
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The gpio block is part of the sl28cpld sl28cpld management controller.
There are three different flavors: the usual input and output where the
direction is configurable, but also input only and output only variants.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The watchdog timer is part of the sl28cpld management controller. The
watchdog timer usually supervises the bootloader boot-up and if it bites
the failsafe bootloader will be activated. Apart from that it supports
the usual board level reset and one SMARC speciality: driving the
WDT_TIMEOUT# signal.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add a multi-function device driver which will probe its children and
provides methods to access the device.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
UEFI specification requires that 5 minutes watchdog timer is
armed before the firmware's boot manager invokes an EFI boot option.
This watchdog timer is updated as follows, according to the
UEFI specification.
1) The EFI Image may reset or disable the watchdog timer as needed.
2) If control is returned to the firmware's boot manager,
the watchdog timer must be disabled.
3) On successful completion of EFI_BOOT_SERVICES.ExitBootServices()
the watchdog timer is disabled.
1) is up to the EFI image, and 3) is already implemented in U-Boot.
This patch implements 2), the watchdog is disabled when control is
returned to U-Boot.
In addition, current implementation arms the EFI watchdog at only
the first "bootefi" invocation. The EFI watchdog must be armed
in every EFI boot option invocation.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add a cold reset soon after processing capsule update on disk.
This is required in UEFI specification 2.9 Section 8.5.5
"Delivery of Capsules via file on Mass Storage device" as;
In all cases that a capsule is identified for processing the system is
restarted after capsule processing is completed.
This also reports the result of each capsule update so that the user can
notice that the capsule update has been succeeded or not from console log.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add expected_reset optional argument to ConsoleBase::ensure_spawned(),
ConsoleBase::restart_uboot() and ConsoleSandbox::restart_uboot_with_flags()
so that it can handle a reset while the 1st boot process after main
boot logo before prompt correctly.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add wait_for_reboot optional argument to ConsoleBase::run_command()
so that it can handle an expected reset by command execution.
This is useful if a command will reset the sandbox while testing
such commands, e.g. run_command("reset", wait_for_reboot = True)
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since the efi_update_capsule() represents the UpdateCapsule() runtime
service, it has to handle the capsule flags and update ESRT. However
the capsule-on-disk doesn't need to care about such things.
Thus, the capsule-on-disk should use the efi_capsule_update_firmware()
directly instead of calling efi_update_capsule().
This means the roles of the efi_update_capsule() and capsule-on-disk
are different. We have to keep the efi_update_capsule() for providing
runtime service API at boot time.
Suggested-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The general rule of accepting or rejecting an image is
1. Is the sha256 of the image in dbx
2. Is the image signed with a certificate that's found in db and
not in dbx
3. The image carries a cert which is signed by a cert in db (and
not in dbx) and the image can be verified against the former
4. Is the sha256 of the image in db
For example SHIM is signed by "CN=Microsoft Windows UEFI Driver Publisher",
which is issued by "CN=Microsoft Corporation UEFI CA 2011", which in it's
turn is issued by "CN=Microsoft Corporation Third Party Marketplace Root".
The latter is a self-signed CA certificate and with our current implementation
allows shim to execute if we insert it in db.
However it's the CA cert in the middle of the chain which usually ends up
in the system's db. pkcs7_verify_one() might or might not return the root
certificate for a given chain. But when verifying executables in UEFI, the
trust anchor can be in the middle of the chain, as long as that certificate
is present in db. Currently we only allow this check on self-signed
certificates, so let's remove that check and allow all certs to try a
match an entry in db.
Open questions:
- Does this break any aspect of variable authentication since
efi_signature_verify() is used on those as well?
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
That code is mistakenly duplicated due to copy-and-paste error.
Just remove it.
Fixes: CID 348360
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
SMBIOS is not x86 specific. So we should have an architecture independent
page describing it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The wrong phy was being enabled, because it worked and the proper
PHY did not. After the Renesas maintainer made some adjustments
to the device tree, Linux was able to use the proper driver, and
when that device tree was ported to Linux, the ethernet stopped
working due to the lack of rgmii-rxid support. Now that
rgmii-rxid is supported, enable the proper driver to restore
ethernet function.
Fixes: 1eaf61c84db6 ("arm: dts: beacon-rzg2: Resync device trees with Linux 5.16-rc3")
Signed-off-by: Adam Ford <aford173@gmail.com>
Some boards like the Beacon RZ/G2 SOM use either flags for
tx-internal-delay-ps, rx-internal-delay-ps or rgmii-rxid.
In Linux the APSR_RDM flag is set when either rx-internal-delay-ps
is set or the mode is rgmii-rxid, and the APSR_TDM is set when
tx-internal-delay-ps is found or rgmii-txid is set, and both
are set if rgmii-id is set.
The ravb driver in U-Boot driver was missing rgmii-rxid support,
so add that support in a similar fashion to what is done in Linux.
Signed-off-by: Adam Ford <aford173@gmail.com>
The driver is currently using sizeof(op->cmd.opcode) in the op_len
calculation. Commit d15de623013c ("spi: spi-mem: allow specifying a
command's extension") changed op->cmd.opcode from one byte to two.
Instead, a new struct member op->cmd.nbytes is supposed to be used.
For regular commands op->cmd.nbytes will be one.
Commit d15de623013c ("spi: spi-mem: allow specifying a command's
extension") did update some drivers that overload the generic mem_ops()
implementation, but forgot to update dw_spi_mem_ops().
Calculating op_len incorrectly causes dw_spi_mem_ops() to misbehave, since
op_len is used to determine how many bytes that should be read/written.
On the canaan k210 board, this causes the probe of the SPI flash to fail.
Fix the op_len calculation in dw_spi_mem_ops(). Doing so results in
working SPI flash on the canaan k210 board.
Fixes: d15de623013c ("spi: spi-mem: allow specifying a command's extension")
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Tested-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
In the TI am65 device tree files there is no reset defined. Also
the Linux kernel driver uses devm_reset_control_get_optional_exclusive(..)
to get the reset.
Lets do the same as the kernel does and make thr reset optinal.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Non GMAC's MDIO pins should have slew rate disabled for R(G)MII modes. Set
them accordingly in DT.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2022-02-04 13:53:58 +02:00
6919 changed files with 366582 additions and 155153 deletions
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